CN103840044A - Method for manufacturing quantum well structure of epitaxial wafer - Google Patents
Method for manufacturing quantum well structure of epitaxial wafer Download PDFInfo
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- CN103840044A CN103840044A CN201210491167.3A CN201210491167A CN103840044A CN 103840044 A CN103840044 A CN 103840044A CN 201210491167 A CN201210491167 A CN 201210491167A CN 103840044 A CN103840044 A CN 103840044A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
- H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
Abstract
The invention provides a method for manufacturing a quantum well structure of an epitaxial wafer. The method for manufacturing the quantum well structure of the epitaxial wafer comprises the steps that a substrate is provided; an intrinsic gallium nitride layer is formed on the substrate; a gallium nitride layer of the first type is formed on the intrinsic gallium nitride layer; the gallium nitride/InGaN quantum well structure is formed on the gallium nitride layer of the first type, wherein a gallium nitride quantum barrier is formed at the first temperature under the first pressure condition in the first atmosphere, and an InGaN quantum well is formed at the second temperature under the second pressure condition in the second atmosphere; a gallium nitride layer of the second type is formed on a barrier layer, wherein the first temperature is higher than the second temperature, the first pressure is higher than the second pressure, and the specific heat capacity of gases of the first atmosphere is lower than the specific heat capacity of gases of the second atmosphere. The method for manufacturing the quantum well structure of the epitaxial wafer has the advantages that temperature conversion is fast, production efficiency is high, and the obtained quantum well is high in quality.
Description
Technical field
The present invention relates to field of semiconductor manufacture, be specifically related to a kind of preparation method of epitaxial wafer quantum well structure.
Background technology
Multiple Quantum Well (MQWs) is an important structure in LED light-emitting diode, is built periodically and is alternately formed by quantum well and quantum.Commercialization GaN base LED epitaxial wafer all adopts comparatively expensive metallo-organic compound chemical vapour deposition (CVD) (MOCVD) device fabrication at present.In GaN base LED epitaxial process, because InGaN quantum well and GaN quantum are built growth temperature and are had difference, in the time of alternating growth bi-material, MOCVD equipment need spend the more time to realize temperature transition, how shortening the temperature transition time in MQWs growth course, is an important research direction to improve GaN base LED epitaxial wafer production efficiency.
Summary of the invention
The present invention one of is intended to solve the problems of the technologies described above at least to a certain extent or at least provides a kind of useful business to select.For this reason, the object of the invention is to propose one and can shorten quantum well growth time, improve the preparation method of the epitaxial wafer quantum well structure of equipment capacity.
According to the preparation method of the epitaxial wafer quantum well structure of the embodiment of the present invention, comprise the following steps: substrate is provided; On described substrate, form intrinsic gallium nitride layer; On described intrinsic gallium nitride layer, form the gallium nitride layer of the first kind; On the gallium nitride layer of the described first kind, form the quantum well structure of gallium nitride/indium gallium nitrogen, wherein, gallium nitride quantum is built under the first temperature, the first pressure conditions, in the first atmosphere and is formed, and indium gallium nitrogen quantum well forms under the second temperature, the second pressure, in the second atmosphere; On described quantum well structure, form the gallium nitride layer of Second Type, wherein, described the first temperature is higher than described the second temperature, and described the first pressure is higher than the second pressure, and the specific heats of gases of described the first atmosphere are held lower than the specific heats of gases of described the second atmosphere and held.
In one embodiment of the invention, described the first atmosphere is helium, and described the second atmosphere is nitrogen.
In one embodiment of the invention, described the first atmosphere is helium nitrogen mixture gas, and described the second atmosphere is nitrogen.
In one embodiment of the invention, also comprise: between the gallium nitride layer of the described first kind and described quantum well structure, form stress release layer.
In one embodiment of the invention, the multilayer indium gallium nitrogen sublayer that described stress release layer is alternating growth and the superlattice structure of nitride multilayer gallium sublayer.
In one embodiment of the invention, every layer of described gallium nitride sublayer thickness is 15nm-85nm, and every layer of described indium gallium nitrogen sublayer thickness is 1nm-20nm.
In one embodiment of the invention, also comprise: between described quantum well structure and the gallium nitride layer of described Second Type, form barrier layer.
In one embodiment of the invention, repeat the step of the quantum well structure of n described formation gallium nitride/indium gallium nitrogen, to form multi-quantum pit structure, wherein 2≤n≤25.
In one embodiment of the invention, described the first temperature is 800 ℃-900 ℃, and described the second temperature is 700 ℃-800 ℃.
In one embodiment of the invention, described the first pressure is 300mbr-500mbr, and described the second pressure is 100mbr-300mbr, and the difference of described the first pressure and the second pressure is 100mbr-400mbr.
In one embodiment of the invention, described barrier material is aluminum gallium nitride, and thickness is 20nm-60nm.
According to the preparation method of the epitaxial wafer quantum well structure of the embodiment of the present invention, adopt metal organic-matter chemical vapor phase deposition method (MOCVD), by the carrier gas kind of change and the means of reaction pressure, change rapidly epi-layer surface temperature, improve quantum well crystal mass, shorten quantum well growth time, to reach the object that improves equipment capacity.
Additional aspect of the present invention and advantage in the following description part provide, and part will become obviously from the following description, or recognize by practice of the present invention.
Accompanying drawing explanation
Above-mentioned and/or additional aspect of the present invention and advantage accompanying drawing below combination is understood becoming the description of embodiment obviously and easily, wherein:
Fig. 1 is the preparation method's of the epitaxial wafer quantum well structure of the embodiment of the present invention schematic diagram.
Embodiment
Describe embodiments of the invention below in detail, the example of described embodiment is shown in the drawings, and wherein same or similar label represents same or similar element or has the element of identical or similar functions from start to finish.Be exemplary below by the embodiment being described with reference to the drawings, be intended to for explaining the present invention, and can not be interpreted as limitation of the present invention.
In description of the invention, it will be appreciated that, term " " center ", " longitudinally ", " laterally ", " length ", " width ", " thickness ", " on ", D score, " front ", " afterwards ", " left side ", " right side ", " vertically ", " level ", " top ", " end " " interior ", " outward ", " clockwise ", orientation or the position relationship of indications such as " counterclockwise " are based on orientation shown in the drawings or position relationship, only the present invention for convenience of description and simplified characterization, rather than device or the element of indication or hint indication must have specific orientation, with specific orientation structure and operation, therefore can not be interpreted as limitation of the present invention.
In addition, term " first ", " second " be only for describing object, and can not be interpreted as indication or hint relative importance or the implicit quantity that indicates indicated technical characterictic.Thus, one or more these features can be expressed or impliedly be comprised to the feature that is limited with " first ", " second ".In description of the invention, the implication of " multiple " is two or more, unless otherwise expressly limited specifically.
In the present invention, unless otherwise clearly defined and limited, the terms such as term " installation ", " being connected ", " connection ", " fixing " should be interpreted broadly, and for example, can be to be fixedly connected with, and can be also to removably connect, or connect integratedly; Can be mechanical connection, can be also electrical connection; Can be to be directly connected, also can indirectly be connected by intermediary, can be the connection of two element internals.For the ordinary skill in the art, can understand as the case may be above-mentioned term concrete meaning in the present invention.
In the present invention, unless otherwise clearly defined and limited, First Characteristic Second Characteristic it " on " or D score can comprise that the first and second features directly contact, also can comprise that the first and second features are not directly contacts but by the other feature contact between them.And, First Characteristic Second Characteristic " on ", " top " and " above " comprise First Characteristic directly over Second Characteristic and oblique upper, or only represent that First Characteristic level height is higher than Second Characteristic.First Characteristic Second Characteristic " under ", " below " and " below " comprise First Characteristic under Second Characteristic and tiltedly, or only represent that First Characteristic level height is less than Second Characteristic.
As shown in Figure 1, the preparation method of the epitaxial wafer quantum well structure of the embodiment of the present invention comprises:
S1., substrate is provided.Particularly, substrate is sapphire pattern substrate, and sapphire pattern substrate is the conventional substrate of growing gallium nitride base semiconductor.
S2. on substrate, form intrinsic gallium nitride layer.Particularly, under the hydrogen carrier gas of reproducibility, on substrate, form plain gallium nitride layer.
S3. on intrinsic gallium nitride layer, form the gallium nitride layer of the first kind.Particularly, under the hydrogen carrier gas of reproducibility, the gallium nitride layer of the growth first kind is the N-shaped gallium nitride of mixing silicon.It should be noted that, can be also the p-type gallium nitride of mixing magnesium.
S4. on the gallium nitride layer of the first kind, form stress release layer.Particularly, under nitrogen carrier gas, the superlattice structure of the multilayer of alternately growing indium gallium nitrogen sublayer and nitride multilayer gallium sublayer, wherein, every layer of described gallium nitride sublayer thickness is 15nm-85nm, every layer of described indium gallium nitrogen sublayer thickness is 1nm-20nm.This stress release layer can discharge the stress that front structure brings, and be of value to and improve the quantum well structure crystal mass that is about to growth, thus the internal quantum of lifting epitaxial wafer.It should be noted that, this step is preferred steps and nonessential.
S5. on stress release layer, form the quantum well structure of gallium nitride/indium gallium nitrogen (GaN/InGaN), wherein, gallium nitride quantum is built under the first temperature, the first pressure conditions, in the first atmosphere and is formed, and indium gallium nitrogen quantum well forms under the second temperature, the second pressure, in the second atmosphere.Wherein, the first temperature is higher than the second temperature, and the first pressure is higher than the second pressure, and the heat conductivity of gas of the first atmosphere is higher than the heat conductivity of gas of the second atmosphere.This step can repeat n time, to form the superlattice structure of multi layer quantum well.Wherein, the concept of above-mentioned " atmosphere " refers to the type of carrier gas.Particularly:
Grow after stress release layer, first carrier gas is switched to pure helium or helium nitrogen mixture gas, reaction chamber pressure stability, between 300mbr-500mbr, regulates reaction chamber heating source temperature, make epitaxial wafer surface temperature be stabilized in rapidly 800 ℃-900 ℃, start to pass into triethyl-gallium and NH
3growing gallium nitride quantum is built.
After growing gallium nitride quantum is built, before growth indium gallium nitrogen quantum well starts, carrier gas is switched to nitrogen, reaction chamber pressure stability is at 100mbr-300mbr, and the difference of the nebulizer gas pressure when nebulizer gas pressure while requiring growing gallium nitride quantum to build and growth indium gallium nitrogen quantum dot is 100mbr-400mbr, regulate reaction chamber heating source temperature, make epitaxial wafer surface temperature be stabilized in rapidly 700 ℃-800 ℃, start to pass into triethyl-gallium, NH
3with trimethyl indium growth indium gallium nitrogen quantum well.
Above different growth phase adopts the selection of different technology conditions according to as follows:
(1) because the best crystal growth temperature of gallium nitride material is higher than indium gallium nitrogen material, therefore need to set the first temperature higher than the second temperature.
(2) helium is that monoatomic gas, nitrogen are diatomic gas, the mol ratio thermal capacitance (level pressure mol ratio thermal capacitance and constant volume mol ratio thermal capacitance are all like this) according to the mol ratio thermal capacitance of physical-chemical data helium lower than nitrogen.
In the time being switched to the step at intensification growing gallium nitride quantum base, under the prerequisite at fixing heater strip power, helium be heated heat up than nitrogen be heated heat up more obvious, can heat quickly and reach preset temperature, therefore should select the atmosphere of the pure helium or the helium nitrogen mixture gas that are easy to heat temperature raising.On the contrary, in the time being switched to the step of cooling growth indium gallium nitrogen quantum well, because the specific heat capacity of nitrogen is larger, can absorbing more heat, reduce chamber temp quickly, therefore should select nitrogen atmosphere.It should be noted that, the first atmosphere adopts the effect of shortening heating time of pure helium more obvious, but adopts the cost of helium nitrogen mixture gas lower, and actual conditions can be selected as required.
(3) when chamber pressure is larger, the gas molecule that participates in heat exchange is more, and molecular free path shortens, and it is higher that gas and plane of crystal reach thermally equilibrated temperature, contributes to plane of crystal temperature to raise rapidly; Hour, the gas molecule that participates in heat exchange reduces chamber pressure, and molecular free path uprises, and gas and plane of crystal reach thermally equilibrated temperature step-down, contribute to plane of crystal temperature to reduce rapidly.Be greater than the second pressure therefore need to set the first pressure.But it is unsuitable excessive that the first pressure and the second pressure differ, in order to avoid the handoff procedure of air pressure increase and decrease is consuming time too much, the difference of the two should be controlled within the specific limits.
In a preferred embodiment of the invention, can repeat the quantum well scheme of the above-mentioned gallium nitride/indium of n secondary growth gallium nitrogen, repeat step S5 n time, to form multi-layer quantum well structure, wherein, 2≤n≤25.
S6. on quantum well structure, form barrier layer.Particularly, this barrier layer is aluminum gallium nitride, and thickness is 20nm-60nm.The position on barrier layer is generally above quantum well structure, and effectively block electrons is overflowed from active area, thereby increases the quantity of active area electronics, improves the charge carrier combined efficiency of quantum well layer, promotes LED chip luminous efficiency.It should be noted that, this step is preferred steps and nonessential.
S7. on barrier layer, form the gallium nitride layer of Second Type.Particularly, in the time that the gallium nitride layer of the first kind in step S3 is N-shaped gallium nitride, growing p-type gallium nitride; In the time that the gallium nitride layer of the first kind in step S3 is p-type gallium nitride, growing n-type gallium nitride, wherein, the thickness of the gallium nitride layer of Second Type is that 150nm is to 300nm.
The present invention utilizes the method that changes atmosphere and reaction pressure, can realize the rapid conversion of different temperatures, effectively reduces the growth time of MQWs, and quantum well is grown under environment under low pressure, can improve the crystal mass of quantum well, significantly reduce emission wavelength half-wave wide, increase internal quantum efficiency.
Any process of otherwise describing in flow chart or at this or method are described and can be understood to, represent to comprise that one or more is for realizing module, fragment or the part of code of executable instruction of step of specific logical function or process, and the scope of the preferred embodiment of the present invention comprises other realization, wherein can be not according to order shown or that discuss, comprise according to related function by the mode of basic while or by contrary order, carry out function, this should be understood by embodiments of the invention person of ordinary skill in the field.
In the description of this specification, the description of reference term " embodiment ", " some embodiment ", " example ", " concrete example " or " some examples " etc. means to be contained at least one embodiment of the present invention or example in conjunction with specific features, structure, material or the feature of this embodiment or example description.In this manual, the schematic statement of above-mentioned term is not necessarily referred to identical embodiment or example.And specific features, structure, material or the feature of description can be with suitable mode combination in any one or more embodiment or example.
Although illustrated and described embodiments of the invention above, be understandable that, above-described embodiment is exemplary, can not be interpreted as limitation of the present invention, those of ordinary skill in the art can change above-described embodiment within the scope of the invention in the situation that not departing from principle of the present invention and aim, modification, replacement and modification.
Claims (11)
1. a preparation method for epitaxial wafer quantum well structure, is characterized in that, comprises the following steps:
Substrate is provided;
On described substrate, form intrinsic gallium nitride layer;
On described intrinsic gallium nitride layer, form the gallium nitride layer of the first kind;
On the gallium nitride layer of the described first kind, form the quantum well structure of gallium nitride/indium gallium nitrogen, wherein, gallium nitride quantum is built under the first temperature, the first pressure conditions, in the first atmosphere and is formed, and indium gallium nitrogen quantum well forms under the second temperature, the second pressure conditions, in the second atmosphere;
On described quantum well structure, form the gallium nitride layer of Second Type,
Wherein, described the first temperature is higher than described the second temperature, and described the first pressure is higher than the second pressure, and the specific heats of gases of described the first atmosphere are held lower than the specific heats of gases of described the second atmosphere and held.
2. the method for claim 1, is characterized in that, described the first atmosphere is helium, and described the second atmosphere is nitrogen.
3. the method for claim 1, is characterized in that, described the first atmosphere is helium nitrogen mixture gas, and described the second atmosphere is nitrogen.
4. the method for claim 1, is characterized in that, also comprises: between the gallium nitride layer of the described first kind and described quantum well structure, form stress release layer.
5. method as claimed in claim 4, is characterized in that, the multilayer indium gallium nitrogen sublayer that described stress release layer is alternating growth and the superlattice structure of nitride multilayer gallium sublayer.
6. method as claimed in claim 5, is characterized in that, every layer of described gallium nitride sublayer thickness is 15nm-85nm, and every layer of described indium gallium nitrogen sublayer thickness is 1nm-20nm.
7. the method for claim 1, is characterized in that, also comprises: between described quantum well structure and the gallium nitride layer of described Second Type, form barrier layer.
8. the method for claim 1, is characterized in that, repeats the step of the quantum well structure of n described formation gallium nitride/indium gallium nitrogen, to form multi-quantum pit structure, and wherein 2≤n≤25.
9. the method for claim 1, is characterized in that, described the first temperature is 800 ℃-900 ℃, and described the second temperature is 700 ℃-800 ℃.
10. the method for claim 1, is characterized in that, described the first pressure is 300mbr-500mbr, and described the second pressure is 100mbr-300mbr, and the difference of described the first pressure and the second pressure is 100mbr-400mbr.
11. methods as claimed in claim 7, is characterized in that, described barrier material is aluminum gallium nitride, and thickness is 20nm-60nm.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106299070A (en) * | 2016-09-30 | 2017-01-04 | 安徽三安光电有限公司 | A kind of emitting diode epitaxial layer and preparation method thereof |
| CN111081828A (en) * | 2019-10-21 | 2020-04-28 | 华灿光电(苏州）有限公司 | Growth method of Micro LED epitaxial wafer and Micro LED epitaxial wafer |
| CN115036402A (en) * | 2022-08-12 | 2022-09-09 | 江苏第三代半导体研究院有限公司 | Induced enhanced Micro-LED homoepitaxy structure and preparation method thereof |
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