CN105336830A - Method for preparing double-side dark ultraviolet light-emitting diode epitaxial wafer and chip - Google Patents
Method for preparing double-side dark ultraviolet light-emitting diode epitaxial wafer and chip Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 14
- 238000002360 preparation method Methods 0.000 claims abstract description 24
- 239000000758 substrate Substances 0.000 claims abstract description 18
- 230000004888 barrier function Effects 0.000 claims description 23
- 239000000463 material Substances 0.000 claims description 19
- 238000000151 deposition Methods 0.000 claims description 7
- 229910052799 carbon Inorganic materials 0.000 claims description 6
- 229910052594 sapphire Inorganic materials 0.000 claims description 5
- 239000010980 sapphire Substances 0.000 claims description 5
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 5
- 229910017083 AlN Inorganic materials 0.000 claims description 4
- 238000001459 lithography Methods 0.000 claims description 4
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 claims description 4
- 230000008020 evaporation Effects 0.000 claims description 3
- 238000001704 evaporation Methods 0.000 claims description 3
- 238000000137 annealing Methods 0.000 claims description 2
- 238000001816 cooling Methods 0.000 claims description 2
- 229910052751 metal Inorganic materials 0.000 claims description 2
- 239000002184 metal Substances 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 abstract description 4
- 230000000903 blocking effect Effects 0.000 abstract 1
- 230000006911 nucleation Effects 0.000 abstract 1
- 238000010899 nucleation Methods 0.000 abstract 1
- 238000002310 reflectometry Methods 0.000 abstract 1
- 229910002704 AlGaN Inorganic materials 0.000 description 13
- 230000007547 defect Effects 0.000 description 7
- 238000005530 etching Methods 0.000 description 7
- 239000007772 electrode material Substances 0.000 description 6
- 230000006378 damage Effects 0.000 description 5
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- 230000008569 process Effects 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000000605 extraction Methods 0.000 description 3
- 238000001020 plasma etching Methods 0.000 description 3
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- 150000001768 cations Chemical class 0.000 description 2
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- 229910052753 mercury Inorganic materials 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
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- 238000005566 electron beam evaporation Methods 0.000 description 1
- 230000008030 elimination Effects 0.000 description 1
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- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910002804 graphite Inorganic materials 0.000 description 1
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- 230000036541 health Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 229910052743 krypton Inorganic materials 0.000 description 1
- DNNSSWSSYDEUBZ-UHFFFAOYSA-N krypton atom Chemical compound [Kr] DNNSSWSSYDEUBZ-UHFFFAOYSA-N 0.000 description 1
- 238000001748 luminescence spectrum Methods 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/40—Materials therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
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- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
The invention discloses a method for preparing a double-side dark ultraviolet light-emitting diode epitaxial wafer and a chip and relates to the technical field of semiconductor devices. The epitaxial wafer sequentially comprises a substrate, a low-temperature AlN nucleation layer, a high-temperature AlN intrinsic layer, an intrinsic AlxGal-xN layer, an n-type AlxGal-xN layer, a AlyGal-yN/AlzGal-zN multiple-quantum well layer, a p-type AluGal-uN electronic blocking layer and a p-type AlxGal-nN layer from bottom to top. The invention further provides the chip prepared on the basis of the epitaxial wafer and the preparation method of the chip. According to the epitaxial wafer and the chip, DBR layers with high ultraviolet reflectivity are selected and adopted so that most ultraviolet can be reflected back. The method for preparing the dark ultraviolet diode chip is provided.
Description
Technical field
The present invention relates to technical field of semiconductor device, the preparation method of especially a kind of double-side deep ultraviolet diode epitaxial slice, chip.
Background technology
Compared to traditional ultra-violet light-emitting technology, as ultraviolet low pressure mercury lamp, the ultraviolet light-emitting diode of based semiconductor AlGaN material has many-sided advantage, concrete as: the life-span is long, can up to more than 50,000 hours; Need not warm-up time, reaction speed very fast (about 10-9 second); Luminescence spectrum is pure, within the FWHM of general glow peak can be controlled in 15nm; Volume is little, and reliability is high, easily makes minimum or array device; Be applicable to batch production; For solid light source, need not use mercury etc. to the extremely disagreeableness material of environment, be a kind of new ultra-violet light source of Green-pollution.Therefore, AlGaN base semiconductor deep-UV light-emitting diode has great application potential in a lot of field, as solidification, health care, sterilizing, obtains high-quality white light etc. by ultraviolet excitated fluorescent powder.
But the luminous efficiency of current AlGaN base ultraviolet light-emitting diode is also lower, particularly wavelength is shorter than the luminous efficiency of the ultraviolet light-emitting diode (UV-LED) of 320nm generally below 1%, and internal quantum efficiency is generally lower than 10%.The main cause of above-mentioned phenomenon is caused to have several aspect: to be that the defect concentration of AlGaN material is higher caused by the crystal mass of material on the one hand, to cause the low of internal quantum efficiency; Then selected to cause by device preparation technology and electrode material on the other hand.In the device typical production of LED, all need to use etching to prepare electrode, and etching often brings damage to AlGaN material.As everyone knows, for GaN material, the N room that etching injury causes occurs with shallow energy level alms giver, makes Fermi level close to conduction band on the contrary, thus obtains Ohm contact electrode than being easier to.Be different from GaN material, AlGaN material, particularly the AlGaN material of high Al contents is after plasma etching, N room is no longer shallow energy level alms giver, but exist as deep energy level defect, Fermi level can be made away from conduction band, thus make the preparation of Ohm contact electrode more difficult, cause the cut-in voltage of AlGaN base LED to increase; In addition on the one hand, most of material for ultraviolet particularly deep UV there is strong absorption, the electrode materials such as the Ti/Al/Ti/Au generally used at AlGaN base LED at present just so, simultaneously, because the doping efficiency of AlGaN material is lower, therefore, general electrode size is relatively large, thus the light extraction efficiency of LED is reduced further.
Select the problem that causes for above-mentioned due to device preparation technology and electrode material, do not have corresponding system scheme yet in the world at present, generally still adopt the mode of directly electrode evaporation after etching, and electrode material is also commonly Ti/Al/Ti/Au etc.
Summary of the invention
The object of the present invention is to provide the preparation method of a kind of double-side deep ultraviolet diode epitaxial slice, chip.The method improve in chip fabrication process and etch brought material damage and the light extraction efficiency that improve deep-UV light-emitting diode.
Technical scheme of the present invention is: the preparation method of a kind of double-side deep ultraviolet diode epitaxial slice, chip, and this epitaxial wafer, chip comprise substrate and stack gradually low temperature AI N nucleating layer, high-temperature AlN intrinsic layer, intrinsic Al on substrate
xga
1-xn layer, N-shaped Al
xga
1-xn layer, Al
yga
1-yn/Al
zga
1-zn multiple quantum well layer, p-type Al
uga
1-un electronic barrier layer, p-type Al
xga
1-xn layer; The preparation method of this epitaxial wafer, chip, its step: (1), on substrate, utilizes MOCVD technique, and described underlayer temperature is reduced to 600 DEG C, growing low temperature AlN nucleating layer; (2) on described low temperature AI N nucleating layer, growth temperature is elevated to 1300 DEG C, growth high-temperature AlN intrinsic layer; (3) on described high-temperature AlN intrinsic layer, growth temperature is remained on 1150 DEG C, growth intrinsic Al
xga
1-xn layer; (4) at described intrinsic Al
xga
1-xon N layer, growth temperature is remained on 1150 DEG C, growing n-type Al
xga
1-xn layer; (5) at described N-shaped Al
xga
1-xn goes up layer by layer, by growth temperature at 1050 DEG C, and growth Al
yga
1-yn/Al
zga
1-zn multiple quantum well layer; (6) growth temperature is remained on 1050 DEG C, at described Al
yga
1-yn/Al
zga
1-zon N multiple quantum well layer, growth p-type Al
uga
1-un electronic barrier layer; (7) growth temperature is remained on 1050 DEG C, at described p-type Al
uga
1-un electronic barrier layer grows p-type Al
xga
1-xn layer, forms double-side deep ultraviolet diode epitaxial slice epitaxial wafer; (8) greenhouse cooling to 800 DEG C is annealed under N2 environment to described epitaxial wafer; (9) described double-side deep ultraviolet diode epitaxial slice, chip is etched to N-shaped Al
xga
1-xn layer; (10) described epitaxial wafer is taken out, and at N-shaped Al
xga
1-xn layer table top makes the figure of n-type electrode by lithography, then at n-type electrode graph area depositing metal layers, and form n-type electrode when short annealing; (11) at the p-type Al of described epitaxial wafer
xga
1-xthe DBR material of first evaporation one deck high reflectance on N layer, then depositing p-type electrode.
Described substrate is sapphire, carborundum or AlN.
The thickness of described high-temperature AlN intrinsic layer is 0.3-100 micron.
Described intrinsic Al
xga
1-xthe Al component of N layer is 0-100%, and thickness is 0.1-10 micron.
Described N-shaped Al
xga
1-xthe Al component of N layer is 0-100%, and thickness is 0.1-10 micron.
Described Al
yga
1-yn/Al
zga
1-zthe Al component of N multiple quantum well layer is 0-100%, and thickness is 1-500 nanometer.
Described Al
yga
1-yn/Al
zga
1-zthe barrier layer thickness of N multiple quantum well layer is 5 ~ 20nm, and potential well layer thickness is 2 ~ 5nm, and the cycle of quantum well is 5 ~ 20.
Described p-type Al
uga
1-uthe Al component of N electronic barrier layer is 0-100%, and thickness is 1-200nm.
Described p-type Al
xga
1-xthe thickness of N layer is 50-500 nanometer.
The N-shaped Al of described epitaxial wafer
xga
1-xn-electrode is provided with, the p-type Al of described epitaxial wafer above N layer
xga
1-xbe provided with reflector layer DBR above N layer, then deposit p-electrode.
The invention has the advantages that: epitaxial wafer provided by the invention and chip selection adopt has the reflexive Al material of high ultraviolet light as electrode material, not only partly can eliminate by principal mode Al cation vacancy defect, also most of ultraviolet light can be reflected back.The preparation method of double-side deep ultraviolet diode epitaxial slice chip provided by the invention, epitaxial wafer passes through under suitable conditions at N
2+ NH
3ambient anneal, can partly eliminate N vacancy defect, thus reduces chip cut-in voltage.
Accompanying drawing explanation
Fig. 1 is a kind of double-side deep ultraviolet of the present invention diode epitaxial slice structural representation;
Fig. 2 is a kind of double-side deep ultraviolet of the present invention diode chip structure schematic diagram.
Embodiment
The preparation method of a kind of double-side deep ultraviolet diode epitaxial slice, chip, this epitaxial wafer, chip comprise: substrate, low temperature AI N nucleating layer is over the substrate set, is arranged on the high-temperature AlN intrinsic layer on described low temperature AI N nucleating layer, is arranged on the intrinsic Al on described high-temperature AlN intrinsic layer
xga
1-xn layer, is arranged on described intrinsic Al
xga
1-xn-Al on N layer
xga
1-xn layer, is arranged on described N-shaped Al
xga
1-xal on N layer
yga
1-yn/Al
zga
1-zn multiple quantum well layer, be arranged on described Al
yga
1-yn/Al
zga
1-zp-type Al on N multiple quantum well layer
uga
1-un electronic barrier layer, be arranged on described p-type Al
uga
1-up-type Al on N electronic barrier layer
xga
1-xn layer.
Further, described substrate is sapphire, carborundum or AlN.
Further, the thickness of described high-temperature AlN intrinsic layer is 0.3-100 micron.
Further, described intrinsic Al
xga
1-xthe Al component of N layer is 0-100%, and thickness is 0.1-10 micron.
Further, described N-shaped Al
xga
1-xthe Al component of N layer is 0-100%, and thickness is 0.1-10 micron.
Further, described Al
yga
1-yn/Al
zga
1-zthe Al component of N multiple quantum well layer is 0-100%, and thickness is 1-500 nanometer.
Further, described Al
yga
1-yn/Al
zga
1-zthe barrier layer thickness of N multiple quantum well layer is 12nm, and potential well layer thickness is 3nm, and the cycle of quantum well is 10.
Further, described p-type Al
uga
1-uthe Al component of N electronic barrier layer is 0-100%, and thickness is 1-200 nanometer.
Further, described p-type Al
xga
1-xthe thickness of N layer is 50-500 nanometer.
A kind of double-side deep ultraviolet diode epitaxial slice chip, comprises described epitaxial wafer, the N-shaped Al of described epitaxial wafer
xga
1-xn-electrode is provided with, the p-type Al of described epitaxial wafer above N layer
xga
1-xp-electrode is provided with above N layer.
Embodiment 1:
As shown in Figure 1, the present embodiment provides a kind of double-side deep ultraviolet diode epitaxial slice, comprising: substrate 101, arranges low temperature AI N nucleating layer 102 on the substrate 101, be arranged on the high-temperature AlN intrinsic layer 103 on low temperature AI N nucleating layer 102, be arranged on the intrinsic Al on high-temperature AlN intrinsic layer 103
xga
1-xn layer 104, is arranged on intrinsic Al
xga
1-xn-shaped Al on N layer 104
xga
1-xn layer 105, is arranged on N-shaped Al
xga
1-xal on N layer 105
yga
1-yn/Al
zga
1-zn multiple quantum well layer 106, be arranged on Al
yga
1-yn/Al
zga
1-zp-type Al on N multiple quantum well layer 106
uga
1-un electronic barrier layer 107, be arranged on p-type Al
uga
1-up-type Al on N electronic barrier layer 107
xga
1-xn layer 108.
In the present embodiment, substrate 101 is sapphire, carborundum or AlN; The thickness of low temperature AI N nucleating layer 102 is 20nm; The thickness of high-temperature AlN intrinsic layer 103 is between 0.3-100 micron, and preferably, thickness is 1000nm; Intrinsic Al
xga
1-xthe Al component of N layer 104 is 0-100%, and thickness is between 0.1-10 micron, and preferably, thickness is 300nm; N-shaped Al
xga
1-xthe Al component of N layer 105 is 0-100%, and thickness is between 0.1-10 micron, and preferably, thickness is 2500nm; Al
yga
1-yn/Al
zga
1-zthe Al component of N multiple quantum well layer 106 is 0-100%, and thickness is between 1-500 nanometer, and preferably, multiple quantum well layer barrier layer thickness is 12nm, and potential well layer thickness is 3nm, and the cycle of quantum well is 6; P-type Al
uga
1-uthe Al component of N electronic barrier layer 107 is 0-100%, and thickness is between 1-200 nanometer, and preferably, thickness is 20nm; P-type Al
xga
1-xthe thickness of N layer 108 is between 1-200 nanometer, and preferably, thickness is 100nm.
Embodiment 2:
As shown in Figure 2, the present embodiment provides a kind of double-side deep ultraviolet diode chip for backlight unit, comprises the epitaxial wafer described in embodiment 1, at the N-shaped Al of epitaxial wafer
xga
1-xn-electrode 109 is provided with, at the p-type Al of epitaxial wafer above N layer 105
xga
1-xbe provided with the reflexive DBR110 of high ultraviolet light above N layer 108, above metallic film 110, be provided with P-type electrode 111.
Embodiment 3:
The present embodiment provides a kind of preparation method of double-side deep ultraviolet diode epitaxial slice chip, specifically comprises the steps:
(1) on sapphire substrate, utilize MOCVD technique, underlayer temperature is reduced to 600 DEG C, growth thickness is the low temperature AI N nucleating layer of 20nm; Described substrate can also adopt carborundum or AlN;
(2) on low temperature AI N nucleating layer, growth temperature is elevated to 1300 DEG C, growth thickness is the high-temperature AlN intrinsic layer of 1000nm;
(3) on high-temperature AlN intrinsic layer, growth temperature is remained on 1150 DEG C, growth thickness is the intrinsic Al of 300nm
xga
1-xn layer;
(3) at intrinsic Al
xga
1-xon N layer, growth temperature remains on 1150 DEG C, and growth thickness is the N-shaped Al of 2500nm
xga
1-xn layer, N-shaped Al
xga
1-xn layer is that Si doping content is 10
19cm
-3al
0.55ga
0.45n layer;
(4) at N-shaped Al
xga
1-xn goes up layer by layer, growth temperature is down at 1050 DEG C, growth Al
yga
1-yn/Al
zga
1-zn multiple quantum well layer, Al
yga
1-yn/Al
zga
1-zn multiple quantum well layer is specially Al
0.5ga
0.5n/Al
0.3ga
0.7n multiple quantum well layer, Al
0.5ga
0.5n barrier layer thickness is 12nm, Al
0.3ga
0.7n potential well layer thickness is 3nm, and the cycle of quantum well is 6;
(5) growth temperature is remained on 1050 DEG C, at Al
yga
1-yn/Al
zga
1-zon N multiple quantum well layer, growth thickness is the p-type Al of 20nm
uga
1-un electronic barrier layer, p-type Al
uga
1-un electronic barrier layer is p-type Al
0.6ga
0.4n electronic barrier layer;
(6) growth temperature is remained on 1050 DEG C, at p-type Al
uga
1-uon N electronic barrier layer, growth thickness is the p-type Al of 100nm
xga
1-xn layer, forms double-side deep ultraviolet diode epitaxial slice;
(7) epitaxial wafer is positioned in the MOCVD reaction chamber that atmosphere is nitrogen and krypton or CVD reaction chamber and reacts, wherein N2:NH3=200:1 (mol ratio), reaction chamber pressure is 500Torr, the graphite base temperature being used for placing substrate in reaction chamber is 800 degrees Celsius, keeps 0.2h;
(8) on double-side deep ultraviolet diode epitaxial slice, make n-type area mesa pattern by lithography, then adopt ICP or RIE technique from top etch to the N-shaped AlxGa1-xN layer of double-side deep ultraviolet diode epitaxial slice;
(9) take out epitaxial wafer, adopt electron beam evaporation process to have the reflexive DBR of high ultraviolet light in p-type electrode pattern district deposition, metallic film is the DBR of thickness 10 ~ 500nm;
(10) depositing n-type electrode on the N-shaped AlxGa1-xN layer of epitaxial wafer;
(11) depositing n-type electrode on the p-type AlxGa1-xN layer of epitaxial wafer.
When the deep UV (ultraviolet light) diode chip for backlight unit using the embodiment of the present invention 3 to provide makes double-side deep ultraviolet diode epitaxial slice, the silicon dioxide passivation layer of 200nm need be deposited with PECVD, then Flip-chip solder joint metal deposition pattern is made by lithography, the silicon dioxide passivation layer on solder joint metal deposition pattern region is etched away by RIE technique, deposit 2 micron thickness AuSn solders with thermal evaporation process on the area again, complete element manufacturing.
In the etching process of n-AlGaN material, the spilling speed of Al, faster than Ga and N, easily causes N vacancy defect and is subject to principal mode Al cation vacancy defect.For N vacancy defect, the present invention passes through under suitable conditions at N
2+ NH
3ambient anneal, can partly eliminate; On this basis, select employing to have the reflexive DBR material of high ultraviolet light, most of ultraviolet light can be reflected back.
The invention solves in chip fabrication process owing to etching the problem of the damage of AlGaN material brought and the ohmic contact caused thus preparation difficulty; Meanwhile, on this basis, by adopting high ultraviolet light reflective material as electrode, reducing the extinction of electrode, improving the light extraction efficiency of AlGaN base ultraviolet light-emitting diode.Invention introduces the new technology of operability and repeated stronger elimination etching injury, the selection range of electrode material is expanded, prepares the corresponding reduction of difficulty of ohmic contact.
The above is most preferred embodiment of the present invention, is not limited to the present invention, and for a person skilled in the art, the present invention can have various modifications and variations.Within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. a preparation method for double-side deep ultraviolet diode epitaxial slice, chip, is characterized in that: this epitaxial wafer, chip comprise substrate and stack gradually low temperature AI N nucleating layer, high-temperature AlN intrinsic layer, intrinsic Al on substrate
xga
1-xn layer, N-shaped Al
xga
1-xn layer, Al
yga
1-yn/Al
zga
1-zn multiple quantum well layer, p-type Al
uga
1-un electronic barrier layer, p-type Al
xga
1-xn layer; The preparation method of this epitaxial wafer, chip, its step:
(1) on substrate, utilize MOCVD technique, described underlayer temperature is reduced to 600 DEG C, growing low temperature AlN nucleating layer;
(2) on described low temperature AI N nucleating layer, growth temperature is elevated to 1300 DEG C, growth high-temperature AlN intrinsic layer;
(3) on described high-temperature AlN intrinsic layer, growth temperature is remained on 1150 DEG C, growth intrinsic Al
xga
1-xn layer;
(4) at described intrinsic Al
xga
1-xon N layer, growth temperature is remained on 1150 DEG C, growing n-type Al
xga
1-xn layer;
(5) at described N-shaped Al
xga
1-xn goes up layer by layer, by growth temperature at 1050 DEG C, and growth Al
yga
1-yn/Al
zga
1-zn multiple quantum well layer;
(6) growth temperature is remained on 1050 DEG C, at described Al
yga
1-yn/Al
zga
1-zon N multiple quantum well layer, growth p-type Al
uga
1-un electronic barrier layer;
(7) growth temperature is remained on 1050 DEG C, at described p-type Al
uga
1-un electronic barrier layer grows p-type Al
xga
1-xn layer, forms double-side deep ultraviolet diode epitaxial slice;
(8) greenhouse cooling to 800 DEG C is annealed under N2 environment to described epitaxial wafer;
(9) described double-side deep ultraviolet diode epitaxial slice is etched to N-shaped Al
xga
1-xn layer;
(10) described epitaxial wafer is taken out, and at N-shaped Al
xga
1-xn layer table top makes the figure of n-type electrode by lithography, then at n-type electrode graph area depositing metal layers, and form n-type electrode when short annealing;
(11) at the p-type Al of described epitaxial wafer
xga
1-xthe DBR material of first evaporation one deck high reflectance on N layer, then depositing p-type electrode.
2. the preparation method of double-side deep ultraviolet diode epitaxial slice as claimed in claim 1, chip, is characterized in that: described substrate is sapphire, carborundum or AlN.
3. the preparation method of double-side deep ultraviolet diode epitaxial slice as claimed in claim 1, chip, is characterized in that: the thickness of described high-temperature AlN intrinsic layer is 0.3-100 micron.
4. the preparation method of double-side deep ultraviolet diode epitaxial slice as claimed in claim 1, chip, is characterized in that: described intrinsic Al
xga
1-xthe Al component of N layer is 0-100%, and thickness is 0.1-10 micron.
5. the preparation method of double-side deep ultraviolet diode epitaxial slice as claimed in claim 1, chip, is characterized in that: described N-shaped Al
xga
1-xthe Al component of N layer is 0-100%, and thickness is 0.1-10 micron.
6. the preparation method of double-side deep ultraviolet diode epitaxial slice as claimed in claim 1, chip, is characterized in that: described Al
yga
1-yn/Al
zga
1-zthe Al component of N multiple quantum well layer is 0-100%, and thickness is 1-500 nanometer.
7. the preparation method of double-side deep ultraviolet diode epitaxial slice as claimed in claim 6, chip, is characterized in that: described Al
yga
1-yn/Al
zga
1-zthe barrier layer thickness of N multiple quantum well layer is 5 ~ 20nm, and potential well layer thickness is 2 ~ 5nm, and the cycle of quantum well is 5 ~ 20.
8. the preparation method of double-side deep ultraviolet diode epitaxial slice as claimed in claim 1, chip, is characterized in that: described p-type Al
uga
1-uthe Al component of N electronic barrier layer is 0-100%, and thickness is 1-200nm.
9. the preparation method of double-side deep ultraviolet diode epitaxial slice as claimed in claim 1, chip, is characterized in that: described p-type Al
xga
1-xthe thickness of N layer is 50-500 nanometer.
10. the double-side deep ultraviolet diode epitaxial slice according to any one of right 1-8, the preparation method of chip, is characterized in that: the N-shaped Al of described epitaxial wafer
xga
1-xn-electrode is provided with, the p-type Al of described epitaxial wafer above N layer
xga
1-xbe provided with reflector layer DBR above N layer, then deposit p-electrode.
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| CN106025025A (en) * | 2016-06-08 | 2016-10-12 | 南通同方半导体有限公司 | Epitaxial growth method capable of improving deep-ultraviolet LED luminous performance |
| CN106784180A (en) * | 2016-12-06 | 2017-05-31 | 中国科学院半导体研究所 | The preparation method of UV LED device |
| CN107845708A (en) * | 2017-09-27 | 2018-03-27 | 华中科技大学鄂州工业技术研究院 | A kind of deep-UV light-emitting diode epitaxial wafer, chip and preparation method thereof |
| CN108365069A (en) * | 2018-02-06 | 2018-08-03 | 华南师范大学 | A kind of high brightness V-type polarization doping deep ultraviolet LED preparation methods |
| CN113594320A (en) * | 2021-06-11 | 2021-11-02 | 华灿光电（浙江）有限公司 | Epitaxial wafer of deep ultraviolet light emitting diode with bipolar AlN template layer |
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| CN106025025A (en) * | 2016-06-08 | 2016-10-12 | 南通同方半导体有限公司 | Epitaxial growth method capable of improving deep-ultraviolet LED luminous performance |
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| CN113745379A (en) * | 2021-09-02 | 2021-12-03 | 宁波安芯美半导体有限公司 | Deep ultraviolet LED epitaxial structure and preparation method thereof |
| CN113745379B (en) * | 2021-09-02 | 2024-02-02 | 宁波安芯美半导体有限公司 | Deep ultraviolet LED epitaxial structure and preparation method thereof |
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