CN103838513A - Method and device for dynamic control over memory reading and writing - Google Patents

Method and device for dynamic control over memory reading and writing Download PDF

Info

Publication number
CN103838513A
CN103838513A CN201210478958.2A CN201210478958A CN103838513A CN 103838513 A CN103838513 A CN 103838513A CN 201210478958 A CN201210478958 A CN 201210478958A CN 103838513 A CN103838513 A CN 103838513A
Authority
CN
China
Prior art keywords
request
write
buffer storage
data buffer
pending
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201210478958.2A
Other languages
Chinese (zh)
Inventor
刘辉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen ZTE Microelectronics Technology Co Ltd
Original Assignee
Shenzhen ZTE Microelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen ZTE Microelectronics Technology Co Ltd filed Critical Shenzhen ZTE Microelectronics Technology Co Ltd
Priority to CN201210478958.2A priority Critical patent/CN103838513A/en
Publication of CN103838513A publication Critical patent/CN103838513A/en
Pending legal-status Critical Current

Links

Images

Abstract

The invention provides a method and device for dynamic control over memory reading and writing. The method comprises the steps that the validity and the overtime property of a reading request to be processed currently output from a cache management queue are judged; the reading request to be processed currently is compared with the request content in an offset data caching queue, the request content in a writing request and data caching queue, and the request content in a to-be-processed request and data caching queue, and three condition marks are obtained; when it is determined that the reading request to be processed currently is valid and is not overtime and the three condition marks all express that a request identical to the reading request to be processed currently does not exist, the reading request to be processed currently is output to the request-to-be-processed and data caching queue to wait for being processed, and otherwise, the reading request to be processed currently is kept in a waiting state. By means of the method and device, the correctness of data reading and writing can be guaranteed, and the efficiency of reading and writing a memory bus can be improved to a large extent.

Description

The dynamic control method of memory read-write and device
Technical field
The present invention relates to data storage technology, be specifically related to the dynamic control of the read-write Memory of read-write requests output with conditions, relate in particular to a kind of dynamic control method and device of memory read-write.
Background technology
In the dynamic control of data stored memory (Memory) read-write, dynamically export reading and writing data request according to controlled condition, ensure the correctness of storage data, judge by condition whether bus adopts flowing water control and management, for the raising of bus efficiency, the maximization of system bandwidth, the lifting of the performance of system data storage has very large effect.
The dynamic control of data store M emory read-write, in general, can be divided into the dynamic control mode of read-write Memory request, the dynamically control way of output of controlled condition, and the dynamic arbitration output read-write requests queue cache management of controlling of cooperation and the flowing water control of reading and writing Memory bus.
Memory read-write requests conditionality is dynamically controlled, in other words sending by condition of read-write requests dynamically controlled and sent, issuing in process of the task of system itself, if the data between 2 subtasks of front and back exist overlapping, the correctness of data and the read-write efficiency of Memory are conflicting, this just requires last task not write in Memory, task next time can not be gone read data request, so just need in the process of processing, adopt sequential processes mode completely, if but adopt sequential processes mode completely, stream treatment is not got up like this, the bandwidth of read-write bus and time delay all do not reach the demand of system, can not solely adopt the processing mode of complete order, can not adopt the processing mode of request continuous wave output, although the former can ensure the correctness of data, to lose a lot of bandwidth from efficiency, bandwidth can not meet the demand of system, although the latter can ensure bandwidth traffic, do not ensure the correctness of data, overlapping task is more, the probability of error in data is just larger, need to reduce the time that controlled condition produces, while having equal request in controlled condition, by the processing mode of order, at this time to sacrifice bandwidth and ensure the correctness of data, but in the time not equating request, the output of request will continuous wave output processing, the bandwidth that ensures read-write maximizes, because issuing of system task is random, between different requests, the overlapping of request msg is also dynamic change, this just causes the output of read-write requests and the control of read-write Memory bus to change dynamically.
Dynamically the correct judgement of controlled condition becomes the key of dynamic output control, many times for the request that does not also write the data of Memory, all to store away and control by fifo queue (FIFO) or random access memory (RAM), so just cause each cycle (cycle) will read request condition and judge whether that equal request do not write Memory on the way, if had, current request is can not send, write Memory until equate the data of request, request is sent to go for again and is asked processing again, so just can ensure the correctness of system data in service, but FIFO writes and reads is comparison spended time.
Arbitration and flowing water control are dynamically to read and write the one of Memory maximizing efficiency to ensure, a kind of means of auxiliary control, can further raise the efficiency, many times the output of arbitration is that read-write requests processing last time finishes to discharge bus, read-write requests next time is just exported in arbitration, between 2 arbitrations, be certain to waste certain cycle in this manner, cause the utilization factor of bus not high, although can meet like this correctness of storage data, be difficult to meet system requirements for bus bandwidth and this arbitration mode of the exigent system of efficiency, be difficult to the maximization of guaranteed efficiency for this arbitration mode of dynamic control of Memory.
For the stream treatment of read-write Memory bus, it is a kind of mode of reading and writing bus management control, in other words adjacent 2 read/write address take the continuity of address bus and data bus with reading and writing data, annotate the utilization factor for bus, processing mode is in the past all the last time to be written to Memory completely, go again to process new read-write requests, cause address bus and the data bus of 2 requests to have bubble, cause the efficiency of bus not high, can have influence on to a certain extent the performance of system, greatly reduce like this speed of read-write, the speed of impact read-write.
Summary of the invention
The embodiment of the present invention provides a kind of dynamic control method and device of memory read-write, has the problem of conflict to solve the correctness of existing data and bus bandwidth flow.
The embodiment of the present invention provides a kind of dynamic control method of memory read-write, and the method comprises:
To carrying out legitimacy and overtime judgement from the current pending read request of buffer memory administration queue output;
By described current pending read request respectively with offset after request content in request content, write request and data buffer storage queue in data buffer storage queue and the request content in pending request and data buffer storage queue compare in real time, obtain three condition flags;
When definite legal, not overtime and described three condition flags of described current pending read request all represent not exist identical request, export described current pending read request to pending request and data buffer storage queue etc. pending, otherwise, this current pending read request is kept to waiting status.
Preferably, described method also comprises:
To carrying out legitimacy and overtime judgement from the current pending write request of write request and data buffer storage queue output;
When definite described current pending write request legal and not overtime, by described current pending write request write memory, otherwise, abandon described current pending write request.
Preferably, described current pending read request is carried out to legitimacy and overtime judgement before, described method also comprises:
The pending read request of arbitration output writes described cache management queue, in the time of described cache management queue full, stop arbitration output, when described cache management queue non-NULL and a upper request is illegal or overtime abandons or when processing finishes, export described current pending read request from described cache management queue; Or
Described to before carrying out legitimacy and overtime judgement from current pending write request, described method also comprises:
The pending write request of arbitration output writes described write request and data buffer storage queue, in the time of described write request and data buffer storage queue full, stop arbitration output, when described write request and data buffer storage queue non-NULL and a upper request is illegal or overtime abandons or when processing finishes, export described current pending write request from described write request and data buffer storage queue.
Preferably, described by described current pending request export to pending request and data buffer storage queue etc. pending after, the method also comprises:
In to the processing procedure of described current pending read request, prejudge in described pending request and data buffer storage queue and whether also have new request, if had, be transmitted the pre-service to next request in current pending read request, treat that described current pending read request processing finishes, directly process described next request; Wherein, the pretreatment time of described next request is less than to the processing time to described current pending read request.
Preferably, described processing to described current pending read request and to the pre-service of described next request include validity judgement, convert in address and read/write conflict detects.
Preferably, after described pending request and data buffer storage queue, described write request and data buffer storage queue and described counteracting, data buffer storage queue is the fifo queue that adopts the simulation of register group.
Preferably, when described current pending read request is offset when request for reading, by described current pending read request export to pending request and data buffer storage queue etc. pending after, the method also comprises:
According to this read offset request from internal memory sense data offset processing, data after treatment counteracting are write in write request and data buffer storage queue.
The embodiment of the present invention also provides a kind of device for controlling dynamically of memory read-write, and this device comprises:
Judge module, for carrying out legitimacy and overtime judgement to the current pending read request of exporting from buffer memory administration queue;
Mark obtains module, for by described current pending read request respectively with offset after request content in request content, write request and the data buffer storage queue of data buffer storage queue and pending request content in please the buffer queue of summed data compare in real time, obtain three condition flags;
Request dynamic control module, for all representing not exist identical request when definite legal, not overtime and described three condition flags of described current pending read request, export described current pending read request to pending request and data buffer storage queue etc. pending, otherwise, this current pending read request is kept to waiting status.
Preferably, described judge module, also for to carrying out legitimacy and overtime judgement from the current pending write request of write request and data buffer storage queue output;
Described request Dynamic control module, also for when determining that described current pending write request is legal and not overtime, by described current pending write request write memory, otherwise, abandon described current pending write request.
Preferably, described device also comprises: arbitration modules, for the pending read request of arbitration output is write to described cache management queue, determine in the time of described cache management queue full, stop arbitration output, when described cache management queue non-NULL and a upper request is illegal or overtime abandons or when processing finishes, export described current pending read request from described cache management queue; Or, the pending write request of arbitration output writes described write request and data buffer storage queue, in the time of described write request and data buffer storage queue full, stop arbitration output, when described write request and data buffer storage queue non-NULL and a upper request is illegal or overtime abandons or when processing finishes, export described current pending write request from described write request and data buffer storage queue.
Preferably, this device also comprises: flowing water control and management module, be used in the processing procedure to described current pending read request, prejudge in described pending request and data buffer storage queue and whether also have new request, if had, be transmitted the pre-service to next request in current pending read request, treat that described current pending read request processing finishes, directly process described next request; Wherein, the pretreatment time of described next request is less than to the processing time to described current pending read request.
Preferably, after described pending request and data buffer storage queue, described write request and data buffer storage queue and described counteracting, data buffer storage queue is the fifo queue that adopts the simulation of register group.
Preferably, in the time that described current pending read request is asked for reading to offset, this device also comprises:
Data offset processing module, for according to this read offset request offset processing from internal memory sense data, data after treatment counteracting are write in write request and data buffer storage queue.
Adopt said method and device, compared with prior art, mainly the control that has increased condition flag output, according to condition, the request of exporting is dynamically processed, the processing of order completely during according to condition, ensures data correctness, while not satisfying condition, continuous bubble-free output processing, ensures the bandwidth traffic of reading and writing; And the queue management of arbitration and flowing water control ensure in dynamic control process, after current read-write requests is responded or after being dropped, can read at once new read-write requests, go for and ask processing, can further improve readwrite bandwidth; Adopt controlled condition to control the dynamic output of Memory read-write, both can ensure the correctness that reads and writes data can ensure that again the readwrite bandwidth of reading and writing bus maximizes.
Brief description of the drawings
Fig. 1 is the Organization Chart of the device for controlling dynamically of memory read-write of the present invention;
Fig. 2 is the structural drawing of the device for controlling dynamically of memory read-write of the present invention;
Fig. 3 is the process flow diagram of the dynamic control method embodiment of memory read-write of the present invention;
Fig. 4 is the structural representation of the device for controlling dynamically embodiment of memory read-write of the present invention.
Embodiment
For making the object, technical solutions and advantages of the present invention clearer, hereinafter in connection with accompanying drawing, embodiments of the invention are elaborated.It should be noted that, in the situation that not conflicting, the combination in any mutually of the feature in embodiment and embodiment in the application.
As shown in Figure 1, it is the Organization Chart of the device for controlling dynamically of memory read-write of the present invention, wherein, arbitration output cache management and the control and management of read-write flowing water are the preconditions that Memory dynamically controls realization, it is a kind of supplementary means, just because of the management to arbitration output request buffer queue, illegally abandon or in current request processing finishes in current request, can from queue, read at once new request goes to process, can reduce the time of arbitration cost again, this is one of condition improving bus efficiency; The flowing water control and management of read-write requests, this control mode is in the process of current request processing, whether anticipation has new request, if there is the conversion of fulfiling validity judgement and address ahead of schedule, the prerequisite of the control and management of flowing water is the processing time that the conversion pretreatment time of validity judgement and address is less than current request, otherwise the data bus of 2 read-write requests and address bus are asked or can be alveolate, this be improve bus efficiency condition two; Request output dynamically control and the basic guarantee that is controlled at the two of dynamic condition output identification the maximization of efficiency and the correctness of business datum, time and according to the output of controlled condition, ensured the correctness of data, time and continuous output request processing ensures that bandwidth meets the requirement of system.So-called dynamic control is exactly, and in the time having controlled condition, according to output with conditions request, ensured the correctness of request msg, read-write processing that can maximum bandwidth when thering is no controlled condition, thus meet the demand of system performance.
The efficiency that above-mentioned framework is mainly applicable to the read-write bus to Memory requires very high and to require for the correctness that reads and writes data be also very high Memory read-write control system.
The dynamic control method of the memory read-write based on above-mentioned framework comprises:
Step 1, the current pending read request from buffer memory administration queue output is carried out to legitimacy and overtime judgement;
Step 2, by described current pending read request respectively with offset after request content in request content, write request and data buffer storage queue in data buffer storage queue and the request content in pending request and data buffer storage queue compare in real time, obtain three condition flags;
Step 3, all represent not exist identical request when definite legal, not overtime and described three condition flags of described current pending read request, export described current pending read request to pending request and data buffer storage queue etc. pending, otherwise, this current pending read request is kept to waiting status.
In addition, described method also comprises: to carrying out legitimacy and overtime judgement from the current pending write request of write request and data buffer storage queue output; When definite described current pending write request legal and not overtime, by described current pending write request write memory, otherwise, abandon current pending write request.
Concrete performing step, mainly comprises the following steps:
1, dynamically read and write the control of condition:
Concrete implementation following steps:
After S101, arbitration output request, meet dynamic output condition, legal, there is no overtime pending request be to manage in the form a team mode of row of REG, there are respectively pending request and data buffer storage queue, write request and data buffer storage queue and cache management queue, 16 of backups at most, can select suitable value according to actual conditions oneself, if these 3 16 REG form a team, row are all full, do not process Free up Memory, can control the output of arbitration and reading of buffer memory, be the new request of can not exporting again;
S102, the new request of every output, just shift LD successively of the request of backup, distributes the REG column space of forming a team to new request;
S103, to processing request counting, export one and process request counting+1, ask to finish dealing with counting-1, we just know in buffer queue to also have how many requests there is no processed completing like this, needs and the current request of sending relatively, are controlled sending of current pending request dynamically;
S104, each depositing formed a team to be listed as mark of each spatial placement, busy-idle condition;
S105, just know that according to the number of counting and register flag the request of the current processing that will send wants and which REG column space content comparison of forming a team;
S106, according to a mark that can current request send immediately of comparative result output.
2, controlled condition is dynamically exported read-write requests:
Concrete implementation following steps:
S201, judge the legitimacy of current pending request and overtime no, if legal and not overtime, current validity judgement condition flag is set for high;
The data buffer storage REG content comparison of row of forming a team after S202, current pending request and computing, if not do not equate, dynamic output controlled condition mark (being condition flag) is set for high, represent that current request allows output identification;
Wherein, after computing, data buffer storage REG forms a team to classify as a kind of form of expression of offsetting rear data buffer storage queue;
S203, current pending request and the request queue buffer memory REG that the writes Memory row content comparison of forming a team, if do not equate, dynamic output controlled condition is set and is masked as height, represent that current request allows output identification;
Wherein, the request queue buffer memory REG that writes Memory forms a team to classify as a kind of form of expression of write request and data buffer storage queue, it should be noted that, write request and data buffer storage queue are queued names;
S204, current pending request and pending buffer queue comparison of asking summed data, if do not equate, dynamic output controlled condition is set and is masked as height, represent that current request allows output identification;
Similarly, the pending buffer queue Ye Shiyige queued name that asks summed data;
Be above-mentioned steps 202-204 be by current pending request respectively with three queues in request content compare, according to comparative result, condition flag is set;
The 201-204 if S205 satisfies condition, current pending request could be exported the counteracting of doing data, for the counteracting computing of data; If do not satisfy condition 201, this request abandons at once, reads at once new request continue judgement from arbitration output buffer queue; If do not meet 202-204 any one condition wherein, this request is just waited for, is exported request until meet all conditions again.
Concrete implementation structure as shown in Figure 2.
3, the way to manage of request source arbitration output buffer queue:
S301, for arbitration output, logical fifo (output is without time delay) carrys out cache management, if fifo queue is full, arbitration is busy condition, stops arbitration and exports; If logical fifo is non-NULL, request sends read-write requests;
S302, read and write data interrelatedly, the data of writing Memory need to be read Memory data operation and obtain, and the request after computing will backup to queue buffer memory;
Queue buffer memory is also wanted in S303, the request of writing Memory;
Request between S304, register queue record 302 and 303.
4, the flowing water control of Memory read-write:
In order to ensure to read and write the data bus of Memory and taking continuously of address bus, improve the utilization factor of read-write bus, read-write control for Memory adopts flowing water control and management, in other words in the process of current request transmission data and address, judge first in advance whether queue the inside also has new request, if had, the once illegal property judgement of request on current request is transmitted, convert in address, read/write conflict detection etc., current data processing finishes, read/write address and read-write requests are suspended to the bus next data of processing granularity of read-write that get on by next cycle, avoid in bus, there is bubble, ensure the utilization factor of read-write bus 100%,
Concrete implementation following steps:
In S401, current request processing procedure, pre-judge whether request queue also has new read-write requests etc. pending, if had, read pre-service, do not wait for, until reading new request, queue non-NULL processes the request processing ensureing in very first time response queue.
S402, to pre-reading or new read-write requests is carried out validity checking, if legal, legitimacy mark is set, otherwise abandons request, repeat S401 and continue to process.
S403, to pre-reading or new read-write requests is carried out the conversion processing of address, for the read-write of Memory, the address of in general asking and read and write Memory is inconsistent, has certain reduction formula between them, needs to convert before read-write.
If fulfiled ahead of schedule in S404 conversion and testing process, pretreated request is deposited with REG, until current request processing finishes to discharge bus, the pretreated request of lower cycle takies bus at once, ensures the maximization of read-write bus efficiency.
Above-mentioned memory read-write dynamic control method, be exactly by the flexible control to controlled condition, export dynamically read-write requests according to controlled condition, whether more whether before read-write requests output, need legal and have the request overlapping with current request in processing, not write Memory, there is same request to adopt complete sequential processes mode, sacrifice bandwidth ensures the correctness of data, does not have same request just can process continuously, ensures the maximization of bandwidth; And the management of request source arbitration output queue and the way to manage to the control of Memory read-write employing flowing water are a kind of supplementary meanss, thereby both can have ensured the correctness reading and writing data, can largely improve again the efficiency of read-write Memory bus.
As shown in Figure 3, it is the process flow diagram of the dynamic control method embodiment of memory read-write of the present invention, concrete principle can be referring to Fig. 2, in this embodiment, request arbitration output, the object of arbitration is exactly which request responding system should process, the request of arbitration output first writes queue, managing by the non-dummy status of queue the request of sending processes, in the time of queue full, the rdreqbusy of arbitration will be set to busy condition, control the output of arbitration, the request of preventing is overflowed and is abandoned, the request of finding that there is will be processed, illegally abandon or current request application completes condition and automatically reads next request and process according to the non-NULL of queue or current time stamp, the request of reading not is at once processed, but will be through a kind of dynamic real-time judgement, first judgement is legitimacy, request is made up of some contents, whether these contents are legal, and the scheduling of system task also has regular hour property, if any one is illegal for content and time range, current request is considered to illegal so, abandon.Adopt dynamic read-write to control, exactly in order to ensure the read-write efficiency of correctness and bus of data, the guarantee of data correctness is exactly to read the business datum needing, in the interference cancellation system of baseband chip, system issues the task of scheduling, the content of sometimes reading and writing between 2 tasks be have overlapping, be exactly that so-called part is benefited, must ensure that last task writes in Memory, a rear subtask could go to process, whole control procedure is the realization of flowing water control, control procedure is carried out buffer memory to a lot of requests, current request will be exported processing, the request the inside of buffer memory is to have the timestamp equal with current request, because a rear task requests will be utilized the result of the previous task requests equating with him, previous task requests task must first be write Memory, could process current request.There is the request of 3 kinds of buffer memorys need to judge comparison: data buffer storage queue after offsetting, the buffer memory of write request and data buffer storage queue, and pending buffer queue of asking summed data, above-mentioned buffer queue is not the queue on true meaning, it is the FIFO control mode that adopts the simulation of REG group, can reduce like this output and control the time of mark, the processing request of output also can be sent in time, do like this and must lose part bandwidth and complete this process, but system can not be lost bandwidth always like this, when not relating to while stabbing overlapping task task time, request is not need to wait for, the efficiency of read-write bus bandwidth must maximize.
Above-described embodiment is exactly according to the mode of rationally dynamically controlling read-write Memory, effectively removes to read and write Memory; Reduce the bubble in read-write bus, improve the bandwidth of read-write bus, the correctness that guarantee reads and writes data, thus meet performance requirements.
The embodiment of the present invention also provides a kind of device for controlling dynamically of memory read-write, and as shown in Figure 4, this device comprises:
Judge module 41, for carrying out legitimacy and overtime judgement to the current pending read request of exporting from buffer memory administration queue;
Mark obtains module 42, for by described current pending read request respectively with offset after request content in request content, write request and the data buffer storage queue of data buffer storage queue and pending request content in please the buffer queue of summed data compare in real time, obtain three condition flags;
Request dynamic control module 43, for all representing not exist identical request when definite legal, not overtime and described three condition flags of described current pending read request, export described current pending read request to pending request and data buffer storage queue etc. pending, otherwise, this current pending read request is kept to waiting status.
Similarly, for pending write request, described judge module, also for to carrying out legitimacy and overtime judgement from the current pending write request of write request and data buffer storage queue output; This request dynamic control module, also for when determining that described current pending write request is legal and not overtime, by described current pending write request write memory, otherwise, abandon current pending write request.
In addition, described device also comprises: arbitration modules 44, for the pending read request of arbitration output is write to described cache management queue, determine in the time of described cache management queue full, stop arbitration output, when described cache management queue non-NULL and a upper request is illegal or overtime abandons or when processing finishes, export described current pending read request from described cache management queue; Or, the pending write request of arbitration output writes described write request and data buffer storage queue, in the time of described write request and data buffer storage queue full, stop arbitration output, when described write request and data buffer storage queue non-NULL and a upper request is illegal or overtime abandons or when processing finishes, export described current pending write request from described write request and data buffer storage queue.
Further, this device also comprises: flowing water control and management module 45, be used in the processing procedure to described current pending read request, prejudge in described pending request and data buffer storage queue and whether also have new request, if had, be transmitted the pre-service to next request in current pending read request, treat that described current pending read request processing finishes, directly process described next request; Wherein, the pretreatment time of described next request is less than to the processing time to described current pending read request.
Wherein, after described pending request and data buffer storage queue, described write request and data buffer storage queue and described counteracting, data buffer storage queue is the fifo queue that adopts the simulation of register group.
In addition, in the time that described current pending read request is asked for reading to offset, this device also comprises: data offset processing module 46, for according to this read offset request offset processing from internal memory sense data, data after treatment counteracting are write in write request and data buffer storage queue.
Fig. 4 is the virtual architecture figure of the device for controlling dynamically of memory read-write, and Fig. 1 is refinement more, but the two based on principle and the content of expression identical.
The device for controlling dynamically of above-mentioned memory read-write, according to the mode of rationally dynamically controlling read-write Memory, effectively removes to read and write Memory; Reduce the bubble in read-write bus, improve the bandwidth of read-write bus, the correctness that guarantee reads and writes data, thus meet performance requirements.
One of ordinary skill in the art will appreciate that all or part of step in said method can carry out instruction related hardware by program and complete, said procedure can be stored in computer-readable recording medium, as ROM (read-only memory), disk or CD etc.Alternatively, all or part of step of above-described embodiment also can realize with one or more integrated circuit.Correspondingly, the each module/unit in above-described embodiment can adopt the form of hardware to realize, and also can adopt the form of software function module to realize.The present invention is not restricted to the combination of the hardware and software of any particular form.
Above embodiment is only unrestricted in order to technical scheme of the present invention to be described, only with reference to preferred embodiment, the present invention is had been described in detail.Those of ordinary skill in the art should be appreciated that and can modify or be equal to replacement technical scheme of the present invention, and do not depart from the spirit and scope of technical solution of the present invention, all should be encompassed in the middle of claim scope of the present invention.

Claims (13)

1. a dynamic control method for memory read-write, is characterized in that, the method comprises:
To carrying out legitimacy and overtime judgement from the current pending read request of buffer memory administration queue output;
By described current pending read request respectively with offset after request content in request content, write request and data buffer storage queue in data buffer storage queue and the request content in pending request and data buffer storage queue compare in real time, obtain three condition flags;
When definite legal, not overtime and described three condition flags of described current pending read request all represent not exist identical request, export described current pending read request to pending request and data buffer storage queue etc. pending, otherwise, this current pending read request is kept to waiting status.
2. method according to claim 1, is characterized in that, described method also comprises:
To carrying out legitimacy and overtime judgement from the current pending write request of write request and data buffer storage queue output;
When definite described current pending write request legal and not overtime, by described current pending write request write memory, otherwise, abandon described current pending write request.
3. method according to claim 1 and 2, is characterized in that:
Described current pending read request is carried out to legitimacy and overtime judgement before, described method also comprises:
The pending read request of arbitration output writes described cache management queue, in the time of described cache management queue full, stop arbitration output, when described cache management queue non-NULL and a upper request is illegal or overtime abandons or when processing finishes, export described current pending read request from described cache management queue; Or
Described to before carrying out legitimacy and overtime judgement from current pending write request, described method also comprises:
The pending write request of arbitration output writes described write request and data buffer storage queue, in the time of described write request and data buffer storage queue full, stop arbitration output, when described write request and data buffer storage queue non-NULL and a upper request is illegal or overtime abandons or when processing finishes, export described current pending write request from described write request and data buffer storage queue.
4. method according to claim 1 and 2, is characterized in that:
Described by described current pending request export to pending request and data buffer storage queue etc. pending after, the method also comprises:
In to the processing procedure of described current pending read request, prejudge in described pending request and data buffer storage queue and whether also have new request, if had, be transmitted the pre-service to next request in current pending read request, treat that described current pending read request processing finishes, directly process described next request; Wherein, the pretreatment time of described next request is less than to the processing time to described current pending read request.
5. method according to claim 4, is characterized in that:
Described processing to described current pending read request and to the pre-service of described next request include validity judgement, convert in address and read/write conflict detects.
6. method according to claim 1 and 2, is characterized in that:
After described pending request and data buffer storage queue, described write request and data buffer storage queue and described counteracting, data buffer storage queue is the fifo queue that adopts the simulation of register group.
7. method according to claim 1 and 2, is characterized in that:
When described current pending read request is offset when request for reading, by described current pending read request export to pending request and data buffer storage queue etc. pending after, the method also comprises:
According to this read offset request from internal memory sense data offset processing, data after treatment counteracting are write in write request and data buffer storage queue.
8. a device for controlling dynamically for memory read-write, is characterized in that, this device comprises:
Judge module, for carrying out legitimacy and overtime judgement to the current pending read request of exporting from buffer memory administration queue;
Mark obtains module, for by described current pending read request respectively with offset after request content in request content, write request and the data buffer storage queue of data buffer storage queue and pending request content in please the buffer queue of summed data compare in real time, obtain three condition flags;
Request dynamic control module, for all representing not exist identical request when definite legal, not overtime and described three condition flags of described current pending read request, export described current pending read request to pending request and data buffer storage queue etc. pending, otherwise, this current pending read request is kept to waiting status.
9. device according to claim 8, is characterized in that:
Described judge module, also for to carrying out legitimacy and overtime judgement from the current pending write request of write request and data buffer storage queue output;
Described request Dynamic control module, also for when determining that described current pending write request is legal and not overtime, by described current pending write request write memory, otherwise, abandon described current pending write request.
10. device according to claim 8 or claim 9, is characterized in that, described device also comprises:
Arbitration modules, for the pending read request of arbitration output is write to described cache management queue, determine in the time of described cache management queue full, stop arbitration output, when described cache management queue non-NULL and a upper request is illegal or overtime abandons or when processing finishes, export described current pending read request from described cache management queue; Or, the pending write request of arbitration output writes described write request and data buffer storage queue, in the time of described write request and data buffer storage queue full, stop arbitration output, when described write request and data buffer storage queue non-NULL and a upper request is illegal or overtime abandons or when processing finishes, export described current pending write request from described write request and data buffer storage queue.
11. devices according to claim 8 or claim 9, is characterized in that, this device also comprises:
Flowing water control and management module, be used in the processing procedure to described current pending read request, prejudge in described pending request and data buffer storage queue and whether also have new request, if had, be transmitted the pre-service to next request in current pending read request, treat that described current pending read request processing finishes, directly process described next request; Wherein, the pretreatment time of described next request is less than to the processing time to described current pending read request.
12. devices according to claim 8 or claim 9, is characterized in that:
After described pending request and data buffer storage queue, described write request and data buffer storage queue and described counteracting, data buffer storage queue is the fifo queue that adopts the simulation of register group.
13. devices according to claim 8 or claim 9, is characterized in that, when described current pending read request is when reading to offset request, this device also comprises:
Data offset processing module, for according to this read offset request offset processing from internal memory sense data, data after treatment counteracting are write in write request and data buffer storage queue.
CN201210478958.2A 2012-11-22 2012-11-22 Method and device for dynamic control over memory reading and writing Pending CN103838513A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201210478958.2A CN103838513A (en) 2012-11-22 2012-11-22 Method and device for dynamic control over memory reading and writing

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201210478958.2A CN103838513A (en) 2012-11-22 2012-11-22 Method and device for dynamic control over memory reading and writing

Publications (1)

Publication Number Publication Date
CN103838513A true CN103838513A (en) 2014-06-04

Family

ID=50802069

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201210478958.2A Pending CN103838513A (en) 2012-11-22 2012-11-22 Method and device for dynamic control over memory reading and writing

Country Status (1)

Country Link
CN (1) CN103838513A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106412630A (en) * 2016-09-23 2017-02-15 Tcl集团股份有限公司 Video list switch control method and apparatus
WO2018121740A1 (en) * 2016-12-30 2018-07-05 北京奇虎科技有限公司 Method and device for concurrent reading and writing of stream data
CN109739660A (en) * 2018-12-24 2019-05-10 新华三技术有限公司合肥分公司 Unexpected message processing method and processing device
CN111352657A (en) * 2018-12-21 2020-06-30 上海都森电子科技有限公司 Method for reading x86 data by FPGA high-speed and high-efficiency running water
CN116680089A (en) * 2023-08-03 2023-09-01 上海登临科技有限公司 Access control structure, access control method, memory system, processor and electronic equipment

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101304373A (en) * 2008-06-25 2008-11-12 中兴通讯股份有限公司 Method and system for implementing high-efficiency transmission chunk data in LAN
CN101317419A (en) * 2006-04-24 2008-12-03 华为技术有限公司 Operation processing method and device, service operation validity decision method and server
CN101707742A (en) * 2009-11-03 2010-05-12 普天信息技术研究院有限公司 Method for realizing dynamic restructuring in trunking communication system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101317419A (en) * 2006-04-24 2008-12-03 华为技术有限公司 Operation processing method and device, service operation validity decision method and server
CN101304373A (en) * 2008-06-25 2008-11-12 中兴通讯股份有限公司 Method and system for implementing high-efficiency transmission chunk data in LAN
CN101707742A (en) * 2009-11-03 2010-05-12 普天信息技术研究院有限公司 Method for realizing dynamic restructuring in trunking communication system

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106412630A (en) * 2016-09-23 2017-02-15 Tcl集团股份有限公司 Video list switch control method and apparatus
CN106412630B (en) * 2016-09-23 2020-01-03 Tcl集团股份有限公司 Video list switching control method and device
WO2018121740A1 (en) * 2016-12-30 2018-07-05 北京奇虎科技有限公司 Method and device for concurrent reading and writing of stream data
CN111352657A (en) * 2018-12-21 2020-06-30 上海都森电子科技有限公司 Method for reading x86 data by FPGA high-speed and high-efficiency running water
CN111352657B (en) * 2018-12-21 2023-04-25 上海都森电子科技有限公司 Method for reading x86 data by FPGA (field programmable gate array) in high-speed and high-efficiency pipelining manner
CN109739660A (en) * 2018-12-24 2019-05-10 新华三技术有限公司合肥分公司 Unexpected message processing method and processing device
CN109739660B (en) * 2018-12-24 2020-10-16 新华三技术有限公司合肥分公司 Abnormal message processing method and device
CN116680089A (en) * 2023-08-03 2023-09-01 上海登临科技有限公司 Access control structure, access control method, memory system, processor and electronic equipment
CN116680089B (en) * 2023-08-03 2023-11-14 上海登临科技有限公司 Access control structure, access control method, memory system, processor and electronic equipment

Similar Documents

Publication Publication Date Title
US8321614B2 (en) Dynamic scheduling interrupt controller for multiprocessors
EP2686774B1 (en) Memory interface
WO2022156370A1 (en) Fpga-based dma device and dma data migration method
CN103838513A (en) Method and device for dynamic control over memory reading and writing
US6868087B1 (en) Request queue manager in transfer controller with hub and ports
CN103425538A (en) Process communication method and process communication system
JPS61109164A (en) Bus control
CN103543954A (en) Data storage management method and device
CN102331977A (en) Memory controller, processor system and memory access control method
CN104102542A (en) Network data packet processing method and device
CN102402422B (en) The method that processor module and this assembly internal memory are shared
CN112948293A (en) DDR arbiter and DDR controller chip of multi-user interface
CN108470008B (en) Serial port data read-write method and device, computer equipment and storage medium
CN101075220A (en) Simulator and method for bus arbitraction
US20120185672A1 (en) Local-only synchronizing operations
CN115586943B (en) Hardware marking implementation method for dirty pages of virtual machine of intelligent network card
CN114579319B (en) Video memory management method, video memory management module, SOC and electronic equipment
CN101441608A (en) Multi-source access control device and method of register
CN110083657A (en) Data interchange method, apparatus, terminal and storage medium
CN101894084B (en) Device for writing operation in CLB bus
CN109145397A (en) A kind of external memory arbitration structure for supporting parallel pipelining process to access
CN1783203A (en) Hardware acceleration display horizontal line section device and method
CN112199205B (en) Program communication method between heterogeneous platforms
US8713205B2 (en) Data transfer device and data transfer method
CN105812620B (en) Data converter and its working method

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
WD01 Invention patent application deemed withdrawn after publication
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20140604