CN103825614A - High-speed low-power consumption analog-to-digital converter with wideband input - Google Patents
High-speed low-power consumption analog-to-digital converter with wideband input Download PDFInfo
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Abstract
The invention relates to a high-speed low-power consumption analog-to-digital converter with wideband input. The analog-to-digital converter is integrated with an input frequency monitoring module, a power consumption control module and a controlled analog-to-digital converter module. To be specific, the input frequency monitoring module consists of an input signal pre-processing circuit, a monitoring clock generating circuit and a frequency counting circuit; the power consumption control module includes a power consumption control logic circuit and a power consumption control output interface circuit; and the controlled analog-to-digital converter module includes a master bias circuit, a sampling holding circuit, an analog-digital conversion circuit and a coding output circuit. According to the invention, on the basis of input signal frequency monitoring, flexible power consumption supply configuration is carried out on the controlled analog-to-digital converter module according to the speed requirement of the input signal, thereby realizing high-speed and low-power consumption balancing. Moreover, the provided high-speed low-power consumption analog-to-digital converter has characteristics of wideband inputting, high speed, low power consumption, and high flexibility and universality.
Description
Technical field
The present invention relates to a kind of high-speed low-power-consumption analog to digital converter of wideband input, belong to integrated circuit fields, the analog to digital converter being mainly used in as receiving under broadband signal initial conditions provides configurable power managed, with realize wideband input, at a high speed, the analog to digital converter of low-power consumption.
Background technology
Analog to digital converter (ADC) is one of basic components of contemporary electronic systems, by receiving, gather the analog signal of outside real world, and convert the digitally encoded signal that digital information processing system can be identified to, play the function served as bridge that connects real world and PC World.Along with the continuous development of semiconductor technology and device feature size continue dwindle, the speed of digital signal processing circuit module is more and more faster, particularly in applications such as radar, radio communication, high-speed data acquistion systems, the outside signal that receives is up to more than GHz, and this just requires analog to digital converter to have high speed, high-resolution and low-power consumption.Meanwhile, for fields such as industrial signal measurement, software wireless electrical domains, under different condition occasion, its frequency input signal is often different, requires analog to digital converter can process high-frequency signal input, again can compatible low frequency signal input.
One of existing solution analog to digital converter can processing signals incoming frequency design according to the highest, to meet signal quality and dynamic translation characteristic best within the scope of full power bandwidth, has the feature of high speed, high power consumption by the analog to digital converter of this principle design.This is necessary for high-frequency signal initial conditions, its weak point is under low-frequency input signal condition, can cause larger power wastage by the analog to digital converter of maximum speed optimal design, and analog to digital converter needs input signal spectrum to be processed wider, and the power consumption of waste is just more surprising.
Two of existing solution, adopt the different size analog to digital converter of friction speed, different power consumption according to the input signal of different frequency scope, the corresponding corresponding medium speed of employing of analog to digital converter, intermediate frequency input signal of low speed, low-power consumption, the analog to digital converter of medium power consumption of adopting of for example low-frequency input signal, high-frequency input signal adopts at a high speed, the analog to digital converter of high power consumption, and this solution can obtain minimum circuit power consumption.One of its deficiency is to need the analog to digital converter of different size, and the analog to digital converter of different size can not be general, can cause overlapping investment, has higher purchase cost; Two of its deficiency is that frequency input signal is unknown often, require in such cases user selecting at a high speed and between low-power consumption, if selection high-speed AD converter, can waste invest and power consumption, if select low-power consumption analog to digital converter, can face the not enough risk of speed, increase user's use difficulty.
Although the solution of above-mentioned two kinds of analog to digital converters also can realize the compromise of high-speed and low-power consumption to a certain extent, but when in the face of broadband signal input, be difficult to realize the balance of high speed, low-power consumption, wideband input, high-speed, these three variable relations that mutually restrict of low-power consumption be can not well process, flexibility and versatility lacked.
Summary of the invention
The object of the invention is to overcome the above-mentioned deficiency of prior art, a kind of high-speed low-power-consumption analog to digital converter of wideband input is provided, this analog to digital converter is by the detection to frequency input signal in advance, the power consumption of analog to digital converter is carried out to flexible configuration, thereby realize balance high-speed, low-power consumption, the present invention have wideband input, at a high speed, the feature of low-power consumption, there is better flexibility and versatility.
Above-mentioned purpose of the present invention is mainly achieved by following technical solution:
A kind of high-speed low-power-consumption analog to digital converter of wideband input, comprise incoming frequency monitoring modular, power consumption control module and controlled analog to digital converter module, wherein incoming frequency monitoring modular comprises input signal pre-process circuit, monitoring clock forming circuit and frequency counting circuit, power consumption control module comprises power consumption control logical circuit and power consumption control output interface circuit, wherein:
Input signal pre-process circuit: the signal that receives outside input, first the DC component in signal described in filtering, extract AC signal, then by the noise filtering in described AC signal, signal is amplified to shaping and form the first square-wave signal, and described the first square-wave signal is exported to frequency counting circuit;
Monitoring clock forming circuit: if from outside receive clock input signal, by frequency phase lock ring produce frequency constant and frequency be more than or equal to the second square-wave signal of described clock input signal frequency, and the second square-wave signal is exported to frequency counting circuit; If produce frequency monitoring clock signal independent, the circulation oscillator that frequency monitoring clock signal forms by signal amplification circuit and signal feedback circuit, produces the constant third party's ripple signal of frequency and exports to frequency counting circuit;
Frequency counting circuit: the second square-wave signal or the third party's ripple signal that receive the output of monitoring clock forming circuit, and the first square-wave signal of input signal pre-process circuit output, produce the time period of setting, within the described time period, frequency to the first square-wave signal is counted, and produce or proportional data encoding identical with the first square wave signal frequency, and described coded data signal is preserved, call for power consumption control module;
Power consumption control logical circuit: call the coded data signal of preserving in frequency counting circuit, after accidental error and error coded in filtering coded data signal, be divided into two paths of data code signal, the incoming frequency scope of a circuit-switched data code signal is wherein carried out segmentation and produced frequency range index signal, an other circuit-switched data code signal is carried out to decoding, obtain the coded data signal after decoding, and the coded data signal after described frequency range index signal and described decoding is exported to respectively to power consumption control output interface circuit;
Power consumption control output interface circuit: receive the coded data signal after power consumption control logical circuit reference frequency output index signal and decoding, after signal buffer memory, frequency range index signal is converted to the current signal that segmentation changes, the coded data signal after decoding is converted to continually varying current signal; And current signal or continually varying current signal that segmentation is changed are exported to controlled analog to digital converter module;
Controlled analog to digital converter module: the current signal or the continually varying current signal that receive the segmentation variation of power consumption control output interface circuit output, the size of the current signal of the current signal changing according to segmentation or the inner total biasing circuit of the size adjustment of continually varying current signal, or regulate the size of the current signal of biasing circuit in inner one or more module, realize the control to described controlled analog to digital converter power consumption.
In the high-speed low-power-consumption analog to digital converter of above-mentioned wideband input, input signal pre-process circuit comprises that a-c cycle extracts circuit, disturbing pulse filtering circuit, signal amplification circuit and signal transformation circuit.
In the high-speed low-power-consumption analog to digital converter of above-mentioned wideband input, in input signal pre-process circuit, also comprise frequency dividing circuit, frequency dividing circuit is exported to frequency counting circuit after the first square-wave signal of signal transformation circuit output is reduced to frequency.
In the high-speed low-power-consumption analog to digital converter of above-mentioned wideband input, if while monitoring clock forming circuit from outside receive clock input signal, monitoring clock forming circuit is the frequency phase lock ring that kam-frequency circuit, charge pump and low-pass filter circuit, voltage-controlled oscillator circuit and Fractional-N frequency circuit form.
In the high-speed low-power-consumption analog to digital converter of above-mentioned wideband input, frequency counting circuit comprises timer circuit, frequency counter circuit and data register circuit, wherein timer circuit receives the second square-wave signal or third party's ripple signal, produce the time period of setting, frequency counter circuit receives the first square-wave signal, the second square-wave signal or third party's ripple signal, within the described time period, frequency to the first square-wave signal is counted, and generation or proportional data encoding identical with the first square wave signal frequency, described coded data signal is kept in data register circuit, call for power consumption control module.
In the high-speed low-power-consumption analog to digital converter of above-mentioned wideband input, power consumption control logical circuit comprises counting error code elimination circuit, the judgement of incoming frequency scope and indicating circuit and coding and decoding circuit, wherein count error code elimination circuit and call the coded data signal of preserving in frequency counting circuit, after filtering accidental error and error coded, be divided into two paths of data code signal, one tunnel enters the judgement of incoming frequency scope, with indicating circuit, incoming frequency scope is carried out to segmentation to produce frequency range index signal, another road signal directly enters coding and decoding circuit and carries out decoding, produce the coded data signal after decoding, and the coded data signal after described frequency range index signal and described decoding is exported to respectively to power consumption control output interface circuit.
In the high-speed low-power-consumption analog to digital converter of above-mentioned wideband input, power consumption control output interface circuit comprises data buffering and drive circuit, variable current mirror circuit, the wherein coded data signal after frequency range index signal and the decoding of data buffering and the output of drive circuit reception power consumption control logical circuit, after signal buffer memory, coded data signal after frequency range index signal or decoding is sent into variable current mirror circuit, frequency range index signal is converted to the current signal that segmentation changes by variable current mirror circuit, coded data signal after decoding is converted to continually varying current signal, and current signal or continually varying current signal that segmentation is changed are exported to controlled analog to digital converter module.
In the high-speed low-power-consumption analog to digital converter of above-mentioned wideband input, controlled analog to digital converter comprises total biasing circuit, sampling hold circuit, analog to digital conversion circuit and coding output circuit, wherein total biasing circuit receives current signal or the continually varying current signal that in power consumption control output interface circuit, segmentation changes, regulate sampling hold circuit, analog to digital conversion circuit and the each blocks current size of coding output circuit, realize the sectional-regulated of described controlled analog-digital converter circuit overall power consumption or regulate continuously.
In the high-speed low-power-consumption analog to digital converter of above-mentioned wideband input, controlled analog to digital converter comprises sampling hold circuit, analog to digital conversion circuit and coding output circuit, wherein sampling hold circuit, analog to digital conversion circuit and coding output circuit comprise independent biasing circuit, described independent biasing circuit receives current signal or the continually varying current signal that in power consumption control output interface circuit, segmentation changes, the size of current of the corresponding sampling hold circuit of independent regulation or analog to digital conversion circuit or coding output circuit, thereby realize the sectional-regulated of described controlled analog-digital converter circuit local power consumption or regulate continuously.
The advantage of the present invention compared with having prior art scheme is:
(1), innovative design of the present invention the high-speed low-power-consumption analog to digital converter of a kind of wideband input, this analog to digital converter is by incoming frequency monitoring modular, power consumption control module and controlled analog to digital converter module integration are in one, by the detection to frequency input signal in advance, the power consumption of analog to digital converter is carried out to flexible configuration, thereby realize high-speed, the balance of low-power consumption, the invention solves prior art processing broadband signal dumb, power consumption serious waste of resources, equipment overlapping investment, implementation cost is large, user uses difficult problem, analog to digital converter of the present invention has wideband input, at a high speed, the feature of low-power consumption, there is better flexibility and versatility.
(2), analog to digital converter of the present invention is integrated incoming frequency monitoring modular, and by adopting frequency multiplication, the frequency division of input clock and input signal, or separate oscillators produces multiple technologies such as monitoring clock etc., reduce the measurement difficulty of frequency input signal, realize the frequency measurement of broadband signal input.
(3), the incoming frequency measurement of analog to digital converter of the present invention automatically carries out and completes, and without knowing in advance the frequency size of input signal, without manual intervention, reduced user and used difficulty, has good use flexibility.
(4), analog to digital converter of the present invention comprises special power consumption control module, automatically implement the frequency monitoring to input signal, and regulate the power consumption of controlled analog to digital converter to supply with according to frequency input signal, have implement little, the power consumption control of difficulty flexibly, realized at a high speed, the balance of low-power consumption.
(5) compared with multiple analog to digital converters that, analog to digital converter of the present invention need to adopt friction speed power consumption specification with different frequency input signal in prior art, the full rate that only needs an analog to digital converter just can realize varying input signal covers, avoid user's overlapping investment, effectively reduced user's purchase cost.
(6), analog to digital converter of the present invention is in meeting high-frequency signal input; automatic compatible low frequency signal input; and provide splendid power consumption control; therefore in the time that technology upgrading needs the analog to digital converter of more speed; user only need to change the analog to digital converter with feature of the present invention, just can adapt to new application demand, and has still kept the low cost of existing application demand, low-power consumption to cover; this contributes to improve the versatility of equipment, effectively protects user's equipment investment.
Accompanying drawing explanation
Fig. 1 is the general structure block diagram of the high-speed low-power-consumption analog to digital converter of wideband input of the present invention;
Fig. 2 is input signal preliminary treatment circuit structure block diagram of the present invention;
Fig. 3 is that the present invention monitors clock forming circuit structured flowchart (from outside receive clock input signal time);
Fig. 4 is that the present invention monitors clock forming circuit structured flowchart (when independent generation frequency monitoring clock signal);
Fig. 5 is frequency counting circuit structured flowchart of the present invention;
Fig. 6 is power consumption control logic circuit structure block diagram of the present invention;
Fig. 7 is power consumption control output interface circuit structured flowchart of the present invention;
Fig. 8 be in power consumption control output interface circuit of the present invention in variable current mirror circuit electric current be segmentation change circuit theory diagrams;
Fig. 9 be in power consumption control output interface circuit of the present invention in variable current mirror circuit electric current be continually varying circuit theory diagrams;
Figure 10 is that the power consumption control of the controlled analog to digital converter module of the present invention is a kind of circuit theory diagrams of local power consumption control.
Embodiment
Below in conjunction with the drawings and specific embodiments, the present invention is described in further detail:
Be illustrated in figure 1 the general structure block diagram of the high-speed low-power-consumption analog to digital converter of wideband input of the present invention, high-speed low-power-consumption analog to digital converter of the present invention comprises incoming frequency monitoring modular, power consumption control module, controlled analog to digital converter module as seen from the figure, and these functional modules can be integrated in an integrated circuit (IC) chip.Wherein incoming frequency monitoring modular comprises input signal pre-process circuit, monitoring clock forming circuit and frequency counting circuit, power consumption control module comprises power consumption control logical circuit and power consumption control output interface circuit, and controlled analog to digital converter module comprises total biasing circuit, sampling hold circuit, analog to digital conversion circuit, coding output circuit.
Be illustrated in figure 2 input signal preliminary treatment circuit structure block diagram of the present invention, input signal pre-process circuit comprises that a-c cycle extracts circuit 201, disturbing pulse filtering circuit 202, signal amplification circuit 203, signal transformation circuit 204, frequency dividing circuit 205 as seen from the figure.Input signal pre-process circuit receives the signal of outside input, first the DC component in filtered signal, extracts AC signal, then by the noise filtering in AC signal, signal is amplified to shaping and form the first square-wave signal, and the first square-wave signal is exported to frequency counting circuit.Wherein the effect of a-c cycle extraction circuit 201 is isolated DC level, extracts ac small signal voltage; The effect of disturbing pulse filtering circuit 202 is filtering noise interference signals, realizes the gating of frequency input signal; The amplitude of input signal is amplified to easy to handle degree by signal amplification circuit 203, for the larger input signal of amplitude not necessarily; Signal transformation circuit 204 is filtered signal shakes at edge, and identifies the low and high level value of input signal, and converts the first square-wave signal of output to, and this circuit is the Key Circuit of input signal pre-process circuit.Frequency dividing circuit 205 is optional circuit, frequency dividing circuit 205 is exported to frequency counting circuit after the first square-wave signal of signal transformation circuit output is reduced to frequency, this circuit is the signal input in order to process upper frequency, can reduce the signal intractability of frequency counting circuit after frequency dividing circuit 205.
Be illustrated in figure 3 the present invention and monitor clock forming circuit structured flowchart (from outside receive clock input signal time); Now this monitoring clock forming circuit comprises kam-frequency circuit 301, charge pump and low-pass filter circuit 302, voltage-controlled oscillator circuit 303 and Fractional-N frequency circuit 304, is a typical frequency phase lock loop circuit.The square wave output frequency of this module is N times of clock incoming frequency, N is integer or mark or decimal, to realize the frequency multiplication frequency division relation to clock incoming frequency, be shown in this enforcement schematic diagram, to monitor clock forming circuit to receive external clock input, by frequency phase lock ring produce frequency constant and frequency be more than or equal to the second square-wave signal of clock input signal frequency, and the second square-wave signal is exported to frequency counting circuit.
Be illustrated in figure 4 the present invention and monitor clock forming circuit structured flowchart (when independent generation frequency monitoring clock signal), now this monitoring clock forming circuit comprises signal amplification circuit 401 and signal feedback circuit 402, is a typical circulation pierce circuit.The feedback loop forming for signal amplification circuit 401 and feedback circuit 402, as long as meet the requirement of corresponding amplitude and phase place, just can produce third party's ripple signal output of stabilized frequency.Pierce circuit described in the present embodiment can be RC oscillator, LC oscillator, loop oscillator etc. all can independently produce the oscillator of stabilized frequency.Described in the present embodiment, monitoring clock forming circuit produces the constant third party's ripple signal of frequency by ring oscillator independently and exports to frequency counting circuit.
Be illustrated in figure 5 frequency counting circuit structured flowchart of the present invention, frequency counting circuit of the present invention comprises timer circuit 501, frequency counter circuit 502, data register circuit 503, wherein timer circuit 501 receives the second square-wave signal or third party's ripple signal, produce definite time period (this time period is for presetting), frequency counter circuit 502 receives the first square-wave signal, the second square-wave signal or third party's ripple signal, within this definite time period, frequency to the first square-wave signal is counted, and generation or proportional data encoding identical with the first square wave signal frequency, described coded data signal is kept in data register circuit, call for power consumption control module.
Be illustrated in figure 6 power consumption control logic circuit structure block diagram of the present invention, power consumption control logical circuit of the present invention comprises that counting error code is eliminated circuit 601, incoming frequency scope judges and indicating circuit 602, coding and decoding circuit 603 as seen from the figure.Wherein count error code elimination circuit 601 and call the coded data signal of preserving in frequency counting circuit, after filtering accidental error and error coded, be divided into two paths of data code signal, one tunnel enters the judgement of incoming frequency scope, with indicating circuit 602, incoming frequency scope is carried out to segmentation to produce frequency range index signal, another road signal directly enters coding and decoding circuit 603 and carries out decoding, produce the coded data signal after decoding, and the coded data signal after this frequency range index signal and this decoding is exported to respectively to power consumption control output interface circuit.
Be illustrated in figure 7 power consumption control output interface circuit structured flowchart of the present invention, power consumption control output interface circuit of the present invention comprises numeral buffering and drive circuit 701, variable current mirror circuit 702 as seen from the figure.Wherein data buffering and drive circuit 701 receive the coded data signal after frequency range index signal and the decoding of power consumption control logical circuit output, after signal buffer memory, coded data signal after frequency range index signal or decoding is sent into variable current mirror circuit 702, frequency range index signal is converted to the current signal that segmentation changes by variable current mirror circuit 702, and the coded data signal after decoding is converted to continually varying current signal; And current signal or continually varying current signal that segmentation is changed are exported to controlled analog to digital converter module.
Being illustrated in figure 8 in power consumption control output interface circuit of the present invention electric current in variable current mirror circuit is the circuit theory diagrams that segmentation changes, power consumption control electric current is that segmentation changes as seen from the figure, forms and comprises reference current 801, current mirror circuit 802, control switch array 803.Wherein current mirror circuit 802 comprises current source transistor MR1, N current mirror transistor M1 to Mn, control switch array 803 is made up of N switch S 1 to Sn, N switch is corresponding one by one with N current mirror transistor, N switch controlled with the power consumption control switching signal of frequency dependence by N, therefore by the control switch array 803 of various combination, just can obtain or proportional output current adjustable, i.e. described segmentation variable-current identical with frequency.In typical case, when control switch array 803 is by the frequency range index signal control of segmentation in advance, output current be adjustable and present segmentation change feature, described power consumption control variable current be segmentation change.
Being illustrated in figure 9 in power consumption control output interface circuit of the present invention electric current in variable current mirror circuit is continually varying circuit theory diagrams, power consumption control electric current is to change continuously as seen from the figure, and circuit formation comprises reference current 901, switch arrays 911, current source array 912.This module changeable current mirroring circuit is essentially a current mode digital-to-analog converter, wherein switch arrays 911 and current source array 912 form a current mode digital-to-analog converter 902, therefore the output current of continuous meticulous variation can be provided, operation principle is for receiving prime frequency data decoded signal and being connected to switch arrays 911, control current source array 912 and produce the output of continually varying electric current, power consumption control electric current is to change continuously.
The controlled analog to digital converter module of the present invention receives the power consumption control signal of incoming frequency monitoring modular, power consumption control logical AND interface module, change bias current voltage according to the frequency change of external signal input, carry out corresponding power consumption control, the power consumption control of the controlled analog to digital converter of the present invention is overall power control mode or local power consumption control mode.
Overall power control mode as shown in Figure 1, controlled analog to digital converter module comprises total biasing circuit, sampling hold circuit, analog to digital conversion circuit and coding output circuit, wherein total biasing circuit receives current signal or the continually varying current signal that in power consumption control output interface circuit, segmentation changes, regulate sampling hold circuit, analog to digital conversion circuit and the each blocks current size of coding output circuit, realize the sectional-regulated of controlled analog-digital converter circuit overall power consumption or regulate continuously.In general, adopting overall power control mode is a kind of power consumption control mode of the overall situation, can obtain best low power capabilities.In addition, for complete and pattern number converter (Flash ADC) equal modulus transducer, comparator number is numerous, circuit power consumption mainly concentrates on comparator, can take local power consumption control mode, main power consumption circuit element is implemented to current/voltage adjusting, i.e. local power consumption control of the present invention, and this mode is simply efficient.
For the power consumption control of the controlled analog to digital converter of the present invention is a kind of circuit theory diagrams of local power consumption control, form as seen from the figure controlled analog to digital converter module and comprise sampling hold circuit 1001, analog to digital conversion circuit 1003, coding output circuit 1004 as shown in figure 10.Wherein sampling hold circuit, analog to digital conversion circuit and coding output circuit comprise independent biasing circuit, this independent biasing circuit receives current signal or the continually varying current signal that in power consumption control output interface circuit, segmentation changes, the size of current of the corresponding sampling hold circuit of independent regulation or analog to digital conversion circuit or coding output circuit, thereby realize the sectional-regulated of controlled analog-digital converter circuit local power consumption or regulate continuously, for example independent biasing circuit 1002 receives the segmentation variable-current relevant to frequency input signal or continuous variable-current signal, and control analog to digital conversion circuit 1003, realization is to controlling the electric current of analog to digital conversion circuit 1003 and the sectional-regulated or adjusting continuously of power consumption.
Adopt the mode of local power consumption control, be specially adapted to exist power consumption circuit element more concentrated in controlled analog to digital converter, this concentrate can be certain class element circuit power consumption concentrate, as comparator array circuit, output driver element circuit etc., also can be that different classes of circuit is in concentrated position, comprise that physical location is concentrated or functional unit is concentrated, and any situation of being convenient to concentrate enforcement power consumption control.The mode that adopts local power consumption control, this mode is less on the impact of former analog to digital converter, and control circuit is relatively simple, implements difficulty less, is one power consumption control mode relatively preferably.
In a word, the present invention is by the monitoring to incoming frequency, and according to the rate request of input signal, controlled analog to digital converter is carried out to power consumption flexibly and supply with configuration, there is the advantages such as wideband input, low-power consumption, high-speed, low cost, enforcement difficulty are little, be applicable to various types of analog to digital converters, can be widely used in the fields such as broadband connections, high-speed signal acquisition, software radio, for broadband signal provides self adaptation, power managed flexibly.
The above; be only the embodiment of the best of the present invention, but protection scope of the present invention is not limited to this, is anyly familiar with in technical scope that those skilled in the art disclose in the present invention; the variation that can expect easily or replacement, within all should being encompassed in protection scope of the present invention.
The content not being described in detail in specification of the present invention belongs to professional and technical personnel in the field's known technology.
Claims (9)
1. the high-speed low-power-consumption analog to digital converter of a wideband input, it is characterized in that: comprise incoming frequency monitoring modular, power consumption control module and controlled analog to digital converter module, wherein incoming frequency monitoring modular comprises input signal pre-process circuit, monitoring clock forming circuit and frequency counting circuit, power consumption control module comprises power consumption control logical circuit and power consumption control output interface circuit, wherein:
Input signal pre-process circuit: the signal that receives outside input, first the DC component in signal described in filtering, extract AC signal, then by the noise filtering in described AC signal, signal is amplified to shaping and form the first square-wave signal, and described the first square-wave signal is exported to frequency counting circuit;
Monitoring clock forming circuit: if from outside receive clock input signal, by frequency phase lock ring produce frequency constant and frequency be more than or equal to the second square-wave signal of described clock input signal frequency, and the second square-wave signal is exported to frequency counting circuit; If produce frequency monitoring clock signal independent, the circulation oscillator that frequency monitoring clock signal forms by signal amplification circuit and signal feedback circuit, produces the constant third party's ripple signal of frequency and exports to frequency counting circuit;
Frequency counting circuit: the second square-wave signal or the third party's ripple signal that receive the output of monitoring clock forming circuit, and the first square-wave signal of input signal pre-process circuit output, produce the time period of setting, within the described time period, frequency to the first square-wave signal is counted, and produce or proportional data encoding identical with the first square wave signal frequency, and described coded data signal is preserved, call for power consumption control module;
Power consumption control logical circuit: call the coded data signal of preserving in frequency counting circuit, after accidental error and error coded in filtering coded data signal, be divided into two paths of data code signal, the incoming frequency scope of a circuit-switched data code signal is wherein carried out segmentation and produced frequency range index signal, an other circuit-switched data code signal is carried out to decoding, obtain the coded data signal after decoding, and the coded data signal after described frequency range index signal and described decoding is exported to respectively to power consumption control output interface circuit;
Power consumption control output interface circuit: receive the coded data signal after power consumption control logical circuit reference frequency output index signal and decoding, after signal buffer memory, frequency range index signal is converted to the current signal that segmentation changes, the coded data signal after decoding is converted to continually varying current signal; And current signal or continually varying current signal that segmentation is changed are exported to controlled analog to digital converter module;
Controlled analog to digital converter module: the current signal or the continually varying current signal that receive the segmentation variation of power consumption control output interface circuit output, the size of the current signal of the current signal changing according to segmentation or the inner total biasing circuit of the size adjustment of continually varying current signal, or regulate the size of the current signal of biasing circuit in inner one or more module, realize the control to described controlled analog to digital converter power consumption.
2. the high-speed low-power-consumption analog to digital converter of a kind of wideband input according to claim 1, is characterized in that: described input signal pre-process circuit comprises that a-c cycle extracts circuit, disturbing pulse filtering circuit, signal amplification circuit and signal transformation circuit.
3. the high-speed low-power-consumption analog to digital converter of a kind of wideband input according to claim 2, it is characterized in that: in described input signal pre-process circuit, also comprise frequency dividing circuit, frequency dividing circuit is exported to frequency counting circuit after the first square-wave signal of signal transformation circuit output is reduced to frequency.
4. the high-speed low-power-consumption analog to digital converter of a kind of wideband input according to claim 1, it is characterized in that: if while monitoring clock forming circuit from outside receive clock input signal, monitoring clock forming circuit is the frequency phase lock ring that kam-frequency circuit, charge pump and low-pass filter circuit, voltage-controlled oscillator circuit and Fractional-N frequency circuit form.
5. the high-speed low-power-consumption analog to digital converter of a kind of wideband input according to claim 1, it is characterized in that: described frequency counting circuit comprises timer circuit, frequency counter circuit and data register circuit, wherein timer circuit receives the second square-wave signal or third party's ripple signal, produce the time period of setting, frequency counter circuit receives the first square-wave signal, the second square-wave signal or third party's ripple signal, within the described time period, frequency to the first square-wave signal is counted, and generation or proportional data encoding identical with the first square wave signal frequency, described coded data signal is kept in data register circuit, call for power consumption control module.
6. the high-speed low-power-consumption analog to digital converter of a kind of wideband input according to claim 1, it is characterized in that: described power consumption control logical circuit comprises counting error code elimination circuit, the judgement of incoming frequency scope and indicating circuit and coding and decoding circuit, wherein count error code elimination circuit and call the coded data signal of preserving in frequency counting circuit, after filtering accidental error and error coded, be divided into two paths of data code signal, one tunnel enters the judgement of incoming frequency scope, with indicating circuit, incoming frequency scope is carried out to segmentation to produce frequency range index signal, another road signal directly enters coding and decoding circuit and carries out decoding, produce the coded data signal after decoding, and the coded data signal after described frequency range index signal and described decoding is exported to respectively to power consumption control output interface circuit.
7. the high-speed low-power-consumption analog to digital converter of a kind of wideband input according to claim 1, it is characterized in that: described power consumption control output interface circuit comprises data buffering and drive circuit, variable current mirror circuit, the wherein coded data signal after frequency range index signal and the decoding of data buffering and the output of drive circuit reception power consumption control logical circuit, after signal buffer memory, coded data signal after frequency range index signal or decoding is sent into variable current mirror circuit, frequency range index signal is converted to the current signal that segmentation changes by variable current mirror circuit, coded data signal after decoding is converted to continually varying current signal, and current signal or continually varying current signal that segmentation is changed are exported to controlled analog to digital converter module.
8. the high-speed low-power-consumption analog to digital converter of a kind of wideband input according to claim 1, it is characterized in that: described controlled analog to digital converter comprises total biasing circuit, sampling hold circuit, analog to digital conversion circuit and coding output circuit, wherein total biasing circuit receives current signal or the continually varying current signal that in power consumption control output interface circuit, segmentation changes, regulate sampling hold circuit, analog to digital conversion circuit and the each blocks current size of coding output circuit, realize the sectional-regulated of described controlled analog-digital converter circuit overall power consumption or regulate continuously.
9. the high-speed low-power-consumption analog to digital converter of a kind of wideband input according to claim 1, it is characterized in that: described controlled analog to digital converter comprises sampling hold circuit, analog to digital conversion circuit and coding output circuit, wherein sampling hold circuit, analog to digital conversion circuit and coding output circuit comprise independent biasing circuit, described independent biasing circuit receives current signal or the continually varying current signal that in power consumption control output interface circuit, segmentation changes, the size of current of the corresponding sampling hold circuit of independent regulation or analog to digital conversion circuit or coding output circuit, thereby realize the sectional-regulated of described controlled analog-digital converter circuit local power consumption or regulate continuously.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201410049304.7A CN103825614B (en) | 2014-02-12 | 2014-02-12 | A kind of high-speed low-power-consumption analog-digital converter of wideband input |
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| CN201410049304.7A CN103825614B (en) | 2014-02-12 | 2014-02-12 | A kind of high-speed low-power-consumption analog-digital converter of wideband input |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104917529A (en) * | 2015-07-01 | 2015-09-16 | 清华大学深圳研究生院 | Reconfigurable analog digital conversion device based on voltage-controlled oscillator |
| CN104980159A (en) * | 2015-06-29 | 2015-10-14 | 清华大学深圳研究生院 | Charge pump and voltage controlled-oscillator-based oversampling analog-digital converter |
| CN107852172A (en) * | 2015-07-16 | 2018-03-27 | 思睿逻辑国际半导体有限公司 | The voltage-controlled oscillator as the first order in analog-digital converter combined with the digital filter of second order or higher order noise shaping |
| CN112269421A (en) * | 2020-10-12 | 2021-01-26 | 天津大学 | Reference voltage generation circuit for reconfigurable SAR ADC |
| CN114632559A (en) * | 2022-01-26 | 2022-06-17 | 浙江大学 | On-chip micro-groove array digital PCR chip based on electrical impedance detection and manufacturing method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104980159A (en) * | 2015-06-29 | 2015-10-14 | 清华大学深圳研究生院 | Charge pump and voltage controlled-oscillator-based oversampling analog-digital converter |
| CN104980159B (en) * | 2015-06-29 | 2017-11-28 | 清华大学深圳研究生院 | A kind of oversampling analog-to-digital converter based on charge pump and voltage controlled oscillator |
| CN104917529A (en) * | 2015-07-01 | 2015-09-16 | 清华大学深圳研究生院 | Reconfigurable analog digital conversion device based on voltage-controlled oscillator |
| CN104917529B (en) * | 2015-07-01 | 2017-11-07 | 清华大学深圳研究生院 | A kind of analog-digital commutator based on voltage controlled oscillator of restructural |
| CN107852172A (en) * | 2015-07-16 | 2018-03-27 | 思睿逻辑国际半导体有限公司 | The voltage-controlled oscillator as the first order in analog-digital converter combined with the digital filter of second order or higher order noise shaping |
| CN112269421A (en) * | 2020-10-12 | 2021-01-26 | 天津大学 | Reference voltage generation circuit for reconfigurable SAR ADC |
| CN114632559A (en) * | 2022-01-26 | 2022-06-17 | 浙江大学 | On-chip micro-groove array digital PCR chip based on electrical impedance detection and manufacturing method thereof |
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