CN103824861A - Fin-like back gate storage structure and automatic refreshing method of floating body cells - Google Patents
Fin-like back gate storage structure and automatic refreshing method of floating body cells Download PDFInfo
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Abstract
The invention provides a fin-like back gate storage structure and an automatic refreshing method of floating body cells. A back gate is arranged on the upper surface of a substrate, a back gate oxide layer is arranged on the upper surface of the back gate, and a floating gate structure is arranged on the back gate oxide layer. Data writing can be finished with small voltage. As the automatic floating body cell refreshing technology is adopted, the maintaining time is greatly increased, power consumption is significantly reduced, and integration is high as the size of the storage cell is excessively small. A static random access memory whose single tube storage structure replaces the original six-tube memory cell can greatly reduce the area of CMOS processer chip and is applied to a technology node of no less than 28/20/14nm, the cost is reduced obviously, and the power consumption is significantly reduced.
Description
Technical field
The present invention relates to a kind of semiconductor device structure and technology of preparing thereof, relate in particular to a kind of fin-shaped back of the body storage organization of grid and the automatic method for refreshing of elemental floating body thereof.
Background technology
The memory cell that utilizes semiconductor technology to grow up, as dynamic random access memory (DRAM), static random access memory (SRAM), non-volatility memorizer (NVM) etc. are all widely used in various electronic products now.Along with the development of Moore's Law (Moore ' sLaw), memory component size is more and more less, and the open ended transistor size of unit are is increased, and speed is also more and more faster.Because the reading speed of DRAM, SRAM is very fast, be also integrated into gradually in SOC (system on a chip), to reach higher integrated level and performance.Take a four core processor chips of Intel as example, three grades of Caches in system, are embedded, on-chip cache (cache L1), second level cache device (cache L2) and three grades of shared caches (cache L3).Wherein second level cache and three grades of high-speed caches almost occupy chip area over half.Embedded static random access memory (eSRAM) is although access speed is fast, and basic unit of storage is six pipe units, and area occupied is large, and cost is high.Embedded DRAM (eDRAM) basic unit of storage is 1T1R, but capacity fall off phenomenon electric capacity need to usually upgrade (Refresh), and power consumption increases greatly, and along with size is dwindled, electric capacity, in order to reach enough magnitude of the stored charge, is a very large challenge in technique manufacture.
How to address the above problem, existing a kind of way utilizes elemental floating body to propose the single tube storage organization of a kind of similar dynamic random access memory (DRAM) exactly, reason is that its memory cell size can be low to moderate 4F2, thereby and utilize transistor floater effect to come in storage information structure without electric capacity, therefore scalability improves greatly.Be subject to extensive concern based on transistorized 1T DRAM at present, this is due to its good input and output current ratio and nondestructive read operation characteristic.One is the cross section of the 1T DRAM unit based on silicon-on-insulator (SOI) technology typically, as shown in Figure 1, elemental floating body 15(FBC) be positioned on one deck flush type oxide skin(coating) (BOX) 12, make raceway groove 15 and 11 times of substrate realize isolation.To the principle of this memory cell data writing as shown in Figure 2.In the time writing 1, grid end pulse voltage makes npn BJT transistor turns, and drain terminal 14 is high level, electronics injects and arrives drain terminal 14 by elemental floating body 15 from source 13, electronics produces electron hole pair in the process of accelerating, thereby can in raceway groove elemental floating body, form hole accumulation, now the state of elemental floating body is " 1 ".As shown in Figure 3, writing at 0 o'clock, evacuated by grid coupling hole, now the state of elemental floating body 15 is " 0 ".In reading information, if elemental floating body initial condition is " 1 ", so in the time that grid 16 level do not change, the conducting that can be triggered of BJT transistor, if initial condition is " 0 ", BJT transistor is remain off state so, by the readable taking-up storage of the detection of On current and cut-off current information.But this structure needs a large amount of power consumptions in the time of data writing, and still needs constantly to refresh because data hold time is short, has reduced reading speed.
In addition, traditional DRAM, due to the charge leakage problem of electric capacity, will refresh once in a period of time, such as just refreshing once every 64ms.Be in the dram chip of 1T1C standard at basic unit of storage, refresh process is all the every a line of periodic read memory each time, reads the data on each, then storage again, and such refresh process is in sequence, a line is followed a line.For example, for the DRAM of a 64Mbit, building form is 16Mbit*4, have 4096 row address bits, in order to refresh such memory, just must a line following a line reads 4096 times, for every a line of choosing, we must read each in this line, and amplify sense data by detection and again store command unit into again.Such refresh process can be wasted a large amount of power consumptions, and in storing process again, DRAM can not carry out other any operations, the large heavy discount of this performance to DRAM.
Chinese patent (publication number: CN103383961A) discloses a kind of FinFET structure and manufacture method, the fin-shaped channel district that employing is triangular prism shape substitutes rectangular-shaped fin-shaped channel district, the two sides of its protrusion forms relative crystal face crystal structure, reduce carrier scattering effect, improve charge storage, while being subject to the control of grid, more easily construct fin-shaped channel district and entirely exhaust structure, thoroughly cut off the conductive path of raceway groove, thereby the drive current that improves FinFET device, is applicable to the manufacture of the FinFET device of smaller szie and Geng Gao drive current.
Chinese patent (publication number: CN101207009B) discloses a kind of FinFET and manufacture method thereof, and this FinFET comprises: etching stopping layer, is positioned in Semiconductor substrate; Semiconductor fin, is positioned on etching stopping layer; Gate conductor layer, along extending perpendicular to the bearing of trend of fin, and at least covers two sides of semiconductor fin; Gate dielectric layer, is clipped between gate conductor layer and semiconductor fin; Source region and drain region, be positioned at the two ends of semiconductor fin; And dielectric spacer layer, below gate dielectric layer with etching stopping layer adjacency, for by gate conductor layer and etching stopping layer and the isolation of semiconductor fin electricity.The fin height of this FinFET is substantially equal to the thickness of the semiconductor layer that is used to form semiconductor fin.
Summary of the invention
The present invention proposes a kind of fin-shaped back of the body storage organization of grid and the automatic method for refreshing of elemental floating body thereof, only needing very little voltage just can complete data writes, and adopt the automatic refresh technique of elemental floating body, retention time increases greatly, significantly reduce power consumption, because memory cell size is also very little, integrated level is also very high simultaneously.The static random access memory that substitutes original six transistor memory unit structures with single tube storage organization of the present invention can significantly reduce CMOS processor chips area, and is applicable to the even following process node of 28/20/14nm, and cost obviously reduces, and power consumption also significantly declines.
The invention provides a kind of storage device based on fin-shaped back of the body gate bias, wherein, comprising:
One upper surface is provided with the substrate of back of the body grid, and the upper surface of described back of the body grid is provided with back of the body gate oxide; And the floating gate structure being arranged on described back of the body gate oxide.
State a kind of storage device based on fin-shaped back of the body gate bias, wherein, described floating gate structure comprises elemental floating body, gate oxide, fin-shaped grid;
Described elemental floating body covers the upper surface of described back of the body gate oxide, and described gate oxide covers upper surface and the sidewall thereof of described elemental floating body, and described fin-shaped grid covers the surface that described gate oxide exposes.
The above-mentioned storage device based on fin-shaped back of the body gate bias, wherein, described floating gate structure also includes source-drain electrode, and described source-drain electrode is positioned at the upper surface of described back of the body gate oxide.
The above-mentioned storage device based on fin-shaped back of the body gate bias, wherein, also comprise an insulating barrier, described insulating barrier covers described substrate top surface, and described back of the body grid and described back of the body gate oxide all embed and be arranged in this insulating barrier, described gate oxide and described fin-shaped grid all cover the described insulating barrier of part that closes on described back of the body gate oxide.
The above-mentioned storage device based on fin-shaped back of the body gate bias, wherein, the thickness of described back of the body gate oxide is that 20 Ethylmercurichlorendimides are to 120 Ethylmercurichlorendimides.
The present invention also provides a kind of elemental floating body automatic method for refreshing, is applied on several elemental floating bodies, and wherein, described method comprises:
In the time that the store status of described elemental floating body is stable state, on the grid of each described float structure, apply a voltage;
The refresh time that the store status of setting elemental floating body is " 1 " is the first refresh time, and the refresh time that the store status of setting elemental floating body is " 0 " is the second refresh time;
In described the first refresh time, be the elemental floating body cut-off of " 0 " by described store status, and described in conducting, store status is the elemental floating body of " 1 ", so that this store status is refreshed as the elemental floating body of " 1 ";
In described the second refresh time, be the elemental floating body cut-off of " 1 " by described store status, and described in conducting, store status is the elemental floating body of " 0 ", so that this store status is refreshed as the elemental floating body of " 0 ".
The automatic method for refreshing of above-mentioned elemental floating body, wherein, in described the first refresh time, the voltage that described fin-shaped grid applies is primary grid voltage, described primary grid voltage is higher than the threshold voltage of storage " 1 " elemental floating body, but is less than the threshold voltage of storage " 0 " elemental floating body.
The automatic method for refreshing of above-mentioned elemental floating body, wherein, in described the second refresh time, the voltage that described fin-shaped grid applies is second grid voltage, described second grid voltage is higher than the threshold voltage of storage " 0 " elemental floating body.
The automatic method for refreshing of above-mentioned elemental floating body, wherein, when the store status of described elemental floating body is stable state, the input voltage of described elemental floating body equals the output voltage of described elemental floating body.
The automatic method for refreshing of above-mentioned elemental floating body, is characterized in that, described storage organization comprises some floating gate structure, and each described floating gate structure includes elemental floating body, gate oxide, fin-shaped grid;
Described elemental floating body covers the upper surface of described back of the body gate oxide, and described gate oxide covers upper surface and the sidewall thereof of described elemental floating body, and described fin-shaped grid covers the surface that described gate oxide exposes.
The present invention has following technical advantage:
1, just can complete writing of data by very little voltage, reduce the power consumption of device.
The area that 2, can significantly reduce CMOS processor chips by single tube storage organization, has improved integrated level, and cost obviously reduces, and power consumption also significantly declines.
3, by the automatic method for refreshing of elemental floating body, the retention time increases greatly, and reading speed is also accelerated, and the performance of memory has obtained significant raising.
Accompanying drawing explanation
The accompanying drawing that forms a part of the present invention is used to provide a further understanding of the present invention, and schematic description and description of the present invention is used for explaining the present invention, does not form inappropriate limitation of the present invention.In the accompanying drawings:
Fig. 1 is the cross sectional representation of the 1T DRAM unit of prior art based on silicon-on-insulator (SOI) technology;
Fig. 2 is the 1T DRAM unit one writing storage principle schematic diagram of prior art based on silicon-on-insulator (SOI) technology;
Fig. 3 is that " 0 " storage principle schematic diagram is write in the 1T DRAM unit of prior art based on silicon-on-insulator (SOI) technology;
Fig. 4 is the stereogram of the storage organization of a kind of fin-shaped back of the body of the present invention grid;
Fig. 5 is the surface chart of the storage organization of a kind of fin-shaped back of the body of the present invention grid;
Fig. 6 is the principle schematic of the first storage principle elemental floating body storage 1;
Fig. 7 is the principle schematic of the first storage principle elemental floating body storage 0;
Fig. 8 is the leakage current-grid voltage curve of the first storage principle;
Fig. 9 is the principle schematic of the second storage principle elemental floating body storage 1;
Figure 10 is the principle schematic of the second storage principle elemental floating body storage 0;
Figure 11 is the leakage current-grid voltage curve of the second storage principle;
Figure 12 is the automatic flush mechanism schematic diagram of elemental floating body of the present invention;
Figure 13 is the change curve between input and output electric current and the elemental floating body bulk potential of elemental floating body;
Figure 14 is the voltage-time curve of the automatic method for refreshing of the present invention.
Embodiment
In conjunction with following specific embodiments and the drawings, the present invention is described in further detail.Implement process of the present invention, condition, experimental technique etc., except the content of mentioning specially below, be universal knowledege and the common practise of this area, the present invention is not particularly limited content.
The present invention is the storage organization based on a kind of fin-shaped back of the body grid, and Fig. 4 is the stereogram of the storage organization of a kind of fin-shaped back of the body of the present invention grid; Fig. 5 is the surface chart of the storage organization of a kind of fin-shaped back of the body of the present invention grid; As shown in Figure 3, wherein 1-substrate, 2-source-drain electrode, 3-gate oxide, 4-fin-shaped grid, 5-elemental floating body, 6-insulating barrier, 7-carries on the back gate oxide, and 8-carries on the back grid; 9-fin transistor, 10-floating gate structure.
Fin transistor 9 is a kind of new three-dimensional transistors, and the grid length of fin transistor 9 can be less than 25nm, and following expection can further be contracted to 9nm.In the present invention, in fin transistor 9, contain the substrate 1 that a upper surface is provided with back of the body grid 8, the upper surface of back of the body grid 8 is provided with back of the body gate oxide 7, the thickness of back of the body gate oxide 7 is can be at 20 Ethylmercurichlorendimides between 120 Ethylmercurichlorendimides, its leakage current back of the body gate oxide upper surface arranges a floating gate structure 10, and floating gate structure 10 comprises elemental floating body 5, gate oxide 3, fin-shaped grid 4; Elemental floating body 5 covers the upper surface of back of the body gate oxide 7, gate oxide 3 covers upper surface and the sidewall thereof of elemental floating body 5, fin-shaped grid 4 covers the surface that gate oxide 3 exposes, floating gate structure 10 also includes source-drain electrode 2, source-drain electrode 2 is positioned at the upper surface of back of the body gate oxide 7, in fin transistor 9, also comprise an insulating barrier 6, insulating barrier 6 covers substrate 1 upper surface, and back of the body grid 8 and back of the body gate oxide 7 all embed and are arranged in this insulating barrier 6, and gate oxide 3 and fin-shaped grid 4 all cover the partial insulative layer 6 that closes on back of the body gate oxide 7.
Fig. 6 is the principle schematic of the first storage principle elemental floating body storage 1; Fig. 7 is the principle schematic of the first storage principle elemental floating body storage 0; As shown in Figure 6, in the time that fin transistor writes 1, apply pulse voltage at fin-shaped grid 4, make fin transistor 9 conductings, and drain terminal is high potential, electronics injects and arrives drain terminal by elemental floating body 5 from source, electronics produces electron hole pair in the process of accelerating, the grid (BG) of now supporting or opposing add a little negative voltage, now just have a large amount of holes and are adsorbed on the back of the body gate oxide 7 of carrying on the back grid top, and now the state of elemental floating body is " 1 "; Now, owing to there being a large amount of holes in elemental floating body, fin transistor 9 threshold voltages decline.As shown in Figure 7, writing at 0 o'clock, applying a little positive voltage by the grid 8 of supporting or opposing, the hole being adsorbed on back of the body gate oxide 7 will be evacuated, and now the state of elemental floating body is " 0 ".Now in elemental floating body without hole accumulation, when writing " 0 " and comparing one writing, the threshold voltage of fin transistor 9 uprises.In the time of reading out data, can read the information of access by detecting drain terminal electric current, Fig. 8 is the leakage current-grid voltage curve of the first storage principle; As shown in Figure 8, the process that reads of the present embodiment is nondestructive.Can find out from above-mentioned storage principle, write to memory cell 0 or the grid that only need for 1 o'clock to support or oppose apply a little bias voltage, thereby can greatly reduce power consumption.
Fig. 9 is the principle schematic of the second storage principle elemental floating body storage 1; Figure 10 is the principle schematic of the second storage principle elemental floating body storage 0; The storage principle of the second can be based on trapped charge (charge trap, CT) memory, as shown in Figure 9, when storage " 0 " state, trapped electrons in elemental floating body 5 now applies a less malleation on back of the body grid 8, and electronics will be attracted on the back of the body gate oxide 7 of back of the body grid 8 tops; As shown in figure 10, and under one state, in elemental floating body 5, there is not trapped electrons, on back of the body grid 8, apply a less negative voltage, to disperse the electronics of absorption.In the time of reading out data, because " 0 " state has a large amount of electron accumulation, threshold voltage raises, leakage current obviously reduces, and in the time of one state threshold voltage unchanged, it is obviously higher that leakage current is compared " 0 " state, gets final product sense data by detecting leakage current difference, and Figure 11 is the leakage current-grid voltage curve of the second storage principle; As shown in figure 11, and this reading manner be nondestructive.No matter storage or reading data, power consumption is all very low, and speed is also very fast.
The present invention also proposes the automatic method for refreshing of a kind of elemental floating body, greatly improves data hold time, reduces power consumption.This flush mechanism depends on that different store statuss has distinct response to a given input signal, and be applicable to this single tube storage organization based on elemental floating body, under different states, i-v curve can obviously be distinguished, and namely under two states, transistor body electromotive force is obviously different.Figure 12 is the automatic flush mechanism schematic diagram of elemental floating body of the present invention; Figure 13 is the change curve between input and output electric current and the elemental floating body bulk potential of elemental floating body.
As shown in figure 12, I
inrepresent elemental floating body input current, it comprises electron impact ionization electric current, pn junction current, grid induction leakage current etc., I
outrepresent elemental floating body output current, be mainly the electric current that extracts electric charge and form.Elemental floating body, because the electric charge difference of storage causes bulk potential difference, represents the bulk potential of elemental floating body with Vb.Due to bulk potential difference, the change curve between input and output electric current and elemental floating body bulk potential that Figure 14 is elemental floating body; As shown in figure 13, under different bulk potentials, the curve of elemental floating body input and output electric current has three intersection points, now I
in=I
out, stores binary data " 0 " and " 1 " respectively under two stable states, and middle intersection point be non-steady state due to unstable, can get back to gradually stable state.Under stable state, small differential if bulk potential occurs, only otherwise cross non-steady state, after one section time, can automatically restore to again stable state, therefore the data of storage can be saved, if now give pulse voltage of grid voltage, Figure 13 is the voltage-time curve of the automatic method for refreshing of the present invention; As shown in figure 13.In the time that the store status of described elemental floating body is stable state, on the grid of each described float structure, apply a voltage.
The refresh time that the store status of setting elemental floating body is " 1 " is the first refresh time, the first refresh time is T1, the refresh time that the store status of setting elemental floating body is " 0 " is the second refresh time, the second Flushing status is T2, within the time of automatically refreshing (T1+T2), elemental floating body completes automatically and refreshes.Starting stage, grid terminal voltage VG was negative potential VG_L, and drain terminal current potential VD is also electronegative potential VD2, and source voltage terminal VS is always 0V, and back of the body grid are not biased, within the T1 time, for the elemental floating body of storage " 1 " refreshes automatically.Now grid terminal voltage VG will be higher than the elemental floating body threshold voltage of storage " 1 " lower than the threshold voltage of storage " 0 " elemental floating body, and grid terminal voltage VG equals VG1, and is high potential VD1 to drain terminal voltage.Now, the not conducting of fin transistor of storage " 0 ", and store " 1 " fin transistor conducting, make the collision ionic current that the elemental floating body of storage " 1 " produces much larger than the elemental floating body of storage " 0 ", to make I
incurve precipitous as much as possible, thereby canned data " 1 " is strengthened.In time T 2, for the elemental floating body of storage " 0 " refreshes automatically.Now grid voltage VG is VG2, and VG2 is greater than the threshold voltage of the elemental floating body of storage " 0 ", and drain voltage is electronegative potential VD2.Now all not conductings of fin transistor, and store " 0 " thus elemental floating body in produce interfacial state trapped electrons, make I
outcurve is smooth as much as possible, thereby makes " 0 " of storage also obtain reinforcement.According to above analysis, within automatic refresh cycle, memory cell can become piece to refresh, and without the refreshing of a line a line, has greatly saved the time, has improved reading speed, has also reduced power consumption, and the performance of memory is significantly improved.
In sum, the present invention proposes a kind of fin-shaped back of the body storage organization of grid and the automatic method for refreshing of elemental floating body thereof, only needing very little voltage just can complete data writes, and adopt the automatic refresh technique of elemental floating body, retention time increases greatly, and reading speed also can be accelerated, and has significantly reduced power consumption, because memory cell size is also very little, integrated level is also very high simultaneously.The present invention can be for replacing embedded static random access memory (eSRAM) on sheet by single tube storage organization, also can be for replacing embedded DRAM (eDRAM).
These are only preferred embodiment of the present invention; not thereby limit embodiments of the present invention and protection range; to those skilled in the art; the scheme that being equal to of should recognizing that all utilizations specification of the present invention and diagramatic content make replaces and apparent variation obtains, all should be included in protection scope of the present invention.
Claims (10)
1. the storage device based on fin-shaped back of the body gate bias, is characterized in that, comprising:
One upper surface is provided with the substrate of back of the body grid, and the upper surface of described back of the body grid is provided with back of the body gate oxide; And
One is arranged at the floating gate structure on described back of the body gate oxide.
2. the storage device of carrying on the back as claimed in claim 1 gate bias based on fin-shaped, is characterized in that, described floating gate structure comprises elemental floating body, gate oxide, fin-shaped grid;
Described elemental floating body covers the upper surface of described back of the body gate oxide, and described gate oxide covers upper surface and the sidewall thereof of described elemental floating body, and described fin-shaped grid covers the surface that described gate oxide exposes.
3. the storage device of carrying on the back as claimed in claim 2 gate bias based on fin-shaped, is characterized in that, described floating gate structure also includes source-drain electrode, and described source-drain electrode is positioned at the upper surface of described back of the body gate oxide.
4. carry on the back as claimed in claim 2 the storage device of gate bias based on fin-shaped, it is characterized in that, also comprise an insulating barrier, described insulating barrier covers described substrate top surface, and described back of the body grid and described back of the body gate oxide all embed and be arranged in this insulating barrier, described gate oxide and described fin-shaped grid all cover the described insulating barrier of part that closes on described back of the body gate oxide.
5. the storage device based on fin-shaped back of the body gate bias as described in any one in claim 1～4, is characterized in that, the thickness of described back of the body gate oxide is that 20 Ethylmercurichlorendimides are to 120 Ethylmercurichlorendimides.
6. the automatic method for refreshing of elemental floating body, is applied on the storage organization with several elemental floating bodies, it is characterized in that, described method comprises:
In the time that the store status of described elemental floating body is stable state, on the grid of each described float structure, apply a voltage;
The refresh time that the store status of setting elemental floating body is " 1 " is the first refresh time, and the refresh time that the store status of setting elemental floating body is " 0 " is the second refresh time;
In described the first refresh time, be the elemental floating body cut-off of " 0 " by described store status, and described in conducting, store status is the elemental floating body of " 1 ", so that this store status is refreshed as the elemental floating body of " 1 ";
In described the second refresh time, be the elemental floating body cut-off of " 1 " by described store status, and described in conducting, store status is the elemental floating body of " 0 ", so that this store status is refreshed as the elemental floating body of " 0 ".
7. the automatic method for refreshing of elemental floating body as claimed in claim 6, it is characterized in that, in described the first refresh time, the voltage that described fin-shaped grid applies is primary grid voltage, described primary grid voltage is higher than the threshold voltage of storage " 1 " elemental floating body, but is less than the threshold voltage of storage " 0 " elemental floating body.
8. the automatic method for refreshing of elemental floating body as claimed in claim 6, is characterized in that, in described the second refresh time, the voltage that described fin-shaped grid applies is second grid voltage, and described second grid voltage is higher than the threshold voltage of storage " 0 " elemental floating body.
9. the automatic method for refreshing of elemental floating body as claimed in claim 6, is characterized in that, when the store status of described elemental floating body is stable state, the input voltage of described elemental floating body equals the output voltage of described elemental floating body.
10. the automatic method for refreshing of elemental floating body as claimed in claim 6, is characterized in that, described storage organization comprises some floating gate structure, and each described floating gate structure includes elemental floating body, gate oxide, fin-shaped grid;
Described elemental floating body covers the upper surface of described back of the body gate oxide, and described gate oxide covers upper surface and the sidewall thereof of described elemental floating body, and described fin-shaped grid covers the surface that described gate oxide exposes.
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