CN103824784B - With connecting the method that sheet realizes the semiconductor packages connected - Google Patents
With connecting the method that sheet realizes the semiconductor packages connected Download PDFInfo
- Publication number
- CN103824784B CN103824784B CN201310598205.XA CN201310598205A CN103824784B CN 103824784 B CN103824784 B CN 103824784B CN 201310598205 A CN201310598205 A CN 201310598205A CN 103824784 B CN103824784 B CN 103824784B
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- Prior art keywords
- chip
- sheet
- mosfet
- base panel
- panel frame
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
Abstract
The invention discloses a kind of semiconductor package body connecting in sheet realizes and connecing, including: multiple chips, described each chip is respectively provided with multiple top contact district and contact area, bottom;Multiple substrates, are used for placing described chip, and the contact area, bottom of chip has with substrate and electrically connects, and described substrate is provided with the outer pin of multiple substrate;Connecting sheet, described connection sheet connects multiple chips, and is simultaneously used for connecting multiple top contact districts of multiple chip correspondence arrangement, thus fixing described multiple chips, and the described end connecting sheet is as the pin of chip and external connection;One plastic-sealed body, in order to encapsulate chip, substrate and to connect sheet, the present invention is when technique makes, multiple chips are connected by one or more connection sheets are fixing, then it is packaged, grind to separate finally by cutting or packaging body top and connect sheet, due to the fact that the fixing interconnection function connecting sheet, it is to avoid chip misplaces in industrial manufacturing process and affects the circuit performance of chip.
Description
Technical field
The present invention relates to a kind of semiconductor package and manufacture method, realize connection particularly to a kind of sheet that connects
Semiconductor packages and manufacture method thereof.
Background technology
In order to meet the needs of miniaturization of electronic products, the semiconductor packages of multi-chip becomes a kind of trend, multi-chip mould
The semiconductor packages of block is to carry multiple chip in single packaging part.
In Chinese patent Authorization Notice No. CN201063342Y, disclose a kind of multichip packaging structure, including: first
Lead frame, including the first chip carrier, pin and the second outer pin in first;Second lead frame, including the second chip carrier and
Pin in second;Second lead frame is positioned at above or below the first lead frame, by connector by the first lead frame
It is electrically connected with the second lead frame;First chip, is fixed on the first chip carrier, and the weld pad on the first chip passes through wire
Electrically connect with pin in first;Second chip, is fixed on the second chip carrier, and the weld pad on the second chip passes through wire and second
Interior pin electrically connects;And plastic-sealed body, by the first chip carrier, pin, the first chip, the second lead frame and the second core in first
Sheet encapsulates within it.
It addition, the most also there is encapsulating structure as shown in Figure 1, in this encapsulation, first with lead-in wire 1 by chip
2 are connected with lead column 3,4, position the most as shown by arrows in FIG., in package bottom, lead column 3,4 cutting are divided into multiple row pin
31,32 and 41,41, so that semiconductor package body arranges multiple pin, facilitate the connection of external circuit.
The above-mentioned prior art for chip package is the connection being used between chip and lead frame by wire, but leads
Multiple chips that line connects are in potting process, and bonding and soldering reflux course would generally make chip easily produce the changing of the relative positions,
And due to the movement of chip, cause short circuit between wire simultaneously, affect the performance of circuit, the most in the prior art in order to increase
Add pin, be to cut in package bottom, while very flexible, also add the complexity of technique, be unfavorable for reducing life
Produce cost.
Summary of the invention
It is an object of the invention to provide a kind of sheet that connects and realize semiconductor packages and the manufacture method thereof of connection, this is partly led
In body encapsulating structure and manufacture method, be used for the fixing of the internal multiple chips of quasiconductor by connecting sheet and be connected, multiple chips by
In the interconnection function of connection sheet, its position is fixed and stable performance, and connects the installation of sheet and split conveniently, simplifies technique
Flow process, reduces production cost.
In order to achieve the above object, the technical scheme is that with connecting the semiconductor package body that sheet realizes connecting, its
Feature is, including:
Several chips, described each chip is respectively provided with several top contact district;
One or more connection sheets, a described connection sheet is connected with the top contact district of chip, in one embodiment,
One or several connection sheet connect muscle elevated regions and described connection sheet are at least separated into a connecting piece Part I and a connection
Sheet Part II is connected with the top contact district of chip, and described connection sheet connects muscle elevated regions has a conductive section to be removed
Make described connection sheet Part I and connection sheet Part II the most electrically isolated;One connects in another embodiment
Sheet comprises several even muscle elevated regions and disconnects the some forming electric insulation at described several elevated regions;
One plastic-sealed body, in order to encapsulate chip and to connect sheet.
In the above-mentioned embodiment connecting the semiconductor package body that sheet realizes connecting, described several chips include one
There is the first contact area, top and the first chip of the second contact area, top, wherein, described connection sheet Part I and connection
Sheet Part II connects the first contact area, top and second contact area, top of described first chip respectively.
In above-mentioned another embodiment connecting the semiconductor package body that sheet realizes connecting, described several chip bags
Including one first chip and one second chip, the first described chip has the first contact area, top, the second described chip tool
There is the second contact area, top, wherein, described connection sheet Part I and connect sheet Part II and connect described top the respectively
One contact area and the second contact area, top.
Above-mentioned with connecting the semiconductor package body that sheet realizes connecting, wherein said plastic-sealed body upper surface have at least all
Cutting irrigation canals and ditches, described cutting irrigation canals and ditches connect muscle elevated regions through described connection sheet, thus remove described connection sheet and connect muscle elevated regions
In a conductive section make described connection sheet Part I and connect sheet Part II the most electrically isolated.
The above-mentioned semiconductor package body realizing connection with connection sheet, described plastic-sealed body upper surface exposes described connection
Sheet connects muscle elevated regions and is removed the disconnected cross section of conductive section.
Above-mentioned also includes a base panel frame by the semiconductor package body connecting sheet realization connection, described for placing
Multiple chips, the contact area, bottom of chip has with base panel frame and electrically connects, and described base panel frame is provided with multiple base panel frame
Outer pin;
The above-mentioned semiconductor package body realizing connection with connection sheet, wherein, described base panel frame includes the first chip
Seat and the second chip carrier, the first described chip is placed on one first chip carrier;The second described chip is placed on one
On two chip carriers.
The above-mentioned semiconductor package body realizing connection with connection sheet, wherein, described a connecting piece is provided with bending part
Divide and downwardly extend and be connected to base panel frame the first chip carrier.
Connect above-mentioned using and connect the semiconductor package body that sheet realizes connecting, wherein, the first described chip
A low limit MOSFET device and flash MOS field is included with the second chip
Effect tube device.
The above-mentioned semiconductor package body realizing connection with connection sheet, wherein, described low limit metal-oxide semiconductor (MOS)
The top contact district of FET device and flash metallic oxide semiconductor field effect tube is respectively gate contact zone
With contact area, source, bottom it, contact area is drain contact district.
According to different circuit design with select different semiconductor chip, such as when the first chip and the second chip
When bottom electrode can electrically connect or all of electrode is all located at chip upper surface, the first chip and the second chip also optional peace
Put on same chip seat, not even with integrated chip on the same chip;Also optional do not use base panel frame and only by core
The bottom surface of sheet is exposed to plastic-sealed body bottom surface to be connected with external circuit, and all of electrode being positioned at chip upper surface all can pass through
The various piece connecting sheet electrically insulated from one another is connected with external circuit.
With connecting the method that sheet realizes the semiconductor package body connected, it is characterized in, comprises the following steps:
Step 1: providing a base panel frame, described base panel frame is with multiple base panel frame external pins, described
Base panel frame is divided into multiple chip carrier, is used for placing multiple chip;
Step 2: provide multiple chip, described chip to include multiple top contact district and contact area, bottom, by described
Multiple chips are respectively adhered on each chip carrier of base panel frame, and the contact area, bottom of each chip is connected electrically in substrate
On framework;
Step 3: provide multiple connection sheet, each connection sheet to connect the top contact district being directed at arrangement between chip respectively,
Thus fix multiple chips, the described end connecting sheet is connected with external circuit as the pin of chip;
Step 4 a: plastic-sealed body, described plastic-sealed body base plate for packaging framework, chip and connection sheet are provided;
Step 5: cutting connection contact pin.
The above-mentioned method by the semiconductor package body connecting sheet realization connection, wherein, in step 3, described connection
Sheet is additionally provided with dogleg section, the three-dimensional connection between chip.
The above-mentioned method by the semiconductor package body connecting sheet realization connection, wherein, in step 3, each connection sheet
When connecting the top contact district being directed at arrangement between chip, connect and have in chip surface vertical direction and high knockout on sheet
The connection sheet on sheet surface connects muscle elevated regions.
The above-mentioned method by the semiconductor package body connecting sheet realization connection, wherein, in steps of 5, at plastic-sealed body
Top layer connects sheet by shallow-layer cutting and connects muscle elevated regions, and the connection sheet in multiple connection chip top contact districts is divided into each
Company's tab portion of mutually insulated.
The above-mentioned method by the semiconductor package body connecting sheet realization connection, wherein, in steps of 5, grinds plastic-sealed body
Top, rub described connection sheet and connect muscle elevated regions, the connection sheet in multiple connection chip top contact districts is divided into respectively
Company's tab portion of individual mutually insulated.
The above-mentioned semiconductor package body realizing connection with connection sheet, wherein, described multiple chips include low limit metal
Oxide semiconductor field effect transistor device and flash metallic oxide semiconductor field effect tube.
The above-mentioned semiconductor package body realizing connection with connection sheet, wherein, described low limit metal-oxide semiconductor (MOS)
The top contact district of FET device and flash metallic oxide semiconductor field effect tube is respectively gate contact zone
With contact area, source, bottom it, contact area is drain contact district.
According to different circuit design with select different semiconductor chip, such as when the first chip and the second chip
When bottom electrode can electrically connect or all of electrode is all located at chip upper surface, the first chip and the second chip also optional peace
Put on same chip seat, not even with integrated chip on the same chip;Also optional do not use base panel frame and only by core
The bottom surface of sheet is exposed to plastic-sealed body bottom surface to be connected with external circuit, such encapsulation process provides base panel frame step and
The step being fixed in base panel frame by position chip just can be omitted, and whole encapsulation process only includes the multiple chips of offer, provides
Connect sheet and connect the top contact district being directed at arrangement between chip respectively, plastic-sealed body and the step of cutting connection contact pin are provided.Core
The all of electrode of sheet upper surface all can be connected with external circuit by the various piece connecting sheet electrically insulated from one another.
A kind of semiconductor packages connecting sheet realization connection of the present invention and manufacture method thereof are owing to using above-mentioned technical side
Case, is allowed to compared with prior art, have the advantages that:
1, due to the fact that and be provided with connection sheet, fix multiple chip by connecting sheet, make multiple chip in encapsulation process
Position is stable, makes multiple chip not result in dislocation in semiconductor package process.
2, due to the fact that and multiple chips first carry out plastic packaging, then the method by using shallow-layer cutting is divided connecting sheet
Cutting, it is ensured that while multiple chip stable connections, processing step is simple, reduces production cost.
3, due to the fact that and first multiple chips are carried out plastic packaging, then grind at plastic-sealed body top to realize connecting sheet
Cutting, it is ensured that while multiple chip stable connections, simple to operate, reduce production cost.
4, due to the fact that connection sheet as the pin of chip, make the spirit easy to make of the pin of semiconductor package body
Live, additionally using connect sheet end as the heat radiation of radiating end, beneficially power semiconductor.
Accompanying drawing explanation
With reference to appended accompanying drawing, more fully to describe embodiments of the invention.But, appended accompanying drawing be merely to illustrate and
Illustrate, be not intended that limitation of the scope of the invention.
Fig. 1 is to illustrate the cutting of quasiconductor package bottom with the semiconductor package body structure increasing pin in prior art
Figure.
Fig. 2 A is to connect sheets with two in embodiment one to fix two chips of connection and top cutting separates and connects after sheet
The structural representation of semiconductor package body.
Fig. 2 B is the cross-sectional structure schematic diagram in Fig. 2 A along line A-A.
Fig. 2 C is the cross-sectional structure schematic diagram in Fig. 2 A along line B-B.
Fig. 3 A is the structural representation pasting in base panel frame by chip in embodiment one.
Fig. 3 B is the cross-sectional structure schematic diagram in Fig. 3 A along line A-A.
Fig. 4 A is to connect, with two, the structural representation that sheet connects the top contact district of two chips in embodiment one.
Fig. 4 B is the cross-sectional structure schematic diagram in Fig. 4 A along line A-A.
Fig. 4 C is the cross-sectional structure schematic diagram in Fig. 4 A along line B-B.
Fig. 5 A is with the outer enclosure structure chart of plastic-sealed body epoxy seal semiconductor in embodiment one.
Fig. 5 B is the package interior structural representation in Fig. 5 A along line A-A.
Fig. 5 C is the package interior structural representation in Fig. 5 A along line B-B.
Fig. 6 A is the structural representation in embodiment one in the cutting of plastic-sealed body top.
Fig. 6 B is along internal structure schematic diagram after cleaved of the plastic-sealed body of line A-A in Fig. 6 A.
Fig. 6 C is along internal structure schematic diagram after cleaved of the plastic-sealed body of line B-B in Fig. 6 A.
Fig. 7 is the manufacture method stream that in embodiment one, quasiconductor two connects that sheet connects the semiconductor package body of two chips
Cheng Tu.
Fig. 8 A is to connect sheets with two in embodiment two to fix two chips of connection and top is ground to separate and connected after sheet
The structural representation of semiconductor package body.
Fig. 8 B is the cross-sectional structure schematic diagram in Fig. 8 A along line A-A.
Fig. 8 C is the cross-sectional structure schematic diagram in Fig. 8 A along line B-B.
Fig. 9 is the manufacture method flow chart of two semiconductor package body connecting sheet two chips of connection in embodiment two.
Figure 10 A is the structural representation pasting in base panel frame by chip in embodiment two.
Figure 10 B is the cross-sectional structure schematic diagram in Figure 10 A along line A-A.
Figure 11 A is to connect, with two, the structural representation that sheet connects the top contact district of two chips in embodiment two.
Figure 11 B is the cross-sectional structure schematic diagram in Figure 11 A along line A-A.
Figure 11 C is the cross-sectional structure schematic diagram in Figure 11 A along line B-B.
Figure 12 is the structural representation ground at plastic-sealed body top in embodiment two.
Figure 13 A is to connect sheet with one in embodiment three to fix two chips of connection and top cutting separates and connects after sheet
The structural representation of semiconductor package body.
Figure 13 B is the cross-sectional structure schematic diagram in Figure 13 A along line A-A.
Figure 13 C is the cross-sectional structure schematic diagram in Figure 13 A along line B-B.
Figure 14 is the flow process of the manufacture method of a semiconductor package body connecting sheet two chips of connection in embodiment three
Figure.
Figure 15 A is the structural representation pasting in base panel frame by chip in embodiment three.
Figure 15 B is the cross-sectional structure schematic diagram in Figure 15 A along line A-A.
Figure 16 A is to connect, with one, the structural representation that sheet connects the top contact district of two chips in embodiment three.
Figure 16 B is the cross-sectional structure schematic diagram in Figure 16 A along line A-A.
Figure 16 C is the cross-sectional structure schematic diagram in Figure 16 A along line B-B.
Figure 17 A is the structural representation in embodiment three in plastic-sealed body top cutting twice.
Figure 17 B is the semiconductor packaged inner structure chart in Figure 17 A along line A-A.
Figure 17 C is the semiconductor packaged inner structure chart in Figure 17 A along line B-B.
Figure 18 A is to connect sheet with one in embodiment four to fix two chips of connection and top is ground to separate and connected after sheet
The structural representation of semiconductor package body.
Figure 18 B is the cross-sectional structure schematic diagram in Figure 18 A along line A-A.
Figure 18 C is the cross-sectional structure schematic diagram in Figure 18 A along line B-B.
Figure 19 is the manufacture method flow chart of a semiconductor package body connecting sheet two chips of connection in embodiment four.
Figure 20 A is the structural representation pasting in base panel frame by chip in embodiment four.
Figure 20 B is the cross-sectional structure schematic diagram in Figure 20 A along line A-A.
Figure 21 A is to connect, with one, the structural representation that sheet connects the top contact district of two chips in embodiment four.
Figure 21 B is the cross-sectional structure schematic diagram in Figure 21 A along line A-A.
Figure 21 C is the cross-sectional structure schematic diagram in Figure 21 A along line B-B.
Figure 22 is the structural representation ground at plastic-sealed body top in embodiment four.
Detailed description of the invention
Embodiment one, the semiconductor package body connected with connection sheet realization, with low limit metal oxide semiconductor field-effect
As a example by transistor device and flash metal oxide semiconductor field effect tube packaging altogether, as shown in Fig. 2 A, Fig. 2 B and Fig. 2 C,
Including the first and second two chips, base panel frame, multiple connection sheet and a plastic-sealed body encapsulating all above-mentioned parts
170;Two chips are respectively the first chip low limit mos field effect transistor (LS MOSFET) 110 and
Two chip flash metal oxide semiconductor field effect tubes (HS MOSFET) 120, the top contact of LS MOSFET 110 is distinguished
Not Wei gate contact zone 111 and contact area, source 112, bottom it, contact area is drain contact district (not shown), HS MOSFET 120
Top contact district be respectively gate contact zone 121 and contact area, source 122, bottom it, contact area is that drain contact district (does not shows in figure
Show);One base panel frame, base panel frame includes base panel frame the first chip carrier 130 and base panel frame the second chip carrier 140, logical
First chip LS MOSFET 110 and the second chip HS MOSFET 120 correspondence respectively are set by the cementation crossing binding agent 180
Put on base panel frame the first chip carrier 130 and base panel frame the second chip carrier 140, LS MOSFET 110 and HS MOSFET
The drain contact district, bottom of 120 electrical connection corresponding with each chip carrier of base panel frame, base panel frame the first chip carrier 130 is provided with
Bottom base panel frame 132 and base panel frame connect muscle 131, bottom base panel frame, 132 as LS MOSFET 110 with external circuit even
Connect misses touch pad, and additionally bottom this base panel frame, 132 ends are also convenient for the heat radiation of power semiconductor, and base panel frame connects muscle 131 and uses
Connection between base panel frame different units (only showing a unit in figure).Base panel frame the second chip carrier 140 is provided with base
Plate framework connects bottom muscle 141, base panel frame pin 142 and base panel frame 143, base panel frame pin 142 for chip with outside
The connection of circuit;Several connection sheets include that a connecting piece 150 and second connects sheet 160, it is preferable that connecting sheet is that copper connects
Sheet.A connecting piece 150 comprises Part I 150a and Part II 150b, these two parts across the first and second chip carriers,
By the welding effect of scolding tin 190, Part I 150a connects the gate contact zone 111 of LS MOSFET 110, Part II 150b
Connect the gate contact zone 121 of HS MOSFET 120, thus fix the position of LS MOSFET 110 and HS MOSFET 120, even
On contact pin 150 Part I 150a and Part II 150b and the gate contact zone of LS MOSFET 110 and HS MOSFET 120
111,121 corresponding positions can be provided with the recessed post 152 of hollow cylindrical, connects the end 151 of sheet 150 pin as chip with outer
Portion circuit connects, and equally, connects sheet 160 and comprises 160a and 160b two parts across the first and second chip carriers, pass through scolding tin
The welding effect of 190, Part I 160a connects the contact area, source 112 of LS MOSFET 110, and Part II 160b connects HS
The contact area, source 122 of MOSFET 120, with the position of fixing LS MOSFET 110 and HS MOSFET 120, connects sheet 160 the
On a part of 160a and Part II 160b corresponding with the contact area, source 112,122 of LS MOSFET 110 and HS MOSFET 120
Position is provided with the recessed post 162 of hollow cylindrical, and as shown in Figure 2 B, Fig. 2 B is Fig. 2 A sectional view along line A-A, and line A-A is just worn
Cross recessed post 162 internal, therefore Fig. 2 B can be clearly visible recessed post 162, when plastic-sealed body 170 plastic packaging, fill out in recessed post 152,162
Full, so that all parts of the more stable good package interior of plastic packaging of plastic-sealed body.Connect the end 161 of sheet 160 as core
The pin of sheet is connected with external circuit, additionally, connection sheet 160 is provided with dogleg section 163 and downwardly extends and be connected to substrate frame
Frame the first chip carrier 130, the bottom of the three-dimensional top source contact area connecting HS MOSFET 120 and LS MOSFET 110 is missed
Touch district, thus connect HS MOSFET 120 and LS MOSFET 110.As shown in Figure 4 A, connect sheet 150 and connect LS MOSFET
Position between gate contact zone and the gate contact zone of HS MOSFET 120 of 110 is provided with connection sheet and connects muscle elevated regions 153,
Equally, the sheet 160 portion between contact area, source and the contact area, source of HS MOSFET 120 connecting LS MOSFET 110 is connected
Position is provided with connection sheet and connects muscle elevated regions 164, and plastic-sealed body 170 upper surface has one and first and second chip carrier line direction
Cutting irrigation canals and ditches 175, these cutting irrigation canals and ditches 175 connect muscle elevated regions 153 through connection sheet and connection sheet connects muscle elevated regions 164,
Cutting irrigation canals and ditches 175 the degree of depth select can by connect sheet 150 and connection sheet 160 convex top each completely separable become each other without
150a and 150b two parts of electrical contact and 160a and 160b two parts so that the gate contact zone of LS MOSFET 110 and HS
Between the gate contact zone of MOSFET 120 electrically separated, the contact area, source of LS MOSFET 110 and the source of HS MOSFET 120 connect
Touch between district electrically separated, the most do not expose the chip in plastic-sealed body 170 to the open air simultaneously.
In preferred embodiment as seen in figs. 2a-2c, the end 151 connecting sheet 150 and the end 161 connecting sheet 160 are made
Pin for chip is connected with external circuit, in another preferred embodiment, base panel frame can comprise separate with each chip carrier and
Terminate in for the pin (not shown) being connected with external circuit, each end connecting sheet outside extending plastic-sealed body 170
Make electrical contact with in plastic-sealed body 170 and with base panel frame pin.Additionally, cutting irrigation canals and ditches 175 can be added by air and fill, it is possible to exhausted by other
Edge medium (not shown), such as identical with plastic-sealed body 170 material adds to be filled with and better ensures that LS MOSFET 110 and HS
Insulation between MOSFET 120.
Above-mentioned connect sheet realize connect semiconductor package body at least a connecting piece be provided with connection sheet connect muscle convex area
Described connection sheet is divided into Part I and Part II, described Part I and Part II to be respectively used to connect by territory
The first contact area on semiconductor chip and the second contact area, described connection sheet connects muscle elevated regions a conductive section quilt
Remove and make described connection sheet Part I and connection sheet Part II the most electrically isolated.As seen in figs. 2a-2c
In embodiment, the first contact area and the second contact area lay respectively on the first chip and the second chip.In other embodiments,
First contact area and the second contact area may be alternatively located at same chip, such as connect sheet and connect a connecting piece of muscle elevated regions with being provided with
Part I and Part II the grid on same MOSFET chip and source electrode are simultaneously connected with electrically extend out plastic-sealed body 170 it
Outward, wherein connect sheet Part I and Part II and connect muscle high spot and disconnect and go into two parts of electric insulation connecting sheet.According to
The semiconductor chip that different circuit design is different with selection, such as can electricity when the bottom electrode of the first chip and the second chip
When connection or all of electrode are all located at chip upper surface, the first chip and the second chip are also optional is placed in same chip
On seat, not even with integrated chip on the same chip;May select does not uses base panel frame only to be exposed to the open air the bottom surface of chip yet
In plastic-sealed body bottom surface to be connected with external circuit, all of electrode being positioned at chip upper surface all can be the most electric by connecting sheet
The various piece of insulation is connected with external circuit.
With connecting the method that sheet realizes the semiconductor package body connected, with low limit metal oxide semiconductor field effect transistor
As a example by tube device and flash metal oxide semiconductor field effect tube packaging altogether, flow chart as shown in Figure 7, it may include with
Lower step: as shown in Fig. 3 A and Fig. 3 B, first a, it is provided that base panel frame, base panel frame includes base panel frame the first chip carrier
130 and base panel frame the second chip carrier 140, base panel frame is provided with base panel frame and connects muscle 131,141, base panel frame pin 142
And bottom base panel frame 132,143;Secondly, it is provided that two chips, two chips are respectively low limit MOS field
Effect transistor (LS MOSFET) 110 and flash metal oxide semiconductor field effect tube (HS MOSFET) 120, LS
The top contact district of MOSFET 110 is respectively gate contact zone 111 and contact area, source 112, and bottom it, contact area is drain contact district
(not shown), the top contact district of HS MOSFET 120 is respectively gate contact zone 121 and contact area, source 122, connects bottom it
Tactile district is drain contact district (not shown), and LS MOSFET 110 and HS MOSFET 120 correspondence respectively is set by binding agent 180
Put on base panel frame the first chip carrier 130 and base panel frame the second chip carrier 140, LS MOSFET 110 and HS MOSFET
The drain contact district, bottom of 120 is electrically connected with each self-corresponding base panel frame chip carrier respectively;Then, such as Fig. 4 A, Fig. 4 B and figure
Shown in 4C, it is provided that two connect sheet, and two connect sheet is that a connecting piece 150 and second connects sheet 160, is directed at the LS that arranged
The top contact district of MOSFET 110 and HS MOSFET 120, a connecting piece 150 is by the welding effect of scolding tin 190 simultaneously
Connecting the gate contact zone 121 of the gate contact zone 111 and HS MOSFET 120 of LS MOSFET 110, a connecting piece 150 is even
Connect the position between the gate contact zone of LS MOSFET 110 and the gate contact zone of HS MOSFET 120 be provided with connection sheet connect muscle
Elevated regions 153, connects sheet and connects muscle elevated regions 153 and and exceed chip surface in chip surface vertical direction, and same second
Connect the sheet 160 welding effect by scolding tin 190, connect contact area, the source 112 and HS MOSFET 120 of LS MOSFET 110
Contact area, source 122, second connects sheet 160 connects in the source connecting the contact area, source of LS MOSFET 110 and HS MOSFET 120
Position between tactile district is provided with connection sheet and connects muscle elevated regions 164, and it is vertical at chip surface that connection sheet connects muscle elevated regions 164
On direction and exceed chip surface, as shown in Figure 4 C, owing to Fig. 4 C is Fig. 4 A cross-sectional view along line B-B, complete convex in figure
Playing regional structure is to be made up of, separately a part for the part connecting sheet elevated regions 153 and connection sheet elevated regions 164
Outward, second connects sheet 160 is provided with downward bending part 163, and solid connects top source contact area and the LS of HS MOSFET 120
The drain contact district, bottom of MOSFET 110, therefore a connecting piece 150 and the second connection sheet 160 make LS MOSFET 110 and HS
The position of MOSFET 120 is fixed, and a connecting piece 150 and the second connection sheet 160 are being respectively equipped with chip top contact position
Recessed post 152 and recessed post 162, the end 151 of a connecting piece 150 and the end 161 of the second connection sheet 160 are as the pin of chip
Can be connected with external circuit;Then, as shown in Fig. 5 A, Fig. 5 B and Fig. 5 C, it is provided that a plastic-sealed body 170, plastic-sealed body 170 plastic packaging is filled
Full recessed post 152 and recessed post 162, base plate for packaging framework, chip and connection sheet;Finally, as shown in Fig. 6 A, Fig. 6 B and Fig. 6 C, at LS
The top layer of the plastic-sealed body 170 between MOSFET 150 and MOSFET 160 is directed at the connection sheet of a connecting piece 150 and connects muscle projection
Region 153 and the second connection sheet connecting sheet 160 connect muscle elevated regions 164, carry out shallow-layer cutting, because connecting sheet to connect muscle projection
Region 153,164 is arranged point-blank, and the slash frame in alignment Fig. 6 A carries out downwards the cutting of shallow-layer, and for example Fig. 6 B and
The direction of arrow of 6C is cut, and the connection sheet cutting off a connecting piece 150 connects muscle elevated regions 153 and the second connection sheet 160
Connection sheet connect muscle elevated regions 164, a connecting piece 150 and second is connected sheet 160 in even muscle convex area by cutting irrigation canals and ditches 175
Top, territory is respectively divided into two parts of mutually insulated.Owing to first passing through a connecting piece 150 and second in this encapsulation process
Connect sheet 160 two chips of fixing connection, after plastic packaging, cut cutting connection contact pin by shallow-layer again, thus in encapsulation process,
It is not result in chip and base panel frame and the changing of the relative positions being connected between sheet.In a preferred embodiment, also fill with an insulant
Cutting irrigation canals and ditches 175(figure does not shows), insulation filling material includes plastic-sealed body 170 capsulation material.According to different circuit design
The semiconductor chip different with selection, such as can electrically connect or all of electricity when the bottom electrode of the first chip and the second chip
When pole is all located at chip upper surface, the first chip and the second chip are also optional to be placed on same chip seat, the most same to core
Sheet is integrated on the same chip;Also optional do not use base panel frame and only the bottom surface of chip is exposed to plastic-sealed body bottom surface with
Just it is connected with external circuit, such encapsulation process provides the step of base panel frame and position chip is fixed in base panel frame
Step just can be omitted, and whole encapsulation process only includes the multiple chips of offer, provides connection sheet to connect respectively between chip and is directed at
The top contact district of arrangement, provides plastic-sealed body and the step of cutting connection contact pin.The all of electrode of chip upper surface all can lead to
The various piece crossing connection sheet electrically insulated from one another is connected with external circuit.
Embodiment two, the semiconductor package body connected with connection sheet realization, with low limit metal oxide semiconductor field-effect
As a example by transistor device and flash metal oxide semiconductor field effect tube packaging altogether, as shown in Fig. 8 A, Fig. 8 B and Fig. 8 C,
The plastic-sealed body 270 of all above-mentioned parts is encapsulated including two chips, base panel frame, multiple connection sheet and one;Two cores
Sheet is respectively the first chip low limit mos field effect transistor (LS MOSFET) 210 and the second chip flash
Metal oxide semiconductor field effect tube (HS MOSFET) 220, the top contact district of LS MOSFET 210 is respectively grid contact
District 211 and contact area, source 212, bottom it, contact area is drain contact district (not shown), the top contact of HS MOSFET 220
District is respectively gate contact zone 221 and contact area, source 222, and bottom it, contact area is drain contact district (not shown);One substrate
Framework, base panel frame includes base panel frame the first chip carrier 230 and base panel frame the second chip carrier 240, by binding agent 280
LS MOSFET 210 and HS MOSFET 220 is correspondingly arranged at base panel frame the first chip carrier 230 and base by cementation respectively
On plate framework the second chip carrier 240, the drain contact district, bottom of LS MOSFET 210 and HS MOSFET 220 and base panel frame
Each chip carrier correspondence electrically connects, base panel frame the first chip carrier 230 be provided with bottom base panel frame 232 and base panel frame connect muscle
231, bottom base panel frame, 232 miss touch pad as what LS MOSFET 210 was connected with external circuit, additionally at the bottom of this base panel frame
Portion 232 end is also convenient for the heat radiation of power semiconductor, and base panel frame connects muscle 231 for each different units of base panel frame (in figure only
Show a unit) between connection.Base panel frame the second chip carrier 240 is provided with base panel frame and connects muscle 241, base panel frame pin
242 and base panel frame bottom 243, base panel frame pin 242 is for the connection of chip with external circuit;Multiple connection sheets wrap respectively
Include and connect sheet 250 and connect sheet 260, it is preferable that connecting sheet is that copper connects sheet, and connection sheet 250 is provided with connection sheet and connects muscle convex area
Connection sheet is divided into two parts by territory;Connection sheet connects muscle elevated regions has a conductive section to be removed so that described connection sheet first
Part and connection sheet Part II are the most electrically isolated, by the welding effect of scolding tin 290, connect LS MOSFET respectively
The gate contact zone 221 of the gate contact zone 211 and HS MOSFET 220 of 210, thus fixing LS MOSFET 210 and HS MOSFET
The position of 220, connects the corresponding portion with the gate contact zone 211,221 of LS MOSFET 210 and HS MOSFET 220 on sheet 250
Position is provided with the recessed post 252 of hollow cylindrical, and the end 251 of connection sheet 250 is connected with external circuit as the pin of chip, with
Sample, connects sheet 260 and is provided with connection sheet and connects muscle elevated regions a connecting piece is divided into two parts;Connection sheet connects muscle elevated regions to be had
One conductive section is removed so that described connection sheet Part I and connection sheet Part II are the most electrically isolated, passes through
The welding effect of scolding tin 290, is simultaneously connected with the contact area, source of contact area, the source 212 and HS MOSFET 220 of LS MOSFET 210
222, with the position of fixing LS MOSFET 210 and HS MOSFET 220, with LS MOSFET 210 and HS on connection sheet 260
The corresponding position of the contact area, source 212,222 of MOSFET 220 is provided with the recessed post 262 of hollow cylindrical, as shown in Figure 8 B, Fig. 8 B
Being Fig. 8 A sectional view along line A-A, it is internal that line A-A is just passed through recessed post 262, therefore can be clearly visible recessed post 262 in Fig. 8 B, when
During plastic-sealed body 270 plastic packaging, fill up in recessed post 252,262, so that the more stable good package interior of plastic packaging of plastic-sealed body
All parts, as shown in Figure 8 C, the top of plastic-sealed body 270 is exposed connection sheet 250 and is connected and separated at muscle elevated regions connecting sheet
The disconnected cross section 2531 and the connection sheet 260 that form two parts of mutually insulated connect muscle high spot at connection sheet and are separated formation mutually
The disconnected cross section 2641 of two parts of insulation, end section 2531,2641 can be as power semiconductor atop part heat radiation port, even
The end 261 of contact pin 260 is connected with external circuit as the pin of chip, in addition connect sheet 260 be provided with dogleg section 263 to
Lower bending, the three-dimensional top source contact area connecting HS MOSFET 220 and the drain contact district, bottom of LS MOSFET 210, thus
Connect HS MOSFET 220 and LS MOSFET 210.In a preferred embodiment, also it is covered with plastic-sealed body with an insulant
The top (not shown) of 270 so that expose the disconnected cross section 2531 connecting sheet 250 of plastic-sealed body 270 and connect the disconnected of sheet 260
Cross section 2641 is covered with by top insulation cover material.Described insulation cover material includes the capsulation material of plastic-sealed body 270.
With connecting the method that sheet realizes the semiconductor package body connected, with low limit metal oxide semiconductor field effect transistor
As a example by tube device and flash metal oxide semiconductor field effect tube packaging altogether, flow chart as shown in Figure 9, including following
Step: as shown in Figure 10 A and Figure 10 B, first a, it is provided that base panel frame, base panel frame includes base panel frame the first chip carrier
230 and base panel frame the second chip carrier 240, base panel frame is provided with base panel frame and connects muscle 231,241, base panel frame pin 242
And bottom base panel frame 232,243;Secondly, it is provided that two chips, two chips are respectively low limit MOS field
Effect transistor (LS MOSFET) 210 and flash metal oxide semiconductor field effect tube (HS MOSFET) 220, LS
The top contact district of MOSFET 110 is respectively gate contact zone 211 and contact area, source 212, and bottom it, contact area is drain contact district
(not shown), the top contact district of HS MOSFET 220 is respectively gate contact zone 221 and contact area, source 222, connects bottom it
Tactile district is drain contact district (not shown), and LS MOSFET 210 and HS MOSFET 220 correspondence respectively is set by binding agent 280
Put on base panel frame the first chip carrier 230 and base panel frame the second chip carrier 240, LS MOSFET 210 and HS MOSFET
The drain contact district, bottom of 220 is electrically connected with each self-corresponding base panel frame chip carrier respectively;Then, such as Figure 11 A, Figure 11 B and
Shown in Figure 11 C, it is provided that two connect sheet, and two connection sheets, for connecting sheet 250 and connecting sheet 260, are directed at the LS MOSFET that arranged
The top contact district of 210 and HS MOSFET 220, connects sheet 250 and is simultaneously connected with LS by the welding effect of scolding tin 290
The gate contact zone 221 of the gate contact zone 211 and HS MOSFET 220 of MOSFET 210, connects sheet 250 and is connecting LS MOSFET
Position between gate contact zone and the gate contact zone of HS MOSFET 220 of 210 is provided with connection sheet and connects muscle elevated regions 253,
Connection sheet connects muscle elevated regions 253 and and exceeds chip surface in chip surface vertical direction, and the same sheet 260 that connects passes through scolding tin
The welding effect of 290, connects the contact area, source 222 of contact area, the source 212 and HS MOSFET 220 of LS MOSFET 210, connects
The company of being provided with on the sheet 260 position between gate contact zone and the gate contact zone of HS MOSFET 220 connecting LS MOSFET 210
Contact pin connects muscle elevated regions 264, and connection sheet connects muscle elevated regions 264 and and exceeds chip surface in chip surface vertical direction,
As shown in Figure 11 C, owing to Figure 11 C is Figure 11 A cross-sectional view along line B-B, elevated regions structure complete in figure is by connecting
Sheet connects a part for muscle elevated regions 253 and connects sheet and connect the part of muscle elevated regions 264 and collectively form, it addition, connect sheet
260 are provided with dogleg section 263 downward bending, the three-dimensional top source contact area connecting HS MOSFET 220 and LS MOSFET
The drain contact district, bottom of 210, therefore connection sheet 250 and connection sheet 260 make the position of LS MOSFET 210 and HS MOSFET 220
Put fixing, connect sheet 250 and connection sheet 260 is being respectively equipped with recessed post 252 and recessed post 262 with chip top contact position, connect
The end 251 and 261 of sheet 250 and connection sheet 260 can be connected with external circuit as the pin of chip;Then, it is provided that a plastic packaging
Body 270, plastic-sealed body 270 plastic packaging fills full recessed post 252 and recessed post 262, base plate for packaging framework, chip and connection sheet;Finally, such as figure
Shown in 12, the top layer of plastic-sealed body 270 is being ground, is rubbing and connect the connection sheet of sheet 250 and connect muscle elevated regions 253 and connect
The connection sheet of sheet 260 connects muscle elevated regions 264, exposes connection sheet at the top of plastic-sealed body 270 and connects disconnected section of muscle elevated regions 253
Face 2531 and connection sheet connect the disconnected cross section 2641 of muscle elevated regions 264, thus connection sheet 250 and connection sheet 260 are respectively divided into
Two of mutually insulated even tab portion, above-mentioned disconnected cross section can be used for the heat radiation of power semiconductor.In this encapsulation process due to
First pass through connection sheet 250 and connect sheet 260 two chips of fixing connection, after plastic packaging, grinding segmentation by the top of plastic-sealed body again
Connect sheet, thus in encapsulation process, be not result in chip and base panel frame and the changing of the relative positions being connected between sheet, and technological operation
Convenient.In a preferred embodiment, the grinding top (not shown) of plastic-sealed body 270 also it is covered with an insulant so that
Insulated by top in disconnected cross section 2531 and the second disconnected cross section 2641 connecting sheet 260 of exposing a connecting piece 250 of plastic-sealed body 270
Cover material is covered with.Described insulation cover material includes the capsulation material of plastic-sealed body 270.
Embodiment three, the semiconductor package body connected with connection sheet realization, with low limit metal oxide semiconductor field-effect
As a example by transistor device and flash metal oxide semiconductor field effect tube packaging altogether, such as Figure 13 A, Figure 13 B and Figure 13 C institute
Show, including two chips, base panel frame, the plastic-sealed body 370 connecting sheet and all above-mentioned parts of encapsulation;Two
Chip is respectively low limit mos field effect transistor (LS MOSFET) 310 and flash metal-oxide is partly led
Body field effect transistor (HS MOSFET) 320, the top contact district of LS MOSFET 310 is respectively gate contact zone 311 and contact area, source
312, bottom it, contact area is drain contact district (not shown), and the top contact district of HS MOSFET 320 is respectively grid contact
District 321 and contact area, source 322, bottom it, contact area is drain contact district (not shown);One base panel frame, base panel frame bag
Include base panel frame the first chip carrier 330 and base panel frame the second chip carrier 340, by the cementation of binding agent 380 by LS
MOSFET 310 and HS MOSFET 320 is correspondingly arranged at base panel frame the first chip carrier 330 and base panel frame the second core respectively
On bar 340, the drain contact district, bottom of LS MOSFET 310 and HS MOSFET 320 and each chip carrier pair of base panel frame
Should electrically connect, base panel frame the first chip carrier 330 be provided with bottom base panel frame 332 and base panel frame connect muscle 331, base panel frame
Touch pad is missed as what LS MOSFET 310 was connected with external circuit in bottom 332, additionally 332 ends also side bottom this base panel frame
Just the heat radiation of power semiconductor, base panel frame connects muscle 331 for each different units of base panel frame (only showing a unit in figure)
Between connection.Base panel frame the second chip carrier 340 is provided with base panel frame and connects muscle 341, base panel frame pin 342 and substrate frame
Bottom frame 343, base panel frame pin 342 is for the connection of chip with external circuit;Multiple even tab portions are one and connect sheet
350 are split to form, and connection sheet 350 is provided with multiple connection sheet and connects muscle elevated regions 353 and 354 for connecting sheet various piece
Connect, connect sheet 350 various piece connect sheet connect at muscle elevated regions 353 and 354 by separated formed mutually insulated each
Individual part, each connection sheet connects muscle elevated regions has a conductive section to be removed so that described connection sheet each several part each other
Electrically isolated.Connecting the various piece welding effect by scolding tin 390 of sheet 350, the grid connecting LS MOSFET 310 respectively connect
Touch the gate contact zone 321 of district 311 and HS MOSFET 320, and contact area, the source 312 and HS MOSFET of LS MOSFET 310
The contact area, source 322 of 320, thus the position of fixing LS MOSFET 310 and HS MOSFET 320, with LS on connection sheet 350
The gate contact zone 311,321 of MOSFET 310 and HS MOSFET 320 and the corresponding position of contact area, source 312,322 are provided with hollow
Columned recessed post 352, the end 351 of connection sheet 350 is connected with external circuit as the pin of chip, as shown in Figure 13 B, figure
13B is Figure 13 A sectional view along line A-A, and it is internal that line A-A is just passed through recessed post 352, therefore can be clearly visible recessed post in Figure 13 B
352, when plastic-sealed body 370 plastic packaging, fill up in recessed post 352, so that the good package interior of plastic packaging that plastic-sealed body is more stable
All parts, connect sheet 350 in addition and be provided with dogleg section 355 downward bending, the three-dimensional top connecting HS MOSFET 320
The drain contact district, bottom of contact area, source and LS MOSFET 310, thus connect HS MOSFET 320 and LS MOSFET 310.?
In one preferred embodiment, also filling cutting irrigation canals and ditches (not shown) with an insulant, insulation filling material includes plastic-sealed body
370 capsulation materials.
With connecting the method that sheet realizes the semiconductor package body connected, with low limit metal oxide semiconductor field effect transistor
As a example by tube device and flash metal oxide semiconductor field effect tube packaging altogether, flow chart as shown in figure 14, including with
Lower step: as shown in Figure 15 A and Figure 15 B, first a, it is provided that base panel frame, base panel frame includes base panel frame the first chip
Seat 330 and base panel frame the second chip carrier 340, base panel frame is provided with base panel frame and connects muscle 331,341, base panel frame pin
342 and base panel frame bottom 332,343;Secondly, it is provided that two chips, two chips are respectively low limit metal-oxide semiconductor (MOS)
Field-effect transistor (LS MOSFET) 310 and flash metal oxide semiconductor field effect tube (HS MOSFET) 320, LS
The top contact district of MOSFET 310 is respectively gate contact zone 311 and contact area, source 312, and bottom it, contact area is drain contact district
(not shown), the top contact district of HS MOSFET 320 is respectively gate contact zone 321 and contact area, source 322, connects bottom it
Tactile district is drain contact district (not shown), and LS MOSFET 310 and HS MOSFET 320 correspondence respectively is set by binding agent 380
Put on base panel frame the first chip carrier 330 and base panel frame the second chip carrier 340, LS MOSFET 310 and HS MOSFET
The drain contact district, bottom of 320 is electrically connected with each self-corresponding base panel frame chip carrier respectively;Then, such as Figure 16 A, Figure 16 B and
Shown in Figure 16 C, it is provided that one connects sheet 350, and connection sheet 350 is provided with multiple connection sheet and connects muscle elevated regions 353 and 354, uses
In the various piece of connection sheet 350, it is directed at the top contact district of the LS MOSFET 310 and MOSFET 320 that arranged, even
The various piece of contact pin 350 connects the gate contact zone 311 of LS MOSFET 310, HS respectively by the welding effect of scolding tin 390
The gate contact zone 321 of MOSFET 320, the contact area, source of contact area, source 312 and HS MOSFET 320 of LS MOSFET 310
322, connection sheet connects muscle elevated regions 353 and 354 and and exceeds chip surface in chip surface vertical direction, it addition, connect sheet
350 are provided with dogleg section 355 downward bending, the three-dimensional top source contact area connecting HS MOSFET 320 and LS MOSFET
The drain contact district, bottom of 310, therefore connects sheet 350 and makes the position of LS MOSFET 310 and HS MOSFET 320 fix, connect
Sheet 350 and chip top contact position are respectively equipped with recessed post 352, and the end 351 of connection sheet 350 can be with outward as the pin of chip
Portion's circuit connects;Then, it is provided that a plastic-sealed body 370, plastic-sealed body 370 plastic packaging fills full recessed post 352, base plate for packaging framework, chip
And connection sheet;Plastic packaging finally, as shown in Figure 17 A, Figure 17 B and Figure 17 C, between LS MOSFET 350 and MOSFET 360
The top layer alignment of body 370 connects multiple connection sheets of sheet 350 and connects muscle elevated regions 353 and 354 because multiple connection sheet to connect muscle convex
Play region 353 and multiple connection sheet muscle elevated regions 354 is all respectively provided with point-blank, two in alignment Figure 17 A
Slash frame carries out downwards twice shallow-layer cutting, and and for example the direction of arrow of Figure 17 B and 17C is cut, and obtains cutting irrigation canals and ditches 375,
Multiple connection sheets of these cutting irrigation canals and ditches 375 cut-out connection sheet 350 connect muscle elevated regions 353 and connection sheet connects muscle elevated regions
3541, connection sheet 350 is divided into four company's tab portions of each mutually insulated.Due to by connecting in this encapsulation process
Sheet 350 is fixing connects two chips, cuts cutting connection contact pin by shallow-layer again after plastic packaging, thus in encapsulation process, chip
Between position be more fixed, be not result in chip and base panel frame and the changing of the relative positions being connected between sheet.In a preferred embodiment,
Also fill in cutting irrigation canals and ditches 375(figure with an insulant and do not show), insulation filling material includes plastic-sealed body 370 capsulation material.
Embodiment four, the semiconductor package body connected with connection sheet realization, with low limit metal oxide semiconductor field-effect
As a example by transistor device and flash metal oxide semiconductor field effect tube packaging altogether, such as Figure 18 A, Figure 18 B and Figure 18 C institute
Show, encapsulate the plastic-sealed body 470 of all above-mentioned parts including two chips, base panel frame, multiple connection sheet and one;Two
Chip is respectively low limit mos field effect transistor (LS MOSFET) 410 and flash metal-oxide is partly led
Body field effect transistor (HS MOSFET) 420, the top contact district of LS MOSFET 410 is respectively gate contact zone 411 and contact area, source
412, bottom it, contact area is drain contact district (not shown), and the top contact district of HS MOSFET 420 is respectively grid contact
District 421 and contact area, source 422, bottom it, contact area is drain contact district (not shown);One base panel frame, base panel frame bag
Include base panel frame the first chip carrier 430 and base panel frame the second chip carrier 440, by the cementation of binding agent 480 by LS
MOSFET 410 and HS MOSFET 420 is correspondingly arranged at base panel frame the first chip carrier 430 and base panel frame the second core respectively
On bar 440, the drain contact district, bottom of LS MOSFET 410 and HS MOSFET 420 and each chip carrier pair of base panel frame
Should electrically connect, base panel frame the first chip carrier 430 be provided with bottom base panel frame 432 and base panel frame connect muscle 431, base panel frame
Touch pad is missed as what LS MOSFET 410 was connected with external circuit in bottom 432, additionally 432 ends also side bottom this base panel frame
Just the heat radiation of power semiconductor, base panel frame connects muscle 431 for each different units of base panel frame (only showing a unit in figure)
Between connection.Base panel frame the second chip carrier 440 is provided with base panel frame and connects muscle 441, base panel frame pin 442 and substrate frame
Bottom frame 443, base panel frame pin 442 is for the connection of chip with external circuit;Multiple even tab portions are one and connect sheet
450 are split to form, and connect sheet 450 and are provided with multiple connection sheet and connect muscle elevated regions 454 for connecting the connection of sheet various piece,
Connect sheet 450 various piece connect sheet connect at muscle elevated regions 453 and 454 by separated formed mutually insulated each portion
Point, each connection sheet connects muscle elevated regions has a conductive section to be removed so that described connection sheet each several part is the most electrical
Separate.Connect the various piece welding effect by scolding tin 490 of sheet 450, connect the gate contact zone of LS MOSFET 410 respectively
The gate contact zone 421 of 411 and HS MOSFET 420, and contact area, the source 412 and HS MOSFET 420 of LS MOSFET 410
Contact area, source 422, thus the position of fixing LS MOSFET 410 and HS MOSFET 420, connect on sheet 450 with LS
The gate contact zone 411,421 of MOSFET 410 and HS MOSFET 420 and the corresponding position of contact area, source 412,422 are provided with hollow
Columned recessed post 452, the end 451 of connection sheet 450 is connected with external circuit as the pin of chip, as shown in figure 18b, figure
18B is Figure 18 A sectional view along line A-A, and it is internal that line A-A is just passed through recessed post 452, therefore can be clearly visible recessed post in Figure 18 B
452, when plastic-sealed body 470 plastic packaging, fill up in recessed post 452, so that the good package interior of plastic packaging that plastic-sealed body is more stable
All parts, as shown in figure 18 c, the top of plastic-sealed body 470 expose connect sheet 450 disconnected cross section 4531, in addition connect sheet 450
It is provided with dogleg section 455, the bottom leakage of the three-dimensional top source contact area connecting HS MOSFET 420 and LS MOSFET 410
Contact area, thus connect HS MOSFET 420 and LS MOSFET 410.In a preferred embodiment, an insulant is also used
It is covered with the grinding top (not shown) of plastic-sealed body 470 so that expose the disconnected cross section 4531 connecting sheet 450 of plastic-sealed body 470
It is covered with by top insulation cover material.Described insulation cover material includes the capsulation material of plastic-sealed body 470.
With connecting the method that sheet realizes the semiconductor package body connected, with low limit metal oxide semiconductor field effect transistor
As a example by tube device and flash metal oxide semiconductor field effect tube packaging altogether, flow chart as shown in figure 19, including with
Lower step: as shown in Figure 20 A and Figure 20 B, first a, it is provided that base panel frame, base panel frame includes base panel frame the first chip
Seat 430 and base panel frame the second chip carrier 440, base panel frame is provided with base panel frame and connects muscle 431,441, base panel frame pin
442 and base panel frame bottom 432,443;Secondly, it is provided that two chips, two chips are respectively low limit metal-oxide semiconductor (MOS)
Field-effect transistor (LS MOSFET) 410 and flash metal oxide semiconductor field effect tube (HS MOSFET) 420, LS
The top contact district of MOSFET 410 is respectively gate contact zone 411 and contact area, source 412, and bottom it, contact area is drain contact district
(not shown), the top contact district of HS MOSFET 420 is respectively gate contact zone 421 and contact area, source 422, connects bottom it
Tactile district is drain contact district (not shown), and LS MOSFET 410 and HS MOSFET 420 correspondence respectively is set by binding agent 480
Put on base panel frame the first chip carrier 430 and base panel frame the second chip carrier 440, LS MOSFET 410 and HS MOSFET
The drain contact district, bottom of 420 is electrically connected with each self-corresponding base panel frame chip carrier respectively;Then, such as Figure 21 A, Figure 21 B and
Shown in Figure 21 C, it is provided that one connects sheet 450, and connection sheet 450 is provided with multiple connection sheet and connects muscle elevated regions 453 and 454, uses
In the various piece of connection sheet 450, it is directed at the top contact district of the LS MOSFET 410 and MOSFET 420 that arranged, even
Contact pin 450 connects the gate contact zone 411 and HS MOSFET 420 of LS MOSFET 410 respectively by the welding effect of scolding tin 490
Gate contact zone 421, and the contact area, source 422 of contact area, the source 412 and HS MOSFET 420 of LS MOSFET 410, connect
Sheet connects muscle elevated regions 453 and 454 and and exceeds chip surface in chip surface vertical direction, is provided with it addition, connect sheet 450
Dogleg section 455 downward bending, the three-dimensional top source contact area connecting HS MOSFET 320 and the bottom of LS MOSFET 410
Drain contact district, therefore connects sheet 450 and makes the position of LS MOSFET 410 and HS MOSFET 420 fix, connect sheet 450 and core
Sheet top contact position is respectively equipped with recessed post 452, and the end 451 of connection sheet 450 can with external circuit even as the pin of chip
Connect;Then, as shown in figure 22, it is provided that a plastic-sealed body 470, plastic-sealed body 470 plastic packaging fills full recessed post 452 and recessed post 462, encapsulates base
Plate framework, chip and connection sheet;Finally, the top layer at plastic-sealed body 470 grinds, and the multiple connection sheets rubbing connection sheet 450 connect muscle
Elevated regions 453 and 454, exposes and connects sheet and connect the disconnected cross section 4531 of muscle elevated regions 453 and connect sheet and connect muscle elevated regions 454
Disconnected cross section 4541, be divided into four of each mutually insulated connection sheets by connecting sheet 450.Owing to passing through in this encapsulation process
Connect sheet 450 two chips of fixing connection, after plastic packaging, cut cutting connection contact pin by shallow-layer again, thus in encapsulation process,
Position between chip is more fixed, and is not result in chip and base panel frame and the changing of the relative positions being connected between sheet.It is preferable to carry out one
In example, also it is covered with the grinding top (not shown) of plastic-sealed body 470 with an insulant so that expose the company of plastic-sealed body 470
The disconnected cross section 4531 of contact pin 450 is covered with by top insulation cover material.Described insulation cover material includes moulding of plastic-sealed body 470
Closure material.
Above embodiment described with having connection sheet two chips of fixing connection that connection sheet connects and composes, by first sealing
Then dress separates connection sheet in the mode of packaging body top shallow-layer cutting, or then grinds at encapsulation top by first encapsulating
Mode separate connection sheet;Additionally also illustrate and fix encapsulating structure and the method connecting two chips with two connection sheets.
When reality is applied, can connect multiple chips by multiple connection sheets are fixing, this chip is not limited to upper die and lower tube core
The combination of sheet, it is possible to be applicable to the combination of chip superposed.This kind of packaged type, it is ensured that position when chip is installed is fixed, and makes core
Sheet avoids dislocation to affect the circuit performance of chip in industrial manufacturing process, and additionally this method for packing adds drawing of encapsulation
Foot, technological operation is simple, and method of attachment is flexible.According to different circuit design with select different semiconductor chip, than
As when the bottom electrode of the first chip and the second chip can electrically connect or all of electrode is all located at chip upper surface, first
Chip and the second chip are also optional to be placed on same chip seat, not even with integrated chip on the same chip;Also may be used
Selecting not use base panel frame only the bottom surface of chip to be exposed to plastic-sealed body bottom surface to be connected with external circuit, so encapsulating
During provide the step of base panel frame and the step being fixed in base panel frame by position chip just can omit, whole encapsulated
Journey only includes the multiple chips of offer, provides connection sheet to connect the top contact district being directed at arrangement between chip respectively, and offer is moulded
Envelope body and the step of cutting connection contact pin.The all of electrode of chip upper surface all can by connect sheet electrically insulated from one another each
Part is connected with external circuit.
It is necessary, of course, to recognize, above-mentioned introduction is the explanation about the preferred embodiment of the present invention, without departing from institute subsequently
Spirit and scope shown by attached claim, the present invention there is also many amendments.
The present invention is limited only to the details shown by described above or accompanying drawing and method by no means.The present invention can have it
Its embodiment, and various ways can be used to be practiced.It addition, everybody it must also be recognized that, wording used herein above and
Term and digest are intended merely to the purpose realizing introducing, and are limited only to this by no means.
Just because of this, it will be appreciated by those skilled in the art that the viewpoint that the present invention is based on can be used as at any time
Implement several targets of the present invention and design other structure, method and system.So, it is essential, appended right is wanted
Ask the construction by being considered to include all these equivalence, as long as they are without departing from the spirit and scope of the present invention.
Claims (4)
1. with connecting the method that sheet realizes the semiconductor package body connected, it is characterised in that comprise the following steps:
Step 1: provide several chip, described chip to include several top contact district;
Step 2: provide several connection sheet, each connection sheet to connect the top contact district being directed at arrangement between chip respectively, thus
Fixing several chips, and connect and there is in chip surface vertical direction on sheet and exceed the connection sheet of chip surface to connect muscle protruding
Region;
Step 3 a: plastic-sealed body, described plastic-sealed body encapsulation chip and connection sheet are provided;
Step 4: the top layer at plastic-sealed body connects sheet by shallow-layer cutting and connects muscle elevated regions formation cutting irrigation canals and ditches, or grinding is moulded
Seal the top of body thus rub described connection sheet and connect muscle elevated regions;By described cutting irrigation canals and ditches or rub described connection sheet and connect muscle
The sheet that connects in several connection chip top contact districts is divided into company's tab portion of each mutually insulated by elevated regions.
2. as claimed in claim 1 with connecting the method that sheet realizes the semiconductor package body connected, it is characterised in that described
Several chips include low limit MOSFET device and flash metal oxide semiconductor field-effect
Tube device.
3. as claimed in claim 2 with connecting the method that sheet realizes the semiconductor package body connected, it is characterised in that described
Low limit MOSFET device and the top of flash metallic oxide semiconductor field effect tube
Contact area is respectively gate contact zone and contact area, source, and bottom it, contact area is drain contact district.
4. with connecting the method that sheet realizes the semiconductor package body connected, it is characterised in that comprise the following steps:
Step 1: providing a base panel frame, described base panel frame is with several base panel frame external pins, described substrate
Framework comprises several chip carrier, is used for placing several chip;
Step 2: provide several chip, described chip to include several top contact district and contact area, bottom, by described several
Chip is respectively adhered on each chip carrier of base panel frame, and the contact area, bottom of each chip is connected electrically in base panel frame
On;
Step 3: provide several connection sheet, each connection sheet to connect the top contact district being directed at arrangement between chip respectively, thus
Fixing several chips, and connect and there is in chip surface vertical direction on sheet and exceed the connection sheet of chip surface to connect muscle protruding
Region;
Step 4 a: plastic-sealed body, described plastic-sealed body base plate for packaging framework, chip and connection sheet are provided;
Step 5: the top layer at plastic-sealed body connects sheet by shallow-layer cutting and connects muscle elevated regions, forms cutting irrigation canals and ditches, and described cuts
Cut irrigation canals and ditches and the sheet that connects in several connection chip top contact districts is divided into company's tab portion of each mutually insulated.
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CN201310598205.XA CN103824784B (en) | 2010-05-05 | 2010-05-05 | With connecting the method that sheet realizes the semiconductor packages connected |
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CN201310598205.XA CN103824784B (en) | 2010-05-05 | 2010-05-05 | With connecting the method that sheet realizes the semiconductor packages connected |
CN201010178158.XA CN102237343B (en) | 2010-05-05 | 2010-05-05 | Semiconductor package realizing connection by connecting sheets and manufacturing method for semiconductor package |
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CN105720030B (en) * | 2014-12-04 | 2018-07-31 | 万国半导体股份有限公司 | Encapsulating method and structure based on small-sized gate metal piece and sheet metal frame |
CN106298739B (en) * | 2015-06-12 | 2018-11-13 | 万国半导体股份有限公司 | A kind of power device and preparation method |
CN111739810B (en) * | 2020-06-22 | 2022-09-30 | 矽磐微电子(重庆)有限公司 | Semiconductor packaging method and semiconductor device |
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CN1157057A (en) * | 1995-05-12 | 1997-08-13 | 菲利浦电子有限公司 | Method of manufacturing semiconductor device suitable for surface mounting |
CN101097908A (en) * | 2006-06-26 | 2008-01-02 | 三洋电机株式会社 | Semiconductor device |
CN101572239A (en) * | 2008-04-18 | 2009-11-04 | 英飞凌科技股份有限公司 | Semiconductor module |
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US7776658B2 (en) * | 2008-08-07 | 2010-08-17 | Alpha And Omega Semiconductor, Inc. | Compact co-packaged semiconductor dies with elevation-adaptive interconnection plates |
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CN1157057A (en) * | 1995-05-12 | 1997-08-13 | 菲利浦电子有限公司 | Method of manufacturing semiconductor device suitable for surface mounting |
CN101097908A (en) * | 2006-06-26 | 2008-01-02 | 三洋电机株式会社 | Semiconductor device |
CN101572239A (en) * | 2008-04-18 | 2009-11-04 | 英飞凌科技股份有限公司 | Semiconductor module |
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