CN103762237A - Transverse power device with field plate structure - Google Patents
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/65—Lateral DMOS [LDMOS] FETs
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- H—ELECTRICITY
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/111—Field plates
- H10D64/112—Field plates comprising multiple field plate segments
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Abstract
一种具有场板结构的横向功率器件，包括半导体衬底、位于所述半导体衬底表面的栅介质层、位于所述栅介质层表面的栅极、位于所述栅极两侧的源电极和漏电极、位于所述栅介质层表面的第一介质层、位于所述第一介质层和所述栅介质层之间的第二介质层和位于所述第一介质层和所述第二介质层表面的金属场板；所述金属场板靠近源电极的一端与所述栅极接触；所述第一介质层面向所述源电极的端面到源电极的距离大于所述第二介质层面向所述源电极的端面到源电极的距离。本发明的优点在于通过引入多个电场峰值，以削弱场板边缘的峰值电场、进一步提高击穿电压，同时降低器件的功耗。
A lateral power device with a field plate structure, comprising a semiconductor substrate, a gate dielectric layer located on the surface of the semiconductor substrate, a gate located on the surface of the gate dielectric layer, source electrodes located on both sides of the gate, and The drain electrode, the first dielectric layer on the surface of the gate dielectric layer, the second dielectric layer between the first dielectric layer and the gate dielectric layer, and the first dielectric layer and the second dielectric layer The metal field plate on the surface of the layer; the end of the metal field plate close to the source electrode is in contact with the grid; the distance from the end face of the first dielectric layer facing the source electrode to the source electrode is greater than that of the second dielectric layer facing the The distance from the end surface of the source electrode to the source electrode. The invention has the advantages of weakening the peak electric field at the edge of the field plate by introducing multiple electric field peaks, further improving the breakdown voltage and reducing the power consumption of the device at the same time.
Description
技术领域 technical field
本发明涉及一种具有场板结构的横向功率器件，特别涉及一种具有高K栅介质和复合介质阶梯场板结构的横向功率器件，属于微电子与固体电子学技术领域。 The invention relates to a lateral power device with a field plate structure, in particular to a lateral power device with a high-K grid dielectric and a compound dielectric stepped field plate structure, and belongs to the technical field of microelectronics and solid electronics.
背景技术 Background technique
功率集成电路有时也称高压集成电路，是现代电子学的重要分支，可为各种功率变换和能源处理装置提供高速、高集成度、低功耗和抗辐照的新型电路，广泛应用于电力控制系统、汽车电子、显示器件驱动、通信和照明等日常消费领域以及国防、航天等诸多重要领域。其应用范围的迅速扩大，对其核心部分的高压器件也提出了更高的要求。在功率集成电路中，横向双扩散金属氧化物半导体场效应管（LDMOS）发挥着重要的作用。横向结构更有利于新一代的高密度功率集成应用，是当代功率器件研究的热点。 Power integrated circuits are sometimes called high-voltage integrated circuits, which are an important branch of modern electronics. They can provide new circuits with high speed, high integration, low power consumption and radiation resistance for various power conversion and energy processing devices, and are widely used in electric power Daily consumption fields such as control systems, automotive electronics, display device drivers, communications and lighting, as well as many important fields such as national defense and aerospace. The rapid expansion of its application scope has also put forward higher requirements for the high-voltage devices in its core part. In power integrated circuits, lateral double-diffused metal-oxide-semiconductor field-effect transistors (LDMOS) play an important role. The lateral structure is more conducive to the new generation of high-density power integration applications, and is a hot spot in the research of contemporary power devices.
场板结构是一种提高功率器件击穿电压的技术。场板结构在横向高压器件中被广泛应用，可以使半导体表面一部分区域内的电通量转移到另一部分，尤其可以将电力线密集区域的电通量优化到电场较弱的区域，实现优化器件内电势线分布的目的。 Field plate structure is a technique to increase the breakdown voltage of power devices. The field plate structure is widely used in lateral high-voltage devices, which can transfer the electric flux in one part of the semiconductor surface to another part, especially optimize the electric flux in the area with dense power lines to the area with weaker electric field, and realize the optimized device. The purpose of electric potential line distribution.
为了提高击穿电压，一些场板结构被提出，包括斜坡式场板结构和单阶梯场板结构等。斜坡式场板结构可以调节器件内部的电通量分布，实现优化器件内电势线分布的目的，但是其缺点在于难以在工艺上实现。单阶梯场板结构可以引入电场峰值，但效果不明显，需要对器件的结构进行优化。 In order to improve the breakdown voltage, some field plate structures have been proposed, including sloped field plate structure and single stepped field plate structure. The slope type field plate structure can adjust the electric flux distribution inside the device and achieve the purpose of optimizing the potential line distribution in the device, but its disadvantage is that it is difficult to realize in the process. The single-step field plate structure can introduce electric field peaks, but the effect is not obvious, and the structure of the device needs to be optimized.
发明内容 Contents of the invention
本发明所要解决的技术问题是，提供一种具有场板结构的横向功率器件，通过引入多个电场峰值，以削弱场板边缘的峰值电场、进一步提高击穿电压。 The technical problem to be solved by the present invention is to provide a lateral power device with a field plate structure, which can weaken the peak electric field at the edge of the field plate and further increase the breakdown voltage by introducing multiple electric field peaks. the
为了解决上述问题，一种具有场板结构的横向功率器件，包括半导体衬底、位于所述半导体衬底表面的栅介质层、位于所述栅介质层表面的栅极、位于所述栅极两侧的源电极和漏电极、位于所述栅介质层表面的第一介质层、位于所述第一介质层和所述栅介质层之间的第二介质层和位于所述第一介质层和所述第二介质层表面的金属场板；所述金属场板靠近源电极的一端与所述栅极接触；所述第一介质层面向所述源电极的端面到源电极的距离大于所述第二介质层面向所述源电极的端面到源电极的距离。 In order to solve the above problems, a lateral power device with a field plate structure includes a semiconductor substrate, a gate dielectric layer located on the surface of the semiconductor substrate, a gate located on the surface of the gate dielectric layer, and a gate located on both sides of the gate The source electrode and the drain electrode on the side, the first dielectric layer located on the surface of the gate dielectric layer, the second dielectric layer located between the first dielectric layer and the gate dielectric layer, and the first dielectric layer and the The metal field plate on the surface of the second dielectric layer; the end of the metal field plate close to the source electrode is in contact with the gate; the distance from the end surface of the first dielectric layer facing the source electrode to the source electrode is greater than the The distance from the end face of the second dielectric layer facing the source electrode to the source electrode.
可选地，所述半导体衬底表面包括位于所述源电极相对应位置的源极、位于所述漏电极相对应位置的漏极、位于所述栅极之下的阱区、位于所述阱区和所述漏极之间的漂移区和体接触区，所述体接触区位于所述源极旁，与所述阱区相接触，所述源极、所述漏极和所述漂移区均具有第一导电类型，所述阱区和所述体接触区具有第二导电类型。 Optionally, the surface of the semiconductor substrate includes a source electrode located at a position corresponding to the source electrode, a drain electrode located at a position corresponding to the drain electrode, a well region located under the gate electrode, a well region located at the position of the well A drift region and a body contact region between the region and the drain, the body contact region is located next to the source and is in contact with the well region, the source, the drain and the drift region Both have a first conductivity type, and the well region and the body contact region have a second conductivity type.
可选地，所述第一导电类型为N型，所述第二导电类型为P型。 Optionally, the first conductivity type is N type, and the second conductivity type is P type.
可选地，所述第一导电类型为P型，所述第二导电类型为N型。 Optionally, the first conductivity type is P-type, and the second conductivity type is N-type.
可选地，所述半导体衬底包括支撑衬底、有源层和位于所述支撑衬底和有源层之间的绝缘埋层。 Optionally, the semiconductor substrate includes a supporting substrate, an active layer, and an insulating buried layer between the supporting substrate and the active layer.
可选地，所述第一介质层为SiO2介质层，所述第二介质层为Si3N4介质层。 Optionally, the first dielectric layer is a SiO 2 dielectric layer, and the second dielectric layer is a Si 3 N 4 dielectric layer.
本发明的优点在于，在传统单阶梯场板结构的基础上，采用多阶梯场板的结构，引入多个电场峰值，平滑了整个漂移区的电场分布，提高了器件的耐压能力。 The advantage of the present invention is that on the basis of the traditional single-step field plate structure, a multi-step field plate structure is adopted to introduce multiple electric field peaks, smooth the electric field distribution in the entire drift region, and improve the withstand voltage capability of the device.
附图说明 Description of drawings
附图1示出根据具体实施方式的具有场板结构的横向功率器件的示意图。 Figure 1 shows a schematic diagram of a lateral power device with a field plate structure according to a specific embodiment.
具体实施方式 Detailed ways
下面结合附图对本发明提供的具有场板结构的横向功率器件的具体实施方式做详细说明。 The specific implementation manner of the lateral power device with field plate structure provided by the present invention will be described in detail below with reference to the accompanying drawings.
参考附图1所示是根据本具体实施方式的具有场板结构的横向功率器件的示意图，包括半导体衬底14、位于所述半导体衬底14表面的栅介质层5、位于所述栅介质层5表面的栅极16、位于所述栅极16两侧的源电极1和漏电极6、位于所述栅介质层5表面的第一介质层3、位于所述第一介质层3和所述栅介质层5之间的第二介质层4和位于所述第一介质层3和所述第二介质层4表面的金属场板2；所述金属场板2靠近源电极1的一端与所述栅极16接触；所述第一介质层3面向所述源电极1的端面到源电极1的距离大于所述第二介质层4面向所述源电极1的端面到源电极1的距离。 1 is a schematic diagram of a lateral power device with a field plate structure according to this specific embodiment, including a semiconductor substrate 14, a gate dielectric layer 5 positioned on the surface of the semiconductor substrate 14, and a gate dielectric layer positioned on the surface of the semiconductor substrate 14. 5, the gate 16 on the surface of the gate 16, the source electrode 1 and the drain electrode 6 on both sides of the gate 16, the first dielectric layer 3 on the surface of the gate dielectric layer 5, the first dielectric layer 3 and the The second dielectric layer 4 between the gate dielectric layer 5 and the metal field plate 2 located on the surface of the first dielectric layer 3 and the second dielectric layer 4; the end of the metal field plate 2 close to the source electrode 1 is connected to the The distance between the end surface of the first dielectric layer 3 facing the source electrode 1 and the source electrode 1 is greater than the distance between the end surface of the second dielectric layer 4 facing the source electrode 1 and the source electrode 1 .
本具体实施方式中的半导体衬底14为单晶硅衬底，在其他的实施方式中，所述半导体衬底14也可以是锗硅、应变硅以及其他化合物半导体衬底，如氮化镓或者砷化镓等。也可以是上述以及其他常见的半导体材料组成的多层复合衬底结构。 The semiconductor substrate 14 in this specific embodiment is a single crystal silicon substrate. In other embodiments, the semiconductor substrate 14 can also be silicon germanium, strained silicon, or other compound semiconductor substrates, such as gallium nitride or gallium arsenide etc. It can also be a multi-layer composite substrate structure composed of the above and other common semiconductor materials.
本具体实施方式中的栅介质层5为高K栅介质层，采用高K栅介质层可以在获得相同的阈值电压的前提下，使用更高的沟道掺杂浓度。沟道掺杂浓度的提高，有利于降低沟道穿通击穿的风险，可以在保持耐压能力的前提下，缩短沟道长度，从而降低器件的开态电阻。 The gate dielectric layer 5 in this specific embodiment is a high-K gate dielectric layer, and a higher channel doping concentration can be used on the premise of obtaining the same threshold voltage by using a high-K gate dielectric layer. The increase of channel doping concentration is beneficial to reduce the risk of channel punch-through breakdown, and can shorten the channel length while maintaining the withstand voltage capability, thereby reducing the on-state resistance of the device.
在本具体实施方式中，所述半导体衬底14表面包括位于所述源电极1相对应位置的源极12、位于所述漏电极6相对应位置的漏极7、位于所述栅极16之下的P阱10、位于所述P阱10和所述漏极7之间的N型漂移区13和P型体接触区11，所述P型体接触区11位于所述源极12旁，与所述P阱10相接触，所述源极12、所述漏极7为N型掺杂。所述P型体接触区11用于引出所述P阱10聚集的多余电荷，避免浮体效应。在功率集成电路中，横向双扩散金属氧化物半导体场效应管（LDMOS）具有多种结构，本实施方式仅是一种优选的实施方式，在具体制作时也可以选择其他结构的横向双扩散金属氧化物半导体场效应管（LDMOS）或者有其他的变化。 In this specific embodiment, the surface of the semiconductor substrate 14 includes the source electrode 12 located at the corresponding position of the source electrode 1, the drain electrode 7 located at the corresponding position of the drain electrode 6, and the drain electrode 7 located at the corresponding position of the gate electrode 16. The lower P well 10, the N-type drift region 13 between the P well 10 and the drain 7 and the P-type body contact region 11, the P-type body contact region 11 is located next to the source 12, In contact with the P well 10, the source 12 and the drain 7 are N-type doped. The P-type body contact region 11 is used to extract excess charges accumulated in the P-well 10 to avoid the floating body effect. In power integrated circuits, lateral double-diffused metal-oxide-semiconductor field-effect transistors (LDMOS) have various structures. This embodiment is only a preferred embodiment, and lateral double-diffused metals with other structures can also be selected during specific fabrication. Oxide Semiconductor Field Effect Transistor (LDMOS) or other variations.
在本具体实施方式中，所述半导体衬底14包括支撑衬底9、有源层15和位于所述支撑衬底9和有源层15之间的绝缘埋层8。所述绝缘埋层8的存在可以实现介质隔离，有效地实现高、低功率模块，以及高、低电压器件之间的隔离，彻底消除电干扰，简化器件的结构设计。然而在其它的具体实施方式中，所述半导体衬底也可以是不包含绝缘埋层的体衬底材料，这并不影响后续采用场板技术对器件进行性能优化。 In this specific embodiment, the semiconductor substrate 14 includes a supporting substrate 9 , an active layer 15 and an insulating buried layer 8 located between the supporting substrate 9 and the active layer 15 . The existence of the insulating buried layer 8 can realize dielectric isolation, effectively realize the isolation between high and low power modules, and high and low voltage devices, completely eliminate electrical interference, and simplify the structural design of devices. However, in other specific implementation manners, the semiconductor substrate may also be a bulk substrate material that does not include an insulating buried layer, which does not affect the subsequent performance optimization of devices using field plate technology.
本具体实施方式中所述第一介质层3为SiO2介质层，所述第二介质层4为Si3N4介质层。本实施方式仅是一种优选的实施方式，在具体制作时也可以选择其他介质材料制作场板介质层或者有其他的变化。 In this specific embodiment, the first dielectric layer 3 is a SiO 2 dielectric layer, and the second dielectric layer 4 is a Si 3 N 4 dielectric layer. This embodiment is only a preferred embodiment, and other dielectric materials may be selected to make the field plate dielectric layer or other changes may be made during specific fabrication.
本具体实施方式中采用二层阶梯场板结构，在具体实施时也可以制作多层阶梯场板结构，本实施方式仅是一种优选的实施方式，具体制作时也可以有其他的变化。 In this specific embodiment, a two-layer stepped field plate structure is adopted, and a multi-layer stepped field plate structure can also be fabricated during specific implementation. This embodiment is only a preferred embodiment, and other changes can also be made during specific fabrication.
本发明提供的具有场板结构的横向功率器件的优点在于：场板结构可以使半导体表面一部分区域内的电通量转移到另一部分，尤其可以将电力线密集区域的电通量优化到电场较弱的区域，实现优化器件内电势线分布的目的。同时，多阶梯场板结构在漂移区内引入额外的多个电场峰值，从而平滑了整个漂移区的电场分布，提高了器件的耐压能力。同时，由源端到漏端的场板介质层厚度不断增大，有利于保持较小的栅漏电容，以保证器件的开关速度。并且由于沟道/漂移区位置的电场强度被抑制，可以使用更高的漂移区掺杂浓度，这有利于降低器件漂移区电阻，从而实现降低器件功耗的目的。 The advantage of the lateral power device with the field plate structure provided by the present invention is that the field plate structure can transfer the electric flux in a part of the semiconductor surface area to another part, and can especially optimize the electric flux in the area with dense electric lines to a weaker electric field area, to achieve the purpose of optimizing the distribution of potential lines in the device. At the same time, the multi-step field plate structure introduces additional multiple electric field peaks in the drift region, thereby smoothing the electric field distribution in the entire drift region and improving the withstand voltage capability of the device. At the same time, the thickness of the field plate dielectric layer from the source end to the drain end increases continuously, which is conducive to maintaining a small gate-drain capacitance to ensure the switching speed of the device. And because the electric field intensity at the position of the channel/drift region is suppressed, a higher doping concentration of the drift region can be used, which is beneficial to reduce the resistance of the drift region of the device, thereby achieving the purpose of reducing power consumption of the device.
以上所述仅是本发明的优选实施方式，应当指出，对于本技术领域的普通技术人员，在不脱离本发明原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也应视为本发明的保护范围。 The above is only a preferred embodiment of the present invention, it should be pointed out that for those of ordinary skill in the art, without departing from the principle of the present invention, some improvements and modifications can also be made, and these improvements and modifications should also be considered Be the protection scope of the present invention. the
Claims (6)
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| CN111180528A (en) * | 2020-02-14 | 2020-05-19 | 重庆邮电大学 | Three-order inclined mesa junction terminal structure of SiC Schottky diode |
| CN112635541A (en) * | 2019-10-08 | 2021-04-09 | 无锡华润上华科技有限公司 | LDMOS device and preparation method thereof |
| CN116913963A (en) * | 2023-09-06 | 2023-10-20 | 深圳智芯微电子科技有限公司 | GaN devices |
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| CN112635541B (en) * | 2019-10-08 | 2022-08-12 | 无锡华润上华科技有限公司 | LDMOS device and preparation method thereof |
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