CN103754817B - Three-dimensional perpendicular interconnection silicon based opto-electronics simultaneous interpretation device and preparation method thereof - Google Patents
Three-dimensional perpendicular interconnection silicon based opto-electronics simultaneous interpretation device and preparation method thereof Download PDFInfo
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Abstract
The invention discloses a kind of three-dimensional perpendicular interconnection silicon based opto-electronics simultaneous interpretation device and preparation method thereof, wherein photoelectricity simultaneous interpretation device comprises silicon substrate, silicon substrate is provided with layers of copper, horizontal wave conducting shell and top covering; Described silicon substrate is provided with vertical silicon through hole and vertical light through hole, layers of copper is laid with wiring pattern, horizontal wave conducting shell is provided with photovoltaic interconnects hole and del speculum, top covering is provided with the opening be communicated with photovoltaic interconnects hole, photovoltaic interconnects hole and opening are electroplate with interconnecting metal.Preparation method comprises photoetching vertical light through hole, vertical silicon through hole, makes dielectric layer, makes vertical waveguide sandwich layer and horizontal wave conducting shell, forms the steps such as the interconnection of metal RDL layer.The present invention manufactures while can completing horizon light waveguide and vertical light waveguide on a silicon substrate, the object of conduction mutually between the horizon light interconnection of fiber waveguide and the electrical interconnection of perpendicular interconnection, vertical direction and horizontal direction and photoelectricity is achieved in same packaging body, manufacture craft is simple, with low cost.
Description
Technical field
The present invention relates to integrated electronic technical field, particularly a kind of three-dimensional photoelectricity simultaneous interpretation device and preparation method thereof.
Background technology
Existing integrated circuit mostly is two-dimensional integrated circuit, and two station integrated circuits refer to by the distribution side by side of the various components and parts of integrated circuit in one plane.Along with integrated level improves constantly, the device cell quantity on every sheet sharply increases, and chip area increases, and between unit, the growth of line not only affects circuit working speed but also take a lot of area, has a strong impact on integrated circuit and improves integrated level and operating rate further.So produce three-dimensional integrated new technology thinking.Three dimensional integrated circuits multilayer device overlay structure can significantly improve chip integration, and overlay structure makes unit line shorten, and makes Parallel signal processing become possibility, thus the high speed operation of realizing circuit, there is plurality of advantages; But due to the design of multilayer circuit, there is more complicated electrical interconnection conduction, will inevitably limit in bandwidth, electromagnetic interference, delay, occur the technical barrier that is difficult to overcome in energy consumption, make the growth rate of information input and output cannot the processing speed of match information.Light network technology has great bandwidth resources and the information that can realize easily is intersected and reuse benefits, single transmission channel can be made to realize the transmission of mass data, and independent of one another between different channels optical signal, there will not be intersection and crosstalk phenomenon, is therefore the desirable technique of alternative electrical interconnection.At present in the application of light network technology, be mostly be embodied in the two dimension interconnection realizing optical signalling by horizon light waveguide based on silica-based interposer and the research of photoelectricity perpendicular interconnection manufactured by vertical light waveguide and TSV integration, and vertical light waveguide and horizon light waveguide integration manufactured and transmission and to use and the research of fiber waveguide manufacture method of interposer process compatible is also in blank.
In addition, even if adopt light network technology, because the surface of wiring board needs welding electronic component, therefore wiring board also needs the factor considering optical signal switching electrical signals and signal of telecommunication transmitting photo-signal in the design process.Be at present only based on the separately integrated mode of light interposer and electric interposer for photoelectricity mutual teach skill art in the integrated middle application of three-dimensional, the real fusion that three-dimensional integrated middle photoelectricity passes mutually cannot be realized.
Summary of the invention
The technical problem that the present invention solves be to provide a kind of three-dimensional integrated in pass device and preparation method thereof mutually based on the photoelectricity of silica-based interposer, with the object of conduction mutually between the electrical interconnection of the horizon light interconnection and perpendicular interconnection, vertical direction and horizontal direction that realize fiber waveguide in same packaging body and photoelectricity.
For solving the problems of the technologies described above, the technical solution used in the present invention is as follows.
Three-dimensional perpendicular interconnection silicon based opto-electronics simultaneous interpretation device, comprises silicon substrate, described silicon substrate is disposed with insulating barrier, dielectric layer, layers of copper, horizontal wave conducting shell and top covering; Described silicon substrate is vertically installed with the vertical silicon through hole and vertical light through hole that are communicated with layers of copper, layers of copper between described neighboring vertical silicon through hole is laid with the wiring pattern be communicated with horizontal wave conducting shell, sandwich layer in described vertical light through hole and horizontal wave conducting shell are connected as a single entity, the photovoltaic interconnects hole that described horizontal wave conducting shell being provided with to misplace with wiring pattern arranges and the del speculum of corresponding vertical light through hole lateral wall, described top covering is provided with the opening be communicated with photovoltaic interconnects hole; Described photovoltaic interconnects hole and opening are electroplate with interconnecting metal.
The preparation method of three-dimensional perpendicular interconnection silicon based opto-electronics simultaneous interpretation device, mainly comprises the following steps: manufacture vertical light through hole and vertical silicon through hole by photoetching, etching or sputtering technology first on a silicon substrate; Next is square evaporation layers of copper on a silicon substrate; Then the PI material of light sensitivity is adopted to be completed the making of vertical light through hole sandwich layer and horizontal wave conducting shell by whirl coating and exposure technology; The last interconnection forming metal RDL layer above horizontal wave conducting shell.
Three-dimensional perpendicular interconnection silicon based opto-electronics simultaneous interpretation device manufacture method specifically comprises the following steps:
The first step, in the some blind holes perpendicular to silicon substrate of silicon substrate front etching, blind hole comprises vertical silicon through hole and the vertical light through hole of finished product;
Second step, at silicon substrate and blind hole deposited on sidewalls insulating barrier;
3rd step, coating dry film is as photoresist, and the dry film place above the blind hole of corresponding vertical light through hole carries out photoetching and forms through hole;
4th step, after dry film photoetching development, fills outsourcing layer in exposed vertical light through hole;
5th step, peels off dry film, removes outsourcing layer residual on dry film simultaneously;
6th step, adopts PVD deposition techniques dielectric layer;
7th step, in vertical silicon through hole, electro-coppering is filled, and anneals;
8th step, evaporation one deck underlying metal, then sputters copper and forms layers of copper on underlying metal;
9th step, mask, photoetching, etching front layers of copper above the silicon substrate between neighboring vertical silicon through hole, form wiring pattern; And etch the layers of copper be positioned at above vertical light through hole;
Tenth step, the outsourcing layer in etching vertical light through hole, form a ring shape surrounding layer, the thickness of annular surrounding layer is at 3 ~ 10 μm;
11 step, fills waveguide material in wiring pattern and vertical light through hole, and fills waveguide material formation horizontal wave conducting shell at layers of copper upper surface;
12 step, forms horizontal waveguide, photovoltaic interconnects hole in horizontal wave conducting shell etching, and horizontal wave conducting shell above corresponding vertical light through hole lateral wall etches del speculum;
13 step, to the electro-coppering of photovoltaic interconnects hole;
14 step, above horizontal wave conducting shell, the photosensitive PI material of spin coating makes top covering, and photoetching on top covering, development, solidification offer opening;
15 step, in the opening of top covering, electro-coppering forms UBM;
16 step, the thinning silicon substrate back side;
17 step, repeats the first step to the 15 step, completes the waveguide of bottom or the making at distribution layer at the silicon substrate back side.
The improvement of preparation method the 6th step is: described dielectric layer comprises the diffusion impervious layer, adhesion layer and the Seed Layer that upwards set gradually from insulating barrier, and the preferred TiN/Ti/Cu combination of diffusion impervious layer, adhesion layer and Seed Layer, thickness gets 200nm/200nm/1000nm.
The improvement of preparation method the tenth step is: described in the tenth step, etching selects dry etching or laser ablation.
The improvement of preparation method the 12 step: del speculum described in the 12 step is by the del waveguide shapes exposing, develop, post bake obtains needs, and the shape of del speculum is the equilateral triangle stood upside down.
Owing to have employed above technical scheme, the invention technological progress is as follows.
The present invention manufactures while can completing horizon light waveguide and vertical light waveguide in silica-based interposer, the object of conduction mutually between the horizon light interconnection of fiber waveguide and the electrical interconnection of perpendicular interconnection, vertical direction and horizontal direction and photoelectricity is achieved in same packaging body, manufacture craft is simple, with low cost.
Adopt the photoelectricity simultaneous interpretation device that the present invention makes, have the following advantages: one, decrease encapsulation level, in a large number under traditional integration mode can only with sheet between the logic interconnection that realizes of communication mode can become in sheet and interconnect, remarkable reduction prong sizes, improves integrated level; Its two, the integrated permission of three-dimensional photoelectricity carries out space wiring in three-dimensional mode to circuit, light path module, thus significantly shortens wire length on sheet, improves transmission speed and reduces power consumption; Its three, three-dimensional photoelectricity is integrated by the initial technology that realized by non-CMOS with integrate based on CMOS technology, allows the chip of different process integrated in a natural manner, forms accurate SOC system.Therefore photoelectron three-dimensional is integrated, active, passive and photon, electronic chip are directly integrated in Opto-electronic system, the perpendicular interconnection of the signal of telecommunication and optical signal can be realized simultaneously, the 3D electronic integrated circuit that be combined with each other and photonic interconnections can be made to display one's respective advantages, integrated system and on-chip integration system between the sheet realizing high density, high-performance, low-power consumption, for solve multiple I/O interconnect, pin miniaturization, high-speed interconnect, new opplication demand carried for more superior In System Integration Solutions.
Accompanying drawing explanation
Fig. 1 is the structural representation of photoelectricity simultaneous interpretation device of the present invention.
Fig. 2 is the process chart that the present invention makes photoelectricity simultaneous interpretation device.
Wherein: 1. silicon substrate, 2. insulating barrier, 3. dielectric layer, 4. layers of copper, 5. horizontal wave conducting shell, 6. top covering, 7. vertical silicon through hole, 8. annular surrounding layer, 9. vertical light through hole, 10. wiring pattern, 11. photovoltaic interconnects holes, 12. openings, 13. speculums, 14. dry films.
Detailed description of the invention
Below in conjunction with the drawings and specific embodiments, the present invention is further elaborated.
A kind of three-dimensional perpendicular interconnection silicon based opto-electronics simultaneous interpretation device, its structure as shown in Figure 1, comprises silicon substrate 1, described silicon substrate 1 is disposed with insulating barrier 2, dielectric layer 3, layers of copper 4, horizontal wave conducting shell 5 and top covering 6; Described silicon substrate 1 is vertically installed with the vertical silicon through hole 7 be communicated with layers of copper 4 and vertical light through hole 9, layers of copper between described neighboring vertical silicon through hole is laid with the wiring pattern 10 be communicated with horizontal wave conducting shell 5, sandwich layer in described vertical light through hole and horizontal wave conducting shell are connected as a single entity, the photovoltaic interconnects hole 11 that described horizontal wave conducting shell 5 being provided with to misplace with wiring pattern arranges and the del speculum 13 of corresponding vertical light through hole 9 lateral wall, described top covering is provided with the opening 12 be communicated with photovoltaic interconnects hole 11; Described photovoltaic interconnects hole 11 and opening 12 are electroplate with metal.
The preparation method of above-mentioned three-dimensional perpendicular interconnection silicon based opto-electronics simultaneous interpretation device, mainly comprises and makes vertical silicon through hole, vertical light through hole, evaporation layers of copper, spin coating horizontal wave conducting shell on a silicon substrate, makes the step of photovoltaic interconnects hole and speculum, making top covering.First on a silicon substrate by manufacture technics vertical light through hole and vertical silicon through-hole structures such as photoetching, etching or sputterings, vertical light through hole is after making vertical silicon through hole, and the making adopting the PI material of light sensitivity to complete vertical waveguide sandwich layer and horizontal wave conducting shell by whirl coating and exposure technology one step is shaping; The follow-up interconnection forming metal RDL layer successively.
Because silica-based interposer exists two-sided interconnection process, the present invention only sets forth for single-sided process, and the technique of another side has identical structure and preparation method, repeats no more.Single-sided process flow chart as shown in Figure 2, specifically comprises the following steps:
The first step, silicon substrate 1 forms some blind holes perpendicular to silicon substrate by chemical etching, and blind hole comprises vertical silicon through hole 7 and the vertical light through hole 9 of finished product.
The aperture of blind hole is relevant with the thickness of silicon substrate.Generally, the aperture depth-to-width ratio of vertical silicon via etch is 10:1 or 5:1, and the diameter of vertical light through hole and vertical silicon through-hole diameter can be different, depends on the optical mode design that light through hole transmits.For the aperture depth-to-width ratio 5:1 of 150 μm of thick silica-based interposer, vertical silicon through hole, the pore size of vertical silicon through hole is 30 μm.
Be arranged side by side four blind holes in the present embodiment, wherein three, the left side is vertical silicon through hole, and the rightmost side is vertical light through hole.The etching of blind hole can adopt dry etching, such as DRIE etc.Silicon substrate can be low-resistance silicon, High Resistivity Si or SOI material.
Second step, use the positive silicate of tetraethyl (TEOS) or thermal oxide depositing insulating layer 2, the thickness of insulating layer of silicon substrate upper surface is 1 μm, and the thickness of insulating layer of blind hole hole wall is a hundreds of nm.The isolation that insulating barrier sinks to the bottom for realizing signal and silicon substrate, ensures good electricity transmission characteristic.Certainly, thermal oxide also can be used to form the insulating barrier of hole wall and silicon substrate upper surface.TEOS is a kind of low temperature process, preferred TEOS technique.
3rd step, coating dry film 14 is as photoresist, and the dry film place above the blind hole of corresponding vertical light through hole carries out photoetching and forms through hole.Dry film is a kind of photosensitive PI material, as interim mask.The thickness of dry film can be divided into four classes: 0.8mil, 1.2mil, 1.5mil, 2.0mil, and dry film is thinner, and the circuit of making is meticulousr.
In the present embodiment, the dry film that the rightmost side blind hole of silicon substrate is corresponding makes the through hole corresponding with vertical light through hole by lithography.
4th step, after dry film photoetching (uv-exposure) development, in exposed vertical light through hole, fill outsourcing layer, carry out baking and make outsourcing layer curing molding after filling, baking temperature is 50 ~ 80 °.The preferred PMMA material of outsourcing layer, the method for filling can be spin coating or spraying.
5th step, peels off dry film, removes outsourcing layer residual on dry film simultaneously, is then polished by the vertical light through hole at outsourcing layer place.
6th step, adopts PVD deposition techniques dielectric layer 3.Dielectric layer comprises the diffusion impervious layer, adhesion layer and the Seed Layer that upwards set gradually from insulating barrier, and the preferred TiN/Ti/Cu combination of diffusion impervious layer, adhesion layer and Seed Layer, thickness gets 200nm/200nm/1000nm.
7th step, in vertical silicon through hole, electro-coppering is filled, and anneals.Optimization of Copper bath element proportioning, optimizes Current Control waveform, and realize high-aspect-ratio excellence and fill, control overburden is below 3 μm.
Use the method for chemically mechanical polishing (CMP) or etching to remove excess surface metal level, namely remove copper and the dielectric layer on surface.Preferred CMP, because the cost of copper etching is higher than CMP.
8th step, uses PVD technology evaporation one deck underlying metal, such as TiW, a thickness hundreds of nm; Then on underlying metal, sputter copper form layers of copper 4, copper layer thickness is several micron, also can adopt electro-coppering.
9th step, mask, photoetching, etching front layers of copper 4 above the silicon substrate between neighboring vertical silicon through hole, form wiring pattern 10, uses subtractive process, retains wiring, remove unnecessary metal; And etch the layers of copper be positioned at above vertical light through hole.Preferred wet etching in this step.
Tenth step, the outsourcing layer in etching vertical light through hole, form a ring shape surrounding layer 8, the thickness of annular surrounding layer is at 3 ~ 10 μm.Laser or dry method can be used to carry out the etching of surrounding layer, preferred dry etching, the sidewall of etching can be made more smooth, improve fiber waveguide performance, reduce loss.
11 step, fills waveguide material in wiring pattern 10 and vertical light through hole 9, and fills waveguide material at layers of copper 4 upper surface and form horizontal wave conducting shell 5, the thickness of horizontal wave conducting shell at several micron to tens microns.Horizontal wave conducting shell 5 is connected as a single entity with the waveguide material in wiring pattern 10 and vertical light through hole 9, and the method for filling can be spin coating or spraying.The preferred BCB material of waveguide material.
12 step, etches at horizontal wave conducting shell 5 and forms horizontal waveguide, photovoltaic interconnects hole 11, and horizontal wave conducting shell 5 above corresponding vertical light through hole 9 lateral wall etches del speculum 13.Adopt light-sensitive material, namely can be obtained del speculum 13 waveguide shapes needed by exposure, development, post bake, the equilateral triangle that the shape of del speculum is preferably stood upside down.
Del waveguide shapes also can use laser cutting to be formed, and waveguide also can be formed by the mode of impression.
13 step, to photovoltaic interconnects hole 11 electro-coppering, realizes the parallel link of electricity, and copper improves reflectivity as the reflecting surface of speculum 13.Adopt the RDL of photoetching, the etch process making second layer.
14 step, above horizontal wave conducting shell 5, the photosensitive PI material of spin coating makes top covering 6, realizes the passivation on surface; And photoetching on top covering 6, development, solidification offer opening 12, minimal openings is 10 μm.Photosensitive PI material category is a lot, and refractive index ratio BCB is low.
15 step, in the opening 12 of top covering 6, electro-coppering forms UBM, UBM thickness at several micron.
16 step, the thinning silicon substrate back side, to expose vertical silicon through hole and vertical light through hole is advisable.
17 step, repeats the first step to the 15 step, completes the waveguide of bottom or the making at distribution layer at the silicon substrate back side.
Claims (6)
1. three-dimensional perpendicular interconnection silicon based opto-electronics simultaneous interpretation device, comprises silicon substrate (1), it is characterized in that: described silicon substrate (1) is disposed with insulating barrier (2), dielectric layer (3), layers of copper (4), horizontal wave conducting shell (5) and top covering (6), described silicon substrate (1) is vertically installed with the vertical silicon through hole (7) and vertical light through hole (9) that are communicated with layers of copper (4), layers of copper between neighboring vertical silicon through hole is laid with the wiring pattern (10) be communicated with horizontal wave conducting shell (5), sandwich layer in described vertical light through hole and horizontal wave conducting shell are connected as a single entity, the photovoltaic interconnects hole (11) that described horizontal wave conducting shell (5) being provided with to be misplaced with wiring pattern arranges and the del speculum (13) of corresponding vertical light through hole (9) lateral wall, described top covering is provided with the opening (12) be communicated with photovoltaic interconnects hole (11), described photovoltaic interconnects hole (11) and opening (12) are electroplate with interconnecting metal.
2. the preparation method of three-dimensional perpendicular interconnection silicon based opto-electronics simultaneous interpretation device, is characterized in that mainly comprising the following steps: manufacture vertical light through hole and vertical silicon through hole by photoetching, etching or sputtering technology first on a silicon substrate; Next is square evaporation layers of copper on a silicon substrate; Then adopt the PI material of light sensitivity to cover sandwich layer and the horizontal wave conducting shell of vertical light through hole, thus complete the making of vertical light through hole and horizon light waveguide; The last interconnection forming metal RDL layer above horizontal wave conducting shell.
3. the preparation method of three-dimensional perpendicular interconnection silicon based opto-electronics simultaneous interpretation device according to claim 2, is characterized in that specifically comprising the following steps:
The first step, in the some blind holes perpendicular to silicon substrate of silicon substrate (1) front etching, blind hole comprises vertical silicon through hole (7) and the vertical light through hole (9) of finished product;
Second step, at silicon substrate (1) and blind hole deposited on sidewalls insulating barrier (2);
3rd step, coating dry film (14) is as photoresist, and the dry film place above the blind hole of corresponding vertical light through hole carries out photoetching and forms through hole;
4th step, after dry film photoetching development, fills outsourcing layer in exposed vertical light through hole;
5th step, peels off dry film, removes outsourcing layer residual on dry film simultaneously;
6th step, adopts PVD deposition techniques dielectric layer (3);
7th step, in vertical silicon through hole, electro-coppering is filled, and anneals;
8th step, evaporation one deck underlying metal, then sputters copper and forms layers of copper (4) on underlying metal;
9th step, mask, photoetching, etching front layers of copper (4) above the silicon substrate between neighboring vertical silicon through hole, form wiring pattern (10); And etch the layers of copper be positioned at above vertical light through hole;
Tenth step, the outsourcing layer in etching vertical light through hole, form a ring shape surrounding layer (8), the thickness of annular surrounding layer is at 3 ~ 10 μm;
11 step, fills waveguide material, and fills waveguide material formation horizontal wave conducting shell (5) at layers of copper (4) upper surface in wiring pattern (10) and vertical light through hole (9);
12 step, forms horizontal waveguide, photovoltaic interconnects hole (11) in horizontal wave conducting shell (5) etching, and the horizontal wave conducting shell (5) upper etching del speculum (13) above corresponding vertical light through hole (9) lateral wall;
13 step, to photovoltaic interconnects hole (11) electro-coppering;
14 step, makes top covering (6) at the photosensitive PI material of horizontal wave conducting shell (5) top spin coating, and in the upper photoetching of top covering (6), development, solidification offer opening (12);
15 step, in the opening (12) of top covering (6), electro-coppering forms UBM;
16 step, the thinning silicon substrate back side;
17 step, repeats the first step to the 15 step, completes the waveguide of bottom or the making at distribution layer at the silicon substrate back side.
4. the preparation method of three-dimensional perpendicular interconnection silicon based opto-electronics simultaneous interpretation device according to claim 3, it is characterized in that: described in the 6th step, dielectric layer comprises the diffusion impervious layer, adhesion layer and the Seed Layer that upwards set gradually from insulating barrier, diffusion impervious layer, adhesion layer and Seed Layer are TiN/Ti/Cu combination, and thickness gets 200nm/200nm/1000nm.
5. the preparation method of three-dimensional perpendicular interconnection silicon based opto-electronics simultaneous interpretation device according to claim 3, is characterized in that: described in the tenth step, etching selects dry etching or laser ablation.
6. the preparation method of three-dimensional perpendicular interconnection silicon based opto-electronics simultaneous interpretation device according to claim 3, it is characterized in that: del speculum (13) described in the 12 step is by the del waveguide shapes exposing, develop, post bake obtains needs, and the shape of del speculum is the equilateral triangle stood upside down.
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| CN104101967B (en) * | 2014-07-31 | 2016-02-24 | 华进半导体封装先导技术研发中心有限公司 | A kind of formation method of optical communication apparatus and stop hole |
| CN110687630B (en) * | 2019-09-30 | 2020-07-28 | 华中科技大学 | SOI substrate applied to three-dimensional optical interconnection and preparation method thereof |
| CN111538119B (en) * | 2020-04-21 | 2022-03-08 | 东南大学 | Preparation method of three-dimensional photoelectric interconnection substrate |
| CN113517362B (en) * | 2021-07-08 | 2023-05-16 | 曲靖师范学院 | Integrated photosensitive transistor |
| CN114784473A (en) * | 2022-03-16 | 2022-07-22 | 上海交通大学 | Dual-folded substrate integrated waveguide filtering balun based on silicon-based photosensitive film |
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| CN1956284A (en) * | 2005-10-29 | 2007-05-02 | 深圳飞通光电子技术有限公司 | Ridge waveguide type semiconductor laser and its manufacturing method |
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| JP2001074955A (en) * | 1999-08-31 | 2001-03-23 | Susumu Noda | Photonic crystal waveguide |
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| CN1956284A (en) * | 2005-10-29 | 2007-05-02 | 深圳飞通光电子技术有限公司 | Ridge waveguide type semiconductor laser and its manufacturing method |
| CN102495445A (en) * | 2011-12-15 | 2012-06-13 | 中国科学院微电子研究所 | Optical vertical interconnection structure and interconnection method thereof |
| CN103474739A (en) * | 2013-09-26 | 2013-12-25 | 中国工程物理研究院电子工程研究所 | Micro-machine manufacturing method for rectangular waveguide transmission device |
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