CN103746684A - System and method for preventing power supply from flowing backwards - Google Patents
System and method for preventing power supply from flowing backwards Download PDFInfo
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- CN103746684A CN103746684A CN201410019530.0A CN201410019530A CN103746684A CN 103746684 A CN103746684 A CN 103746684A CN 201410019530 A CN201410019530 A CN 201410019530A CN 103746684 A CN103746684 A CN 103746684A
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Abstract
The invention discloses a method for preventing a power supply from flowing backwards. The method comprises the steps that a delay electrification control module controls a power supply module to electrify a logic module and a function module; the logic module pulls down voltage of a first bus and a second bus; the logic module transmits query information which indicates whether the electrification is completed or not to a processor module; the delay electrification control module controls the power supply module to electrify the processor module; the logic module receives information indicating that the delay electrification control module completes the electrification of the processor module; the logic module releases the pulled-down voltage of the first bus and the second bus. The invention additionally provides a system for preventing the power supply from flowing backwards. The system and the method for preventing the power supply from flowing backwards have the advantages that since the power supply is prevented from flowing backwards through logic control, the signal driving capability is not reduced, the signal quality is good, the board layout is facilitated and the cost is low.
Description
Technical field
The present invention relates to chip power technical field, be specifically related to a kind of system and method thereof that power supply pours in down a chimney that prevent when to chip controls electric sequence or power-on delay.
Background technology
Along with the integrated level of pcb board is more and more higher; the chip using is also more and more; the function realizing also from strength to strength; simultaneously also more and more higher to instructions for use; for reducing power consumption or meeting the requirement of chip to electric sequence, conventionally can realize by the method for controlling electric sequence or power-on delay the power supply plan of different levels.But control electric sequence or power-on delay, all can cause power supply to pour in down a chimney the appearance of phenomenon, certainly will affect chip and normally move even defective chip.In pcb board power up, there will be the power supply (as 3.3V) that some pin of chip is first powered on to draw high, but other kind power supply is (as 1.5V, 1.0V) be also not activated, chip also cannot normally start, cause the pin of being drawn high by 3.3V to occur that power supply pours in down a chimney the phenomenon into chip, make chip occur that the abnormal phenomenon of even damaging occurs.Therefore, at these circuit, be necessary to carry out reverse-filling measure, protective circuit normally moves and prevents that chip from damaging.
In prior art, prevent that power supply from pouring in down a chimney method and having: series connection rectifier diode or triode.
In circuit, seal in a rectifier diode, utilize one-way conduction under diode normal condition, can not reflect the characteristic of conducting, prevent that the phenomenon that electric current pours in down a chimney from producing.In circuit, seal in rectifier diode, so not only on cost, increase to some extent, and increased the pressure of fabric swatch, diode current flow has a pressure drop, can cause reducing of drive current, causes signal driver scarce capacity, damages signal quality.
Patent publication No. is in the scheme of CN103297032A, has introduced a kind of method that triode and diode combine and has formed anti-back flow circuit, comprises diode, triode, resistance R 1, resistance R 2; Scheme is as follows: the negative pole of diode is connected with system hardware interface, the positive pole of diode is connected with the emitter E of triode, the base stage B of triode is connected with chip pin, the collector electrode C ground connection of triode, in parallel and be all connected with the positive pole of diode D1 by resistance R1 and resistance R 2, resistance R 2 is also connected with chip output pin, in the time of can solving on same interface multiplexing multiple signals, the power supply occurring pours in down a chimney and enters System on Chip/SoC, avoids the abnormal of chip and damages.In circuit, increase triode and diode, so not only on cost, increase to some extent, and increased the pressure of fabric swatch, diode current flow has a pressure drop, can cause reducing of drive current, causes signal driver scarce capacity, damages signal quality.
Summary of the invention
The object of the present invention is to provide a kind of system and method thereof that prevents that power supply from pouring in down a chimney, by logic control, prevent that power supply from pouring in down a chimney, do not reduce signal driver ability, signal quality is good, and fabric swatch is convenient, with low cost.
In order to achieve the above object, the present invention is achieved through the following technical solutions: a kind of system that prevents that power supply from pouring in down a chimney, be characterized in, and comprise:
Power-on delay control module, for controlling each module electric sequence;
Logic module, for generation of logic level, sends the inquiry message whether having powered on;
Power module, for powering on to each module.
Described processor module is connected with power-on delay control module and logic module respectively;
Described power-on delay control module is connected with power module;
Described logic module is connected with power module;
Described power module is connected with functional module;
Described processor module is connected by the first bus and the second bus with functional module;
Described the first bus and the second bus are connected with logic module respectively.
The first described bus is integrated circuit (IC) bus;
The second described bus is serial management interface bus.
Described functional module comprises power monitoring chip, voltage monitoring chip and physical chip;
Described power monitoring chip, voltage monitoring chip and physical chip are connected with power module respectively;
Described power monitoring chip, voltage monitoring chip are connected with the first bus;
Described physical chip is connected with the second bus.
For preventing a method for the system that power supply pours in down a chimney, be characterized in, comprise following steps:
Step 1, power-on delay control module are controlled electric power source pair of module processor module power-on delay, and logic module drags down the voltage of the first bus and the second bus;
Step 2, power-on delay control module are controlled electric power source pair of module processor module and are completed and power on, and the voltage that logic module drags down the first bus and the second bus discharges.
Described power-on delay control module is 2 seconds to the processor module power-on delay time.
Comprising power-on delay control module before described step 1 controls electric power source pair of module logic module and functional module and completes and power on.
Before described step 2, also comprising logic module sends the inquiry message whether having powered on and receives the information that power-on delay control module has powered on to processor module to processor module.
Described logic module does not receive the information that power-on delay control module has powered on to processor module, and logic module circulation uninterruptedly sends to processor module the inquiry message whether having powered on.
A kind of system and method thereof that prevents that power supply from pouring in down a chimney of the present invention compared with prior art has the following advantages: the holding wire that has reverse irrigated current to produce is controlled separately, use flexibly, and, in the process of using, can not affect the use of other holding wire, by logic realization, can realize the real-time control of signal completely; By before and after processor module electrifying startup, the first bus, the second bus being controlled, can fundamentally prevent from pouring in down a chimney the generation of power supply, prevent that processor module from damaging or starting abnormal; By logic module, uninterruptedly to processor module, send the inquiry message whether inquiry has powered on, optionally functional module is managed, economize on resources, efficiency is higher, and timesharing startup iic bus and SMI bus are safe and reliable; Cost of the present invention is low, workable, and autgmentability is high.
Accompanying drawing explanation
Fig. 1 is a kind of structured flowchart that prevents the system that power supply pours in down a chimney of the present invention.
Fig. 2 is a kind of method flow diagram that prevents that power supply from pouring in down a chimney of the present invention.
Embodiment
Below in conjunction with accompanying drawing, by describing a preferably specific embodiment in detail, the present invention is further elaborated.
As shown in Figure 1, a kind of system that prevents that power supply from pouring in down a chimney, comprises: processor module 1; Power-on delay control module 2, for controlling each module electric sequence; Logic module 3, for generation of logic level, sends the inquiry message whether having powered on; Power module 4, for powering on to each module; Functional module 5.Processor module 1 is connected with power-on delay control module 2 and logic module 3 respectively; Power-on delay control module 2 is connected with power module 4; Described logic module 3 is connected with power module 4; Described power module 4 is connected with functional module 5; Processor module 1 is connected by the first bus 6 and the second bus 7 with functional module 5; The first bus 6 and the second bus 7 are connected with logic module 3 respectively.The first bus 6 is integrated circuit (IC) bus (iic bus); The second bus 7 is serial management interface bus (SMI bus).Functional module 5 comprises power monitoring chip 51, voltage monitoring chip 52 and physical chip 53; Power monitoring chip 51, voltage monitoring chip 52 and physical chip 53 are connected with power module 4 respectively; Power monitoring chip 51, voltage monitoring chip 52 are connected with the first bus 6; Physical chip 53 is connected with the second bus 7.
As shown in Figure 2, a kind of for preventing the method for the system that power supply pours in down a chimney, comprise following steps:
Step 1, power-on delay control module 2 control 4 pairs of logic modules 3 of power module and functional module 5 complete and power on;
Step 2, power-on delay control module 2 are controlled 4 pairs of processor module 1 power-on delays of power module;
Step 3, logic module 3 drag down the voltage of the first bus 6 and the second bus 7;
Step 4, logic module 3 send to processor module 1 inquiry message whether having powered on;
Step 5,4 pairs of processor modules 1 of power-on delay control module 2 control power modules complete and power on;
Step 6, logic module 3 receive the information that 2 pairs of processor modules 1 of power-on delay control module have powered on;
The voltage that step 7, logic module 3 drag down the first bus 6 and the second bus 7 discharges.
The 1 power-on delay time of 2 pairs of processor modules of power-on delay control module is 2 seconds.
If logic module 3 does not receive the information that 2 pairs of processor modules 1 of power-on delay control module have powered on, logic module 3 circulations uninterruptedly send to processor module 1 inquiry message whether having powered on.
Concrete application: processor module 1(model is BCM53003), logic module 3(model is the EPM570T144C5 of ALTERA company), the LM75 of power monitoring chip 51(model WeiNS company), the ADT7411 of voltage monitoring chip 52(model WeiADI company), physical chip 53(model is BCM5461).
As shown in Figure 2, when large plate (main control card, line card, logic module 3, functional module 5) has powered on, because processor module 1 is adopted to power-on delay (as 2 seconds), so now processor module 1 does not operate.For increasing the driving force of iic bus, SMI bus, iic bus, SMI bus are connect high to 3.3V by resistance, existing 3.3V voltage on large plate, therefore can iic bus, SMI bus be connect high to 3.3V by resistance, after logic module 3 is started working, by logic level is set, iic bus, SMI bus are dragged down, prevent the generation of reverse irrigated current, iic bus, SMI bus are not moved.Whether meanwhile, logic module 3 is uninterruptedly sent inquiry message interruption to processor module 1: powered on.After 2S, processor module 1 is powered on, processor module 1 has powered on, the inquiry of logic module 3 is interrupted providing answer, and logic module 3, can be by iic bus after receiving the answer of processor module 1, the state that drags down of SMI bus discharges, and iic bus, SMI bus are normally moved.
Although content of the present invention has been done detailed introduction by above preferred embodiment, will be appreciated that above-mentioned description should not be considered to limitation of the present invention.Those skilled in the art, read after foregoing, for multiple modification of the present invention with to substitute will be all apparent.Therefore, protection scope of the present invention should be limited to the appended claims.
Claims (9)
1. prevent the system that power supply pours in down a chimney, it is characterized in that, comprise:
Processor module (1); Control and data processing for whole plate;
Power-on delay control module (2), for controlling each module electric sequence;
Logic module (3), for generation of logic level, sends the inquiry message whether having powered on;
Power module (4), for powering on to each module;
Functional module (5), the module that some design for specific function, mainly refers to voltage monitoring, Power Supply Monitoring etc. in this patent.
2. the system that prevents that power supply from pouring in down a chimney as claimed in claim 1, is characterized in that, described processor module (1) is connected with power-on delay control module (2) and logic module (3) respectively;
Described power-on delay control module (2) is connected with power module (4);
Described logic module (3) is connected with power module (4);
Described power module (4) is connected with functional module (5);
Described processor module (1) is connected by the first bus (6) and the second bus (7) with functional module (5);
Described the first bus (6) and the second bus (7) are connected with logic module (3) respectively.
3. the system that prevents that power supply from pouring in down a chimney as claimed in claim 2, is characterized in that, described the first bus (6) is integrated circuit (IC) bus;
Described the second bus (7) is serial management interface bus.
4. the system that prevents that power supply from pouring in down a chimney as claimed in claim 3, is characterized in that, described functional module (5) comprises power monitoring chip (51), voltage monitoring chip (52) and physical chip (53);
Described power monitoring chip (51), voltage monitoring chip (52) and physical chip (53) are connected with power module (4) respectively;
Described power monitoring chip (51), voltage monitoring chip (52) are connected with the first bus (6);
Described physical chip (53) is connected with the second bus (7).
5. for preventing a method for the system that power supply pours in down a chimney, it is characterized in that, comprise following steps:
Step 1, power-on delay control module (2) are controlled power module (4) to processor module (1) power-on delay, and logic module (3) drags down the voltage of the first bus (6) and the second bus (7);
Step 2, power-on delay control module (2) are controlled power module (4) processor module (1) are completed and powered on, and the voltage that logic module (3) drags down the first bus (6) and the second bus (7) discharges.
6. the method that prevents that power supply from pouring in down a chimney as claimed in claim 5, is characterized in that, described power-on delay control module (2) is 2 seconds to processor module (1) the power-on delay time.
7. the method that prevents that power supply from pouring in down a chimney as claimed in claim 5, is characterized in that, comprises power-on delay control module (2) before described step 1 and controls power module (4) logic module (3) and functional module (5) are completed and powered on.
8. the method that prevents that power supply from pouring in down a chimney as claimed in claim 5, it is characterized in that, before described step 2, also comprise logic module (3) and send the inquiry message whether having powered on and receive the information that power-on delay control module (2) has powered on to processor module (1) to processor module (1).
9. the method that prevents that power supply from pouring in down a chimney as claimed in claim 8, it is characterized in that, described logic module (3) does not receive the information that power-on delay control module (2) has powered on to processor module (1), and logic module (3) circulation uninterruptedly sends to processor module (1) inquiry message whether having powered on.
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| CN201410019530.0A CN103746684B (en) | 2014-01-16 | 2014-01-16 | System and method for preventing power supply from flowing backwards |
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| CN201410019530.0A CN103746684B (en) | 2014-01-16 | 2014-01-16 | System and method for preventing power supply from flowing backwards |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110795899A (en) * | 2019-11-07 | 2020-02-14 | 天津飞腾信息技术有限公司 | Chip power-on control device |
| CN112054664A (en) * | 2020-09-11 | 2020-12-08 | 苏州浪潮智能科技有限公司 | System and method for enhancing parallel power-on reliability of power supply modules |
| CN113452361A (en) * | 2020-03-27 | 2021-09-28 | 瑞昱半导体股份有限公司 | Universal serial bus signal output circuit with reverse flow current prevention mechanism |
| CN115314451A (en) * | 2022-08-23 | 2022-11-08 | 中国电子科技集团公司第十研究所 | Method for processing insufficient power supply caused by reverse current flow of domestic SRIO (serial peripheral input output) switching chip |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201638103U (en) * | 2010-03-10 | 2010-11-17 | 深圳华北工控股份有限公司 | Timing control system used on X86 structure platform |
| TW201101012A (en) * | 2009-06-25 | 2011-01-01 | Hon Hai Prec Ind Co Ltd | Circuit for controlling computer power on signal |
| CN102053567A (en) * | 2010-10-19 | 2011-05-11 | 北京星网锐捷网络技术有限公司 | Safety power-on time sequence control circuit system |
| CN102325040A (en) * | 2011-06-27 | 2012-01-18 | 艾诺通信系统（苏州）有限责任公司 | Power management method based on MicroTCA system |
| CN203117884U (en) * | 2012-11-29 | 2013-08-07 | 深圳市同洲电子股份有限公司 | Embedded system for multi-module sequential control |
-
2014
- 2014-01-16 CN CN201410019530.0A patent/CN103746684B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW201101012A (en) * | 2009-06-25 | 2011-01-01 | Hon Hai Prec Ind Co Ltd | Circuit for controlling computer power on signal |
| CN201638103U (en) * | 2010-03-10 | 2010-11-17 | 深圳华北工控股份有限公司 | Timing control system used on X86 structure platform |
| CN102053567A (en) * | 2010-10-19 | 2011-05-11 | 北京星网锐捷网络技术有限公司 | Safety power-on time sequence control circuit system |
| CN102325040A (en) * | 2011-06-27 | 2012-01-18 | 艾诺通信系统（苏州）有限责任公司 | Power management method based on MicroTCA system |
| CN203117884U (en) * | 2012-11-29 | 2013-08-07 | 深圳市同洲电子股份有限公司 | Embedded system for multi-module sequential control |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110795899A (en) * | 2019-11-07 | 2020-02-14 | 天津飞腾信息技术有限公司 | Chip power-on control device |
| CN110795899B (en) * | 2019-11-07 | 2023-11-28 | 飞腾信息技术有限公司 | Chip power-on control device |
| CN113452361A (en) * | 2020-03-27 | 2021-09-28 | 瑞昱半导体股份有限公司 | Universal serial bus signal output circuit with reverse flow current prevention mechanism |
| CN113452361B (en) * | 2020-03-27 | 2024-04-05 | 瑞昱半导体股份有限公司 | Universal serial bus signal output circuit with reverse current prevention mechanism |
| CN112054664A (en) * | 2020-09-11 | 2020-12-08 | 苏州浪潮智能科技有限公司 | System and method for enhancing parallel power-on reliability of power supply modules |
| CN115314451A (en) * | 2022-08-23 | 2022-11-08 | 中国电子科技集团公司第十研究所 | Method for processing insufficient power supply caused by reverse current flow of domestic SRIO (serial peripheral input output) switching chip |
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| CN103746684B (en) | 2020-10-23 |
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Effective date of registration: 20220111 Address after: 226463 Zhongtian Industrial Park, Hekou Town, Rudong, Nantong, Jiangsu Patentee after: ZHONGTIAN BROADBAND TECHNOLOGY Co.,Ltd. Address before: No.2-3167, area a, Nonggang City, 2388 Donghuan Avenue, Hongjia street, Jiaojiang District, Taizhou City, Zhejiang Province, 318000 Patentee before: Taizhou Jiji Intellectual Property Operation Co.,Ltd. |