CN103746382A - Active power filtering system - Google Patents

Abstract

The invention provides an active power filtering system, which comprises a current transformer, a system controller and a voltage source current converter, wherein the current transformer is used for detecting the load current of an electric network side, the system controller comprises a data collecting module, a pulse and protection logic processing FPGA (field programmable gate array) module, a harmonic compensation control DSP (digital signal processing) module, an IGBT (insulated gate bipolar translator) driving module, the data collecting module is connected with the current transformer, the pulse and protection logic processing FPGA module is connected with the data collecting module, the harmonic compensation control DSP module and the IGBT driving module, a main circuit of the voltage source current converter is provided with an IGBT module, the IGBT module is connected with the IGBT driving module, and the direct current end of the IGBT module is connected with a direct current electrolytic capacitor through a laminated busbar. The active power filtering system has the advantages that the dynamic compensation can be realized, and the real-time performance, the precision and the reliability are high, and the power supply quality is improved.

Description

Active power filtering system

Technical field

The invention belongs to filter field, relate in particular to a kind of active power filtering system.

Background technology

In electric power system, the harmonic wave that various harmonic sources produce has also caused serious pollution to power system environment.Especially the increasingly extensive application of the nonlinear load such as power electronic equipment, the harmonic wave of its generation and idle electricity quality has been produced to very large impact, has also just produced this concept of the quality of power supply.

The quality of power supply is directly connected to the overall benefit of national economy.Improve safety, the economical operation of the quality of power supply for electrical network and electric equipment, the normal operation of products quality guarantee and people's productive life etc. are all significant.Adopt efficient electrical power load equipment can save mass energy, delay need for electricity contradiction, thereby save the required great amount of investment of power construction.Therefore the demand that improve power supply quality, meets production development has become in many ways common hope.From the angle of the quality of power supply, consider, further investigation active filter, has become the task of top priority.

Summary of the invention

Based on this, for above-mentioned technical problem, provide a kind of active power filtering system.

For solving the problems of the technologies described above, the present invention adopts following technical scheme:

A kind of active power filtering system, comprising:

Current transformer, for detection of the load current of grid side;

System controller, described system controller comprises data acquisition module, pulse and protection logical process FPGA module, harmonic compensation control DSP module and IGBT driver module, described data acquisition module is connected with described current transformer, and described pulse and protection logical process FPGA module are connected with described data acquisition module, harmonic compensation control DSP module and IGBT driver module;

Voltage source converter, the main circuit of described voltage source converter has IGBT module, and this IGBT module is connected with described IGBT driver module, and the DC terminal of described IGBT module is connected with DC electrolysis electric capacity by a stack bus bar.

Described voltage source converter is multiple, multiple voltage source converters are located at respectively a main cabinet and multiple from cabinet, described main cabinet and multiple between cabinet by optical fiber communication, described system controller is located in described main cabinet, and is connected with described multiple voltage source converters.

Described system controller also comprises communication and data management DSP module and man-machine interface and control panel module; described man-machine interface is connected with described pulse and protection logical process FPGA module with data management DSP module through described communication with control panel module, and described communication and data management DSP module and man-machine interface and control panel module are located in described main cabinet.

Described harmonic compensation control DSP module by data collecting module collected described in Fourier transform pairs to signal decompose, obtain amplitude and the phase place of each harmonic, then according to default harmonic compensation number of times, carry out conjugation, then form compensation waveform by Fourier inversion, simultaneously

Described harmonic compensation control DSP module, by detection of grid electric current, is compensated error, compensating error is fed back to conjugation step, to adjust compensation waveform.

The present invention can realize dynamic compensation, and real-time, accuracy and reliability are high, have improved power supply quality.

Accompanying drawing explanation

Below in conjunction with the drawings and specific embodiments, the present invention is elaborated:

Fig. 1 is of the present invention and cabinet schematic diagram;

Fig. 2 is structural representation of the present invention;

Fig. 3 is the structural representation of system controller of the present invention;

Fig. 4 is schematic diagram of the present invention;

Fig. 5 is the layout structure schematic diagram of the main circuit of voltage source converter of the present invention;

Fig. 6 is parametric variable definition schematic diagram of the present invention;

Fig. 7 is the schematic diagram of line voltage processing of the present invention.

Embodiment

As shown in Figure 2, a kind of active power filtering system, comprises current transformer 110, system controller 120 and voltage source converter 130.

Current transformer 110 is for detection of the load current of grid side.

As shown in Figure 3; system controller 120 comprises data acquisition module 121, pulse and protection logical process FPGA (FieldProgrammable Gate Array; field programmable logic array) module 122, harmonic compensation control DSP module 123 and IGBT (Insulated Gate Bipolar Transistor, insulated gate bipolar transistor) driver module 124.

Data acquisition module 121 is connected with current transformer 110, and pulse and protection logical process FPGA module 122 are connected with data acquisition module 121, harmonic compensation control DSP module 123 and IGBT driver module 124.

Data acquisition module 121 is comprised of two parts: the one, and signal processing circuit, the signal of being responsible for that current transformer is collected is converted into and meets the signal that A/D chip requires; The 2nd, A/D chip, is responsible for the analog-signal transitions of input to become DSP and the discernible digital signal of FPGA system.

FPGA is the powerful integrated logic chip that latest development is got up.Because FPGA programming is simple, be very easy to and realize easily logical circuit.Therefore for the pulse generator of power electronic equipment, adopt FPGA, control precision is high, good reliability, programming are simple, flexibility realizes greatly and easily virtual protection, so become the main implementation of the one of digital pulse generator.By FPGA, realizing pulse ratio, by DSP, to produce pulse more reliable, because adopt DSP to produce pulse, once crash, just need to reset could normal work, and the time is longer.And adopt FPGA to produce pulse, FPGA can not restart, even if make mistakes, is also to make mistakes an instruction cycle, can not cause whole FPGA work undesired, so can not make FPGA occur overcurrent, overvoltage etc. yet, and finally cause the out-of-work situation of Active Power Filter-APF to occur.

In addition, pulse and protection logical process FPGA module 122 are also carried out the processing of internal protection and fault-tolerant logic.

The converter that voltage source converter 130 is comprised of the insulated gate bipolar transistor IGBT with turn-off capacity.

As shown in Figure 5, the main circuit of this voltage source converter 130 has IGBT module 131, this IGBT module 131 is connected with the IGBT driver module 124 of system controller 120, the DC terminal of IGBT module 131 is connected with DC electrolysis electric capacity 134 by a stack bus bar 132, make IGBT module 131 and DC electrolysis electric capacity 134 to be connected distance very short, greatly reduced stray reactance, simultaneously, stack bus bar 132 has increased the lamination area between both positive and negative polarity, and then increased the positive and negative connection row's of direct current electric capacity, the acting in conjunction of this two aspect, greatly reduced the overvoltage amplitude producing in IGBT module 131 switching processes, not only protected IGBT module 131, and extended the life-span.

IGBT driver module 124 has radiator 135.

The present invention uses stack bus bar 132, makes system have Low ESR, anti-interference, good reliability, saving space, assemble the features such as quick, and by using laminated bus bar, has improved properties of product, has dwindled small product size.

The IGBT module that the present invention adopts, is up-to-date Mitsubishi the 6th generation NX series, and than the early production before the 5th generation, reliability and power density have very large lifting, and stray inductance and small product size significantly reduce.The CSTBT technology of IGBT silicon chip based on Mitsubishi, has improved the compromise curve of Vce (sat)-Eoff, has reduced hangover electric current, and overall losses is low, and required driving power is less.Diode adopts the 6th generation LPT silicon chip technology, and forward conduction voltage drop is low.I silicon chip allows maximum junction temperature up to 175 ℃, and operating temperature reaches as high as 150 ℃, the integrated NTC(Negative Temperature of IGBT inside modules Coefficient) negative temperature coefficient temperature detecting resistance.Whole series is shared same package platforms from 150A to 450A.Compare last generation chip, new IGBT has increased power density, guarantees that NX6 module output current increases 50A; Increase the temperature margin of safety of critical overload condition, and there is higher cost performance.

Be understandable that, system controller 120 can also be furnished with communication and data management DSP module 125 and man-machine interface and control panel module 126.

Communication can be connected outside industrial computer 4 with data management DSP module 125.

Man-machine interface and control panel module 126 are for outside input, as the setting of conjugation number of times.

Now, system has two DSP modules, and the advantage of two DSP is operational capability rapidly, especially multiplying.System is except completing digital signal processing function, also has much functions such as system and PERCOM peripheral communication, control, man-machine interface, if only adopt a DSP, the real-time of system can not be guaranteed.Adopt two DSP structures, by dual port RAM, carry out exchanges data, system data is coordinated to parallel processing, fully guaranteed real-time and the reliability of control system.

Man-machine interface is connected with pulse and protection logical process FPGA module 122 with data management DSP module 125 through communication with control panel module 126.

For hicap more than 500A, need to adopt the also mode of cabinet.If it is simply in parallel to overlap system of the present invention more, overlap control system and the part auxiliary circuit redundancy that will seem, because a set of control system is enough to control whole many cabinet systems more.And the control of many cover control system also makes the error of control system accumulate at double, the precision of active filter system is decreased.Meanwhile, when system needs dilatation due to factors such as load variations, its difficulty and cost also can increase.To this, the present invention takes according to host-guest architecture.

Based on above-mentioned consideration, voltage source converter 130 can be multiple, and multiple voltage source converters 130 are located at respectively a main cabinet A and multiple from cabinet B.

As shown in Figure 1, main cabinet A and multiple between cabinet B by optical fiber communication, system controller 120 is located at A in main cabinet, and is connected with multiple multiple voltage source converters 130 from cabinet B, all cabinets output summations have formed total output current, complete compensation.

When system is principal and subordinate's cabinet, communication and data management DSP module 125 and man-machine interface and control panel module 126 are located in main cabinet A.

The protection fault-tolerant logic of pulse and protection logical process FPGA module 122: when overcurrent or overvoltage appear in discovery system; sending suitable signal makes device in rectification state; avoid switching device to damage; after voltage or electric current recovery normally; recover again normal driving pulse, device is resetted and continue to put into operation.If the fault of system or device is not temporary, send trip signal, thoroughly cut off the contact of system of the present invention and electric system, both protected system of the present invention itself, avoided again electric power system or circuit to impact.

The principle of system of the present invention:

As shown in Figure 4, in the load current that in electric power system 2, load 3 absorbs, contain harmonic component, if the main circuit 131 of voltage source converter 130 is to the offset current i injecting in electrical network _fwith load current harmonic component opposite direction, the harmonic current that load produces just can be cancelled, as long as detect load current i _lin contained harmonic component, thereby just can determine offset current i _f.

Coupling between voltage source converter 130 and extraneous electric power system realizes by linked reactor LF, and the voltage that voltage converter 130 produces is being connected reactance L with the voltage difference of power system voltage _fupper formation output current i _f.

Based on above-mentioned theory, the load current that in current transformer 110 detection of grid of system of the present invention, load absorbs, and gathered by data acquisition module 121, harmonic wave or the reactive current component in load current calculated and extracted to harmonic compensation control DSP module 123 by system controller 120, then by pulse and protection logical process FPGA module 122, generate compensation waveform, compensation waveform sends to IGBT driver module 124, IGBT driver module 124 produces one and load current distorted waveform equal and opposite in direction by this compensation Waveform Control voltage source converter 130, the offset current of opposite direction is injected in electrical network, reach the object of filtering or reactive power compensation.

The signal that harmonic compensation control DSP module 123 collects by Fourier transform pairs data acquisition module 121 decomposes, obtain amplitude and the phase place of each harmonic, then according to default harmonic compensation number of times, carry out conjugation, by Fourier inversion, form compensation waveform again, meanwhile, harmonic compensation control DSP module, by detection of grid electric current, is compensated error, compensating error is fed back to conjugation step, to adjust compensation waveform.

Algorithm of harmonics analysis of the present invention is as follows:

Algorithm of harmonics analysis of the present invention is based on DFT harmonic analysis method.DFT (Discrete Fourier Transform) is discrete Fourier transform (DFT), is the discretization of Fourier transform at time domain and complex frequency domain.Be mainly used in the frequency-domain analysis field of discrete system.The mathematic(al) representation of DFT is:

In formula, f _ibe i subfrequency, A _i,

be respectively i subharmonic amplitude and phase angle; M is higher harmonics number of times.

Signal is meeting under the condition of Shannon sampling thheorem, with sample frequency f _sit is sampled.As the sample frequency f to signal _snot fundamental frequency f ₀integral multiple time, the frequency of fundamental frequency signal can be expressed as

f ₀=[(k ₀+d ₀)/N]f _s (2)

In formula, N is sampling number; f _s/ N is called frequency resolution; K ₀for integer; d ₀for decimal.

The sampled value of signal

T in formula _s=1/f _sfor sampling time interval, n is integer (n=0,1 ..., N).

Formula (3) is carried out to Fourier transform to be obtained

Hanning window is the one of Cosine Window, and signal windowing is all carried out in time domain conventionally, and can first to signal, carry out Fourier transform for Cosine Window, in the symmetrical expression formula of N point (N is even number) of frequency domain processing Hanning window, is then:

n=-N/2,…,-101,…，N/2

Because the window sequence that adds that uses Hanning window in discrete Fourier transform (DFT) is monolateral, therefore for the Hanning window function of FFT windowing, should be:

n=0,1,......N

The discrete Fourier transform (DFT) that adds Hanning window is:

According to the correlation formula of FFT and cosine window function, can derive exactly the interpolation formula that adds Hanning window and come respectively frequency, amplitude and phase place to be proofreaied and correct.The updating formula of its fundamental frequency is:

$d_0=\left\{\begin{array}{c}\frac{2\left|X_W(k_0+1)\right|-\left|X_W\left(k_0\right)\right|}{\left|X_W(k_0+1)\right|+\left|X_W\left(k_0\right)\right|},\left|X_W(k_0+1)\right|\&GreaterEqual;\left|X_W(k_0-1)\right|\\ \frac{\left|X_W\left(k_0\right)\right|-2\left|X_W(k_0-1)\right|}{\left|X_W\left(k_0\right)\right|+\left|X_W(k_0-1)\right|},\left|X_W(k_0+1)\right|<\left|X_W(k_0-1)\right|\end{array}\right.---\left(8\right)$

By formula (8) substitution formula (2), can obtain electric power system fundamental frequency accurately.

For convenience of computing, now define each parametric variable, as shown in Figure 6.

Line voltage processing

As shown in Figure 7, the Wave data u of line voltage _sa, u _sb, u _scafter DFT calculates, obtain voltage harmonic sequence vector X _ua(1 ... K), X _ub(1 ... K), X _uc(1 ... K), then pass through frequency spectrum computing, obtain three-phase effective value U _{sa, b, c}the spectrum value Hus_a of three-phase, b, c (1-K), three-phase THD value THDus_a, b, c.

The phase place of line voltage fundamental positive sequence

this value is by for the idle calculating of electric current.And calculating phase place

need to use symmetrical component method, the method will be at Reusability next.So be necessary first to explain symmetrical component method.

Symmetrical component method is a kind of basic skills of analyzing symmetrical system asymmetric operation state.Electric current, voltage or the impedance of any three-phase imbalance can be decomposed into the phasor composition of three balances, i.e. positive phase sequence (U _a1, U _b1, U _c1), negative-phase sequence (U _a2, U _b2, U _c2) and zero phase-sequence (U _a0, U _b0, U _c0), have: U _a=U _a1+ U _a2+ U _a0; U _b=U _b1+ U _b2+ U _b0; U _c=U _c1+ U _c2+ U _c0.

The phase sequence (up time direction) of its positive phase sequence is followed successively by: U _a1, U _b1, U _c1, equal and opposite in direction, mutually every 120 degree; The phase sequence (inverse time direction) of negative-phase sequence is followed successively by: U _a2, U _b2, U _c2, equal and opposite in direction, mutually every 120 degree; Zero phase-sequence equal and opposite in direction and homophase, each phase sequence is all by counterclockwise rotation.In symmetrical component method, quote operator a, its definition is that unit phasor is according to counterclockwise rotating 120 degree.

Have: U _a0=1/3(U _a+ U _b+ U _c), U _a1=1/3(U _a+ aU _b+ aaU _c), U _a2=1/3(U _a+ aaU _b+ aU _c)

Note above be all take A mutually as benchmark, be all that vector calculates.Known U _a0reality has also been known U _bOand V _cO.Known equally U _a1also just known U _b1and U _c1, known U _a2also just known U _b2and U _c2.

${\stackrel{\&CenterDot;}{u}}_{a1}={\stackrel{\&CenterDot;}{E}}_{\mathrm{a\&Sigma;}}-{\stackrel{\&CenterDot;}{I}}_{a1}{Z}_{1\mathrm{\&Sigma;}}$

${\stackrel{\&CenterDot;}{u}}_{a2}=-{\stackrel{\&CenterDot;}{I}}_{a2}{\mathrm{<figure-callout\; id="2"\; label="Z"\; filenames="HDA0000451594210000012.png,HDA0000451594210000022.png"\; state="\{\{state\}\}">Z</figure-callout>}}_{2\mathrm{\&Sigma;}}$

${\stackrel{\&CenterDot;}{u}}_{a0}=-{\stackrel{\&CenterDot;}{I}}_{a0}{Z}_{0\mathrm{\&Sigma;}}$

Load current processing

In Active Power Filter-APF, the processing of load current is the processing links of most critical because the required harmonic information of sending of compensator, idle information, unbalance information and their concrete numerical value all thus link computing draw.So can load current processing links accurately effectively work, directly determined that can Active Power Filter-APF accurately effectively work.

The present invention mainly takes harmonic analysis method and the symmetrical component method based on DFT.The Wave data of load current, after DFT calculates, obtains harmonic wave sequence vector, then enters respectively harmonic management and idle uneven two links of processing.

Non-first-harmonic amount in harmonic management link amount of orientation sequence, according to the harmonic compensation number of times of setting, carry out conjugation, extraction needs the harmonic content sequence of compensation, then by IDFT inverse transformation, generates bucking voltage wave sequence, thereby finally exports corresponding output waveform for current tracking controlling unit.

First-harmonic amount in idle, uneven processing links amount of orientation sequence, then calculates positive sequence amount, negative phase-sequence amount, zero sequence amount by symmetrical component method, re-uses dq and decomposes, and decomposites meritorious, idle component separately.According to the setting of idle and uneven function, then inverse transformation link adds respectively different components, can reach different control effects.

DC voltage control

Due to the present invention's employing is voltage source converter, and the DC capacitor that DC link adopts not is desirable energy storage link, therefore in the process of the quick follow load harmonic current of control active filter offset current, because Active Power Filter-APF itself exists the active loss bringing due to line resistance and switching loss, and operating state change time need from system, absorb certain active power, therefore may cause that thereby DC voltage fluctuation causes direct voltage overvoltage, under-voltage, jeopardizes the safe operation of active filter.Therefore when controlling Active Power Filter-APF offset current, requirement can maintain its DC voltage.The speed unhappy that DC capacitor voltage changes, the therefore response speed of DC voltage control link do not require very fast.This controlling unit is in Current Control link, to add a control ring.Owing to flowing into the active current of active filter, directly affect its DC voltage, therefore the difference of DC capacitor voltage and given reference voltage is exported and is added in positive sequence real component after proportional integral, complete the control to direct voltage.

Current tracking control

Current tracking controlling unit is responsible for the control of actual output current, and the present invention adopts triangular wave carrier control mode.The offset current of active filter output and the error of reference current compare with triangular carrier after proportional integral link PI, produce corresponding pwm pulse.

But, those of ordinary skill in the art will be appreciated that, above embodiment is only for the present invention is described, and be not used as limitation of the invention, as long as within the scope of connotation of the present invention, variation, modification to the above embodiment all will drop within the scope of claims of the present invention.

Claims (4)

1. an active power filtering system, is characterized in that, comprising:

Current transformer, for detection of the load current of grid side;

System controller, described system controller comprises data acquisition module, pulse and protection logical process FPGA module, harmonic compensation control DSP module and IGBT driver module, described data acquisition module is connected with described current transformer, and described pulse and protection logical process FPGA module are connected with described data acquisition module, harmonic compensation control DSP module and IGBT driver module;

Voltage source converter, the main circuit of described voltage source converter has IGBT module, and this IGBT module is connected with described IGBT driver module, and the DC terminal of described IGBT module is connected with DC electrolysis electric capacity by a stack bus bar.

2. a kind of active power filtering system according to claim 1, it is characterized in that, described voltage source converter is multiple, multiple voltage source converters are located at respectively a main cabinet and multiple from cabinet, described main cabinet and multiple between cabinet by optical fiber communication, described system controller is located in described main cabinet, and is connected with described multiple voltage source converters.

3. a kind of active power filtering system according to claim 2; it is characterized in that; described system controller also comprises communication and data management DSP module and man-machine interface and control panel module; described man-machine interface is connected with described pulse and protection logical process FPGA module with data management DSP module through described communication with control panel module, and described communication and data management DSP module and man-machine interface and control panel module are located in described main cabinet.

4. according to a kind of active power filtering system described in claim 1 or 3, it is characterized in that, described harmonic compensation control DSP module by data collecting module collected described in Fourier transform pairs to signal decompose, obtain amplitude and the phase place of each harmonic, then according to default harmonic compensation number of times, carry out conjugation, by Fourier inversion, form compensation waveform again, simultaneously

Described harmonic compensation control DSP module, by detection of grid electric current, is compensated error, compensating error is fed back to conjugation step, to adjust compensation waveform.

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