CN103744803A - Power supply component and storage system - Google Patents
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Abstract
The invention relates to the technical field of computer data storage, and provides a power supply component and a storage system. When a computer is powered down, a power supply control module sends a connection signal to an electronic switch according to a power-down trigger signal sent by a second transformer, and a first energy storage device powers a first transformer; a voltage conversion module acquires a direct current from a mainboard power interface, and powers a plurality of data power-down protection devices of the computer after a plurality of times of voltage conversion; controllers of the data power-down protection devices concurrently backup data in a volatile memory to a nonvolatile memory after receiving the power-down trigger signal generated by the second transformer from the power supply control module. By the storage system, multiple data power-down protection devices can be powered through one power supply component, so that convenience in extension for users is improved, and extension cost of the users is effectively reduced.
Description
Technical Field
The invention relates to the technical field of computer data storage, in particular to a power supply assembly for supplying power to a data power failure protection device with a data backup function when abnormal power failure occurs in a computer and a storage system comprising the power supply assembly.
Background
With the development of servers and network storage devices, higher requirements are put on the security of data running and stored in a computer. However, in some sudden power failure situations, for example, when the power of the utility power is cut off or the computer is shut off by human misoperation, the data running in the central processing unit and the memory of the computer is lost.
In order to solve the above problems, in the prior art, an UPS (uninterruptible power supply) or a Super-Capacitor (Super-Capacitor) is usually used to provide a short-time power supply for a central processing unit and a memory of a computer, so as to backup data in the central processing unit and the memory to a nonvolatile storage device when the computer is powered off.
The nonvolatile storage device may be a mechanical Disk (Hard Disk), a magnetic tape, or a Solid-state Disk (SSD). Among them, the solid state disk drive is becoming a mainstream nonvolatile storage device in the industry because of its compact size, gradually reduced cost, and higher long service life; meanwhile, since the super capacitor has a long service life and a relatively small size, it is combined with a solid state disk drive and becomes the mainstream technology of data protection after power failure of a computer, and the related technology can refer to chinese patent No. zl200910159932.x, which is granted under the publication No. CN 101630293B.
Because the super capacitor has capacitance loss, and the stored electric quantity of the super capacitor gradually decreases after the super capacitor is fully charged; therefore, when the computer is powered off unexpectedly, it is necessary to ensure that the super capacitor holds enough power to support the data in the central processing unit and the memory to be backed up to the solid state disk drive.
In the prior art, on one hand, since the memory and the solid state disk drive and other chips are integrated on one PCB, when the memory and the solid state disk drive of the computer need to be upgraded, a plurality of PCBs integrating the above electronic components need to be inserted into a motherboard of the computer. Since the size of the super capacitor is usually large, the layout in the mainframe box of the computer is very tight.
On the other hand, each PCB is provided with a circuit structure which interacts with the super capacitor to provide a data power down protection function, so that the manufacturing cost of the whole data power down protection device is relatively high.
In addition, when the computer is powered off unexpectedly, the data power-fail protection device backs up the data in the memory to the nonvolatile memory (such as the NAND flash memory) according to the capacity of the whole memory, so that when a user upgrades the data power-fail protection device including the memory and the nonvolatile memory, whether the total charge storage capacity of the super capacitor in the computer at the moment meets the requirement of data backup cannot be estimated.
When the computer is powered off unexpectedly, the electric energy in the super capacitor is not enough to support the data in the central processing unit and the memory to be completely backed up in the nonvolatile memory, so that the computer system is unstable; the user plugs the super capacitor by himself and often does not know how much capacity needs to be added to the super capacitor.
Because the super capacitor is expensive, excessive connection of the super capacitor causes waste, and insufficient connection of the super capacitor causes insufficient electricity stored in the super capacitor when the computer is powered off accidentally, so that various problems of instability, consistency and the like of a computer system occur.
In view of the above, there is a need to improve the power supply device of the data power down protection device and the memory system of the computer in the prior art to solve the above mentioned drawbacks.
Disclosure of Invention
The first purpose of the present invention is to provide a power supply assembly, which prevents a super capacitor from repeatedly performing a "charge-discharge" cycle process during normal power supply of a computer, thereby improving the service life of the super capacitor, and ensuring that the computer has enough electric quantity to support running data in a data power down protection device to complete a data backup process when the computer suddenly loses power.
To achieve the first object, the present invention provides a power supply assembly, which includes a first transformer, a motherboard power interface, and a voltage conversion module, which are electrically connected in sequence, so as to convert a commercial power into a specified voltage and supply power to a plurality of data power-down protection devices in a computer, and the power supply assembly further includes: the power supply comprises a first transformer, an inverter, a first energy storage device, an electronic switch and a power supply control module, wherein the first transformer and the inverter are electrically connected with the first transformer;
the electronic switch is kept in a normally-off state when the computer is normally powered on, and when the computer is powered off, the power supply control module acquires a power-off trigger signal generated by the second transformer, sends a conducting signal to the electronic switch and supplies power to the first transformer through the first energy storage device.
As a further improvement of the present invention, the electronic switch is electrically connected between the first energy storage device and the inverter.
As a further improvement of the present invention, the motherboard power interface is an ATX power interface; the voltage conversion module consists of a low dropout linear regulator and/or a DC-DC converter.
As a further improvement of the present invention, a second energy storage device is further connected in parallel between the power supply motherboard interface and the voltage conversion module, and a capacitance of the second energy storage device is greater than or equal to a capacitance of the first energy storage device.
As a further improvement of the present invention, the present invention further includes a controller voltage output interface electrically connected to the voltage conversion module and the power control module, respectively, for receiving an interrupt signal sent by the power controller module and providing the dc power converted by the voltage conversion module to the data power down protection device.
As a further improvement of the present invention, the first energy storage device and the second energy storage device include a plurality of super capacitor sets, and the super capacitor sets are formed by connecting a plurality of super capacitors in series.
As a further improvement of the invention, the electronic switch comprises a MOS tube, a relay, a triode, an IGBT tube or a thyristor.
A second object of the present invention is to provide a storage system, so as to effectively integrate modules with power supplies in a plurality of data power down protection devices, and to provide power supplies for a plurality of data power down protection devices through a power supply assembly, so as to improve convenience of expansion for users, and effectively reduce expansion cost for users.
In order to achieve the second object, the invention provides a storage system, which comprises a plurality of data power-down protection devices, wherein each data power-down protection device comprises a controller, a plurality of volatile memories and a plurality of nonvolatile memories which are connected with the controller, and an interface module which is connected with the controller and at least performs data and signal transmission with a host;
the storage system further comprises a power supply assembly as described above, the power supply assembly being electrically connected to at least one data power down protection device;
when the computer is powered off, the power supply assembly provides power supply for the data power-down protection device for a short time so as to back up data in the volatile memory to the nonvolatile memory.
As a further improvement of the invention, the interface module comprises a DIMM interface or a PCI-E interface.
As a further improvement of the present invention, the data power-down protection device further comprises a controller voltage input interface electrically connected to the controller, and the power supply assembly further comprises a controller voltage output interface and a modular wire assembly, wherein the controller voltage output interface is electrically connected to the voltage conversion module and the power supply control module, respectively;
the controller voltage output interface can transmit power and control signals through the modularized conducting wire assembly and the controller voltage input interface.
As a further improvement of the invention, the storage system comprises at least two data power-down protection devices, and each data power-down protection device is connected in parallel to the controller voltage output interface of the power supply assembly through a respective controller voltage input interface and a modular lead assembly.
As a further improvement of the invention, the data power-fail protection device also comprises a low-dropout linear regulator arranged between the voltage input interface of the controller and the controller, the volatile memory and the nonvolatile memory.
As a further improvement of the present invention, the power supply assembly further comprises an alarm device connected to the power supply control module, the power supply control module comprising a storage module;
the storage module is configured to store storage medium configuration parameters of a volatile memory and a non-volatile memory which are accessed into the computer, and electric capacity configuration parameters of the first energy storage device;
when the computer is subjected to power-on self-test, comparing the storage medium configuration parameter with the capacitance configuration parameter, and if the capacitance configuration parameter does not meet the requirement of the storage medium configuration parameter, sending an enabling signal to an alarm device by a power control module to drive the alarm device;
the alarm device comprises a buzzer and an LED, and the storage module comprises E2The controller comprises an FPGA or an ASIC, the volatile memory is a DRAM, and the nonvolatile memory comprises a NAND flash memory and/or a phase change memory.
Compared with the prior art, the invention has the beneficial effects that: in the invention, the reasonable utilization of the super capacitor is improved by reasonably controlling the energy storage device consisting of the super capacitor; meanwhile, one power supply assembly supplies power to a plurality of data power-down protection devices at the same time, so that convenience of expansion of users is improved, and expansion cost of the users is effectively reduced.
Drawings
FIG. 1 is a schematic diagram of a power supply assembly of the present invention;
FIG. 2 is a schematic diagram of the power control module sending an ON signal to the electronic switch to turn ON the power supply path of the first energy storage device when the computer is powered down;
FIG. 3 is a schematic diagram of the power control module sending an OFF signal to the electronic switch to cut OFF the power supply path of the first energy storage device and supplying power from the second energy storage device;
FIG. 4 is a schematic diagram of a first energy storage device according to various embodiments of the present invention;
FIG. 5 is a schematic diagram of a memory system of the present invention;
FIG. 6 is a schematic diagram of a storage system having an alarm device;
FIG. 7 is a schematic diagram of a storage system with a power supply assembly coupled to a plurality of data loss protectors;
FIG. 8 is a detailed schematic diagram of a memory system of FIG. 7;
wherein, the reference numbers in the specification are described as follows:
a storage system-10;
power supply assembly-100; a first transformer-101; mainboard power interface-102; a voltage conversion module-104; a first energy storage device-105; a second energy storage device-205; an electronic switch-106; an inverter-107; power control module-108; a storage module-1081 included in the power supply control module; controller voltage output interface-109;
-1151, a supercapacitor; supercapacitor pack interfaces-1052, 1053;
a host-300; CPU-301; -an alarm device-110; an enable signal-111 output to the alarm device;
data power down protection-200; a controller-201; a volatile memory-202; a non-volatile memory-203; an interface module 204; a controller voltage input interface 209;
and a modular lead assembly 219.
The implementation, functional characteristics, specific technical scheme and corresponding beneficial effects of the purposes of the invention are combined with each embodiment and further detailed with reference to each figure.
Detailed Description
The present invention is described in detail with reference to the embodiments shown in the drawings, but it should be understood that these embodiments are not intended to limit the present invention, and those skilled in the art should understand that the functions, methods, or structural equivalents, substitutions or combinations of these embodiments are within the scope of the present invention.
Example one：
Please refer to fig. 1, fig. 2 and fig. 4, which illustrate a first embodiment of a power module according to the present invention.
In this embodiment, the power supply module 100 includes two power supply paths.
The first power supply path is that the computer can be input to the power supply assembly 100 by the commercial power under the normal power supply condition, and then the commercial power (AC) of 220V or 110V is converted into the designated voltage through the first transformer 101, the main board power interface 102 and the voltage conversion module 103 which are electrically connected in sequence, so as to supply power to the plurality of data power-down protection devices 200 in the calculation. Preferably, the motherboard power interface 102 is 24Pin ATX power interface, or 20Pin ATX power interface.
Specifically, in this embodiment, the ac power of 220V is used as an example. The 220VAC outputs a direct current (hereinafter, DC) of not more than 12V, and preferably 12V after being transformed by the first transformer 101, and is input to the motherboard power interface 102.
The operating voltages required by the chip (i.e., integrated circuit) in the computer also include 1.0V, 1.2V, 1.5V, 1.8V, and 2.5V. For different chips in a computer, the operating voltage required to be used is different, for example, the operating voltage of DDR4 is 1.2, the operating voltage of DDR3 is 1.5V, the operating voltage of DDR2 is 1.8V, the operating voltage of NAND flash memory is 1.8V, the operating voltage of FPGA is 1.5V, and the operating voltage of serial high-speed interface (GTP) is 1.0V and 1.2V. The working voltage of the kernel logic array and IO of the FPGA is 1.2V. The operating voltage of the low speed devices or optoelectronic devices (e.g., computer buttons, LEDs) connected to the output of the FPGA is 3.3V.
The technical field can reasonably predict that the working power supply of the NAND flash memory can be gradually reduced along with the improvement of the preparation process of the semiconductor integrated circuit; at this time, the voltage conversion module 103 in this embodiment performs voltage conversion processing on the input direct current to obtain a corresponding working voltage.
Therefore, a further voltage conversion process is required for the 3.3VDC via the voltage conversion module 103. Specifically, the voltage conversion module 103 is composed of a low dropout regulator (LDO) and/or a DC-DC converter.
The Low dropout regulator (LDO) integrates a MOSFET (metal oxide semiconductor field effect transistor), a Schottky diode, a sampling resistor, a divider resistor and other hardware circuits with extremely Low on-line on-resistance, has the functions of overcurrent protection, over-temperature protection, a precision reference source, a differential amplifier, a delayer and the like, and has other functions of load short circuit protection, overvoltage shutoff, overheat shutoff, reverse connection protection and the like.
A DC-DC converter (DC-DC converter) refers to a device that converts electric energy of one voltage value into electric energy of another voltage value in a direct current circuit, and has functions of isolation (including noise isolation, safety isolation, and ground loop elimination), voltage conversion (including boost conversion and buck conversion), protection (including short-circuit protection, overvoltage protection, undervoltage protection, and overcurrent protection), active filtering noise reduction, and direct current voltage stabilization.
In this embodiment, after voltage conversion and DC stabilization of the voltage conversion module 103, the 3.3VDC outputted from the first transformer 101 is converted into various specifications of DC required by various chips in the data loss protective device 200.
Specifically, the voltage conversion module 103 converts 3.3VDC into five specified voltages, i.e., 1.0VDC, 1.2VDC, 1.5VDC, 1.8VDC, and 2.5 VDC. Meanwhile, the motherboard power interface 102 may also be electrically connected to the motherboard power interface 102 through a shielding wire and an electrical connector (not shown) as in the prior art, so as to provide an electrical support for the electrical devices in the computer, such as a cpu fan, a graphic display card, a magnetic disk drive, an optical disk drive, and the like. Thus, when the power supply module 100 is installed in a computer case, the existing ATX interface on the computer motherboard can be fully utilized, so that the modification of the existing computer motherboard is reduced, and the modification cost of a user to the computer is reduced.
It should be noted that the specific voltages converted by the voltage conversion module 103 may change continuously with the development of the semiconductor manufacturing technology, and therefore, the specific voltages are not limited to the five specific voltages illustrated in the embodiment.
In this embodiment, the power module 100 further includes a second transformer 104 and an inverter 107 electrically connected to the first transformer 101, a first energy storage device 105 and an electronic switch 106 electrically connected between the second transformer 104 and the inverter 107, and a power control module 108.
Therefore, the second transformer 104, the first energy storage device 105, the electronic switch 106, and the inverter 107 constitute a second power supply path of the power module 100 according to the first embodiment of the present invention. The second transformer 104 may convert 220VAC to 12 VDC.
Specifically, the electronic switch 106 may be a MOS transistor, a relay, a triode, an IGBT transistor, or a thyristor, and is further preferably a MOS transistor.
Referring to fig. 5, the first energy storage device 105 includes a plurality of super capacitor banks 1051, and each super capacitor bank 1051 is formed by connecting five super capacitors 1151 in series. Specifically, the super capacitor 1151 may be selected to have a nominal operating voltage of 2.5V and a capacitance of 200 farads, so that a super capacitor bank 1051 of 12V and a capacitance of 40 farads may be formed.
It should be noted that, in order to make the first energy storage device 105 have a larger amount of electricity, a plurality of super capacitor sets 1051 may be connected in parallel, and each super capacitor set 1051 serves as a dc input/output terminal through the super capacitor set interfaces 1052 and 1053.
When the computer is normally powered, the electronic switch 106 is kept in a normally-off state, and can provide power supply of required specifications for each chip or driving device in the computer through the first power supply path. Meanwhile, since the second transformer 104 is still electrically connected to the first energy storage device 105, and 12VDC outputted after conversion by the second transformer 104 charges all the super capacitors 1151 in the first energy storage device 105, the charging is automatically stopped after the first energy storage device 105 is charged.
Referring to fig. 2, when the computer is powered down, the second transformer 104 generates a Power level fluctuation Signal (Power level fluctuation Signal), and the Power level fluctuation Signal is obtained by the Power control module 108 and sends a conducting Signal (i.e., an ON Signal) to the electronic switch 106, so as to conduct the second Power supply path, start outputting 12VDC from the first energy storage device 105, and finally convert the 12VDC back to 220VAC through the inverter 107 and supply Power to the first transformer 101.
Specifically, the power down trigger signal generated by the second transformer 104 may be a high level signal or a low level signal. That is, in the power control module 108, a signal sent from the second transformer 104 when the computer is normally powered off (in a normal power failure situation) may be defined as a high level signal, and a signal sent from the second transformer 104 when the computer is abnormally powered off may be defined as a low level signal, so that when the computer is abnormally powered off, a power failure trigger signal generated by the second transformer 104 is recognized by the power control module 108, and vice versa; meanwhile, the power-down trigger signal can also be an encoded signal.
Thereafter, the specified voltage is output through the first transformer 101, the motherboard power interface 102, and the voltage conversion module 103, and the specific process thereof is referred to above and will not be described herein again. Meanwhile, the power control module 108 may also send a power down trigger signal to the host 300 through a Subsystem Bus (Subsystem Bus), such as sm _ Bus (not shown), and may access the power control module 108 through the host 300. Sm _ bus is a binary serial bus used primarily for communication among low speed devices in computers.
When the computer is powered up again, the host 300 cuts OFF the power output of the first energy storage device 105 by accessing the power control module 108 and sending an OFF signal to the electronic switch 106 through the power control module 108, and starts the charging process.
In the present embodiment, the electronic switch 106 is electrically connected between the first energy storage device 105 and the inverter 107. Meanwhile, because the electronic switch 106 is kept in a normally-off state when the computer is normally powered on, the first energy storage device 105 can be prevented from supplying power to the computer under normal conditions, unnecessary "discharging" is avoided, and therefore the situation that the super capacitor 1151 repeatedly performs a "charging-discharging" cycle under most conditions of "normal power supply" is avoided, the service life of the super capacitor 1151 is effectively prolonged, meanwhile, the risks that the computer system is unstable and the like due to the fact that the super capacitor 1151 cannot provide power supply for a long time enough for the data power failure protection device 200 when the computer is abnormally powered off under the condition of insufficient electric quantity are also reduced, and reliability and stability of the computer are improved.
Example two：
Referring to fig. 3, a second embodiment of a power supply assembly of the present invention is shown.
The main difference between this embodiment and the first embodiment is that a second energy storage device 205 is further connected in parallel between the power supply main board interface 102 and the voltage conversion module 103. It should be noted that the specific structure of the second energy storage device 205 is the same as the structure of the first energy storage device 105 in the first embodiment, and therefore, the detailed description is omitted in this embodiment. A plurality of super capacitor banks 1051 may be included in the second energy storage device 205, and each super capacitor bank 1051 includes a plurality of super capacitors 1151 connected in series to form a 12VDC output voltage; meanwhile, the 12VDC output voltage can also be formed in the second energy storage device 205 through several super capacitors (not shown) with other specifications in a parallel or series-parallel manner.
As can be seen from fig. 7 and 8, when the computer is powered off, the controller 201 may first save data being executed and processed in the central processing unit to the controller 201 through the interface module 204 under the control of the host 300, and save the data in the central processing unit to the volatile memory 202 under the control of the controller 201. Due to the central processing appliance multi-level cache mass caches L1, L2, L3, the overall retention time T1 of data is typically in the nanosecond range. The data in the central processing unit referred to in this embodiment is "field data".
Next, under the control of the controller 201, the data of the volatile memory 202 and the central processor temporarily stored therein are saved to the nonvolatile memory 203 in the form of "block data" or "page data" by the cache device in the controller 201, and the saving time T2 of the process is typically between several seconds and several tens of seconds.
However, the power consumption of the central processor is typically large, in order to save precious power in the power supply assembly 100 to support the complete backup of data in the volatile memory 202 into the non-volatile memory 203; after the data in the central processing unit is stored in the volatile memory 202, the power control module 108 sends an OFF signal to the electronic switch 106, so as to cut OFF the power supply of the first energy storage device 105 to the data power down protection device 200. At this time, the electrical connection between the main board power interface 102 and the voltage conversion module 103 is interrupted; meanwhile, the bypassed second energy storage device 205 replaces the first energy storage device 105 to provide 12VDC power supply to the voltage conversion module 103 and support the controller 201 in the data loss protection device 200 to backup the data in its volatile memory 202 to the non-volatile memory 203.
Specifically, the controller 201 may be an FPGA (Field-Programmable Gate Array); or an ASIC (Application Specific Integrated Circuit), which typically includes a 32-bit processor, like ROM, RAM, E2PROM and Flash memory unit; the controller 201 may also be a CPLD (Complex Programmable Logic Device).
In this embodiment, the controller 201 is preferably an FPGA. The volatile memory 202 is a DRAM (dynamic random access memory), and the nonvolatile memory 203 may be a NAND flash memory or a phase change memory or a combination of both, and is further preferably a NAND flash memory. Therefore, in this embodiment, according to the technical solution, the waste of the charges stored in the two energy storage devices (i.e., the first energy storage device 105 and the second energy storage device 205) can be effectively avoided, so that the reasonable utilization of the charges stored in the two energy storage devices is improved, and the waste of the charges is prevented.
Meanwhile, in the present embodiment, the capacitance of the second energy storage device 205 is greater than or equal to the capacitance of the first energy storage device 105, and further preferably equal to both.
EXAMPLE III：
Referring to fig. 5, a third embodiment of an energy storage device of the present invention is shown.
The main difference between this embodiment and the two previous embodiments is that in this embodiment, the power supply assembly 100 further includes a controller voltage output interface 109 electrically connected to the voltage conversion module 103 and the power control module 108, respectively, and receives an interrupt signal sent by the power control module 108 through the controller voltage output interface 109, and provides the dc power converted by the voltage conversion module 103 to the data power failure protection device 200.
Specifically, the data loss protection device 200 further includes a controller voltage input interface 209 coupled to the controller 201. The controller voltage output interface 109 establishes electrical connections through modular lead assembly 219 and electrical connectors (not shown) to provide power to the entire data dropout protection apparatus 200.
In fig. 6, only one power supply assembly 100 is shown connected to one data loss protection device 200 for the convenience of illustrating the present invention, and those skilled in the art will readily appreciate that the power supply assembly 100 may also be connected to two or more data loss protection devices 200 through the controller voltage output interface 109. When a user upgrades a computer, only a greater number of modular lead assemblies 219 and electrical connectors need to be connected in parallel to the controller voltage output interface 109.
According to the invention, when a user upgrades a computer, only the number of the data power-down protection devices 200 is required to be upgraded, and the power supply assembly 100 is not required to be upgraded, so that the cost of the user in the process of upgrading the computer in an extension mode is reduced. Meanwhile, since a plurality of data power-down protection devices 200 can share one power supply module 100, the space in the computer mainframe can be prevented from being narrow, and the heat dissipation effect of the mainframe can be improved.
In this embodiment, when the computer is normally used, the volatile memory (DRAM) in the data power down protection device 200 can be directly used as the memory of the computer; when the computer is normally shut down, system data and other user data can be saved to a non-volatile memory (NAND flash memory).
Specifically, the data loss protection device 200 exchanges data with the host 300 through the interface module 204. More specifically, the interface module 204 may be a DIMM interface or a PCI-E interface, and is preferably a DIMM interface. When the interface module 204 is a DIMM interface, the controller voltage input interface 209 in this embodiment may be in the form of a PCI-E interface, and obtain the operating voltage required by the data loss protection device 200 from the power supply assembly 100 through the modular wire assembly 219 or a Flexible Printed Circuit Board (Flexible Printed Circuit Board) via an electrical connector (not shown) electrically connected to two ends of the Flexible Printed Circuit Board.
As another variation of this embodiment, when the data power down protection device 200 is plugged into a computer motherboard via a DIMM interface, the voltage conversion module 103 in the power supply module 100 may be disposed in the data power down protection device 200, and the controller voltage input interface 209 may be omitted at the same time, so as to directly supply power to the controller 201, the volatile memory 202, the non-volatile memory 203, and other electronic components (not shown) that need to be driven by power via internal circuits in the PCB board.
When the computer is powered off, after receiving the power-off trigger signal, the power control module 108 sends the power-off trigger signal to the controller 201 through sm _ bus, and the controller 201 performs data storage and backup processes.
Example four：
Referring to fig. 6, a fourth embodiment of an energy storage device of the present invention is shown.
The contents of the same or alternative portions of this embodiment as the first three embodiments are not repeated, but only the differences are shown. In this embodiment, the power module 100 further comprises an alarm device 110 connected to the power control module 108, and the power control module 108 comprises a storage module 1081. The memory module 1081 is selected from E2PROM, ROM, or the like havingA memory device with data saving function after power off, such as a memory for saving BIOS through a button cell on a computer motherboard.
Specifically, when the computer is powered on, the host 300 performs power-on self-test on the storage capacity and the operating frequency of all the volatile memories 202 accessed to the computer, and the parameters of the nonvolatile memories 203, such as the number of pages, the page capacity, the number of blocks, the block capacity, the I/O bit width, the operating frequency, the addressing mode, the process line width, the chip architecture, and the like, so as to store the storage medium configuration parameters of the volatile memories 202 and the nonvolatile memories 203 to the storage module 1081. Meanwhile, the power control module 108 performs power-on self-test on the capacitance of the first energy storage device 105, so as to store the configuration parameter of the capacitance of the first energy storage device 105 in the storage module 1081.
When the computer is subjected to power-on self-test, the storage medium configuration parameter is compared with the capacitance configuration parameter, and if the capacitance configuration parameter does not meet the requirement of the storage medium configuration parameter, the power control module 108 sends an enable signal 111 to the alarm device 110 to drive the alarm device 110. In the present embodiment, the alarm device 110 includes a buzzer, an LED, and preferably a buzzer.
Specifically, when the specification of the super capacitor 1151 in the first energy storage device 105 is configured, it can be calculated according to the following formula (1):
C≥I*t/ΔV+C0(1) (ii) a Wherein,
c is the minimum charge storage capacity of first energy storage device 105; i is an average working current of the data power down protection device 200 in the process from the start of data backup to the completion of data backup after unexpected power down; Δ V is the voltage V across the first energy storage device 105 when fully charged1Voltage V corresponding to the time when it cannot drive inverter 1072A voltage difference therebetween; t is the voltage across the first energy storage device 105 from V1Down to V2The time taken; c0The amount of residual charge is the amount of charge remaining when the first energy storage device 105 is unable to drive the inverter 107. At the same time, ensureT is greater than the data backup time (i.e., the total time of T1+ T2 in example two).
Similarly, when configuring the specification of the super capacitor 1151, the second energy storage device 205 may also obtain the corresponding configuration specification by referring to the above equation (1).
If the total capacitance of the super capacitor with charge storage capacity arranged in the power supply component 100 of the computer is not enough to support the data backup use when the computer is powered off, the user can be reminded to access a larger number of super capacitor sets 1051 in parallel at least in the first energy storage device 105 in a form of not limited to sound and light signals, so that the safety and the system stability of the computer are improved.
EXAMPLE five：
Referring to fig. 5, fig. 7 and fig. 8 in combination, an embodiment of a memory system of the present invention is shown.
In this embodiment, a memory system 10 includes a plurality of data power down protection devices 200, where the data power down protection devices 200 include a controller 201, a plurality of volatile memories 202 and a plurality of non-volatile memories 203 connected to the controller 201, and an interface module 204 connected to the controller 201 and performing data and signal transmission at least with a host 300, where the interface module 204 includes a DIMM interface or a PCI-E interface, and is preferably a PCI-E interface.
Further, the storage system 10 further includes a power supply assembly 100 according to any of the foregoing embodiments, wherein the power supply assembly 100 is electrically connected to at least one data loss protection device 200, and is capable of being connected to a plurality of data loss protection devices 200 in an extensible manner.
When a computer is powered down, the power supply assembly 100 provides a short-time power supply for the data power down protection device 200 to backup data in the volatile memory 202 to the non-volatile memory 203.
Referring to fig. 5, in the present embodiment, the data loss protection device 200 includes a controller voltage input interface 209, and the power supply module 100 includes a controller voltage output interface 109 electrically connected to the voltage conversion module 103 and the power control module 108, respectively, and a modular wire assembly 219. The modular lead assembly 219 is electrically connected to the controller voltage output interface 109 and the controller voltage input interface 209 of the data loss protection device 200 through electrical connectors (not shown) electrically connected to two ends of the modular lead assembly.
As shown in fig. 7 and 8, the memory system 10 may further include a power module 100 and two data loss protectors 200, each data loss protector 200 being connected in parallel to the controller voltage output interface 109 of the power module 100 via a respective controller voltage input interface 209 and modular conductor assembly 219.
Specifically, the controller voltage output interface 109 can transmit power signals and control signals through the modular wire assembly 219 and the controller voltage input interface 209, and the specific arrangement of the power lines and the control signal lines can be determined according to the specific type and type of the controller 201 in the data loss protection device 200.
As shown in fig. 7 and 8, in the present embodiment, the volatile memory 202 and the nonvolatile memory 203 are connected in parallel to the controller 201, respectively, to form a plurality of parallel data access channels. In the present embodiment, the controller 201 may simultaneously connect two or more volatile memories 202 and two or more nonvolatile memories 203 in parallel.
In fig. 8, only two volatile memories 202 and non-volatile memories 203, which are connected in parallel to the controller 201, respectively, are shown for simplicity of illustration.
When the computer is powered off, the power control module 108 in the power assembly 100 sends a power-off trigger signal to the controller 201, and the controller 201 backs up the data in the volatile memory 202 to the non-volatile memory 203 in parallel. In the embodiment, the volatile Memory 202 is selected from a DRAM (dynamic random access Memory), and the nonvolatile Memory 203 is selected from a Phase Change Memory (PCM).
Referring also to FIG. 6, in this embodiment, the power module 100 further comprises an alarm device 110 connected to the power control module 108, and the power control module 108 further comprises a storage module 1081.
When the computer is powered on, the host 300 performs power-on self-test on the storage medium configuration parameters of all the volatile memories 202 and the nonvolatile memories 203 accessed to the computer, and stores the storage medium configuration parameters to the storage module 1081 in the power control module 108 through an IO signal line (not shown). Meanwhile, the power control module 108 performs power-on self-test on the capacitance of the first energy storage device 105, so as to store the configuration parameter of the capacitance of the first energy storage device 105 in the storage module 1081.
When the computer is subjected to power-on self-test, the storage medium configuration parameter is compared with the capacitance configuration parameter, and if the capacitance configuration parameter does not meet the requirement of the storage medium configuration parameter, the power control module 108 sends an enable signal 111 to the alarm device 110 to drive the alarm device 110. In this embodiment, the alarm device 110 includes a buzzer and an LED. Preferably, the alarm device 100 is an LED.
As another modification of this embodiment, a Monitor (Monitor) provided in a computer may be used as an alarm device. When the computer is powered on and the main board BIOS performs self-checking, the alarm signal sent from the power control module 108 to the alarm device 110 may be directly pushed to the display of the user. Since the self-checking of the BIOS hardware of the motherboard shows that the system parameters of the computer are mature in the prior art, the detailed description is omitted here.
As a more preferable embodiment, I may be further provided in the data power down protection device 2002C interface (not shown), the I2The C interface is connected to the controller 201 and passes through the I2The C interface may enable firmware upgrade of the data power down protection device 200.
I2C is a serial bus generally provided with two signal lines, one being a bidirectional data line SDA and the other being a clock line SCL. Wherein, the data line SDA is directly controlled by the host 300, and the clock line SCL is connected with various access I2C devices of the bus.
In this embodiment, the data loss protection device 200 is connected to the host 300 through a DIMM interface, and an electrical connection is established between the data loss protection device 200 and the power module 100 through a modular wire assembly 219.
Meanwhile, in the present embodiment, the voltage conversion module 103 is disposed between the motherboard power interface 102 and the controller voltage output interface 109, and is configured to convert the 3.3VDC outputted by the first transformer 101 into five specified voltages, i.e., 1.0VDC, 1.2VDC, 1.5VDC, 1.8VDC, 2.5VDC, to provide operating voltages for the controller 201, the volatile memory 202, the non-volatile memory 203, and other electronic components in the data loss protection device 200, so as to ensure normal operation thereof.
EXAMPLE six：
The main difference between this embodiment and the fifth embodiment is that, in this embodiment, the data loss protection device 200 is connected to the host 300 through a PCI-E interface (i.e., the interface module 204 in fig. 5), and an electrical connection is established between the data loss protection device 200 and the power module 100 through the modular wire assembly 219.
In this embodiment, the interface module 204 in the data power-down protection device 200 adopts a PCI-E interface, and is directly plugged into a computer motherboard through such an interface. In this case, the controller power output interface 109 of the power module 100 may be omitted, and the interface module 204 (i.e., PCI-E interface) may directly provide the plurality of data loss protectors 200 with operating voltages and control signals of various specifications.
The PCI-E interface uses bidirectional data transmission, similar to the technology used in DRAM memory, to transmit data on both the upper and lower edges of a clock cycle, and it can use various standards such as PCI-E _1X, PCI-E _2X, PCI-E _4X, PCI-E _8X, PCI-E _ 16X. The data transmission rate of the PCI-E _16X can reach 4 GB/sec, and the data communication requirement of large flow generated when a large-capacity DRAM and a large-capacity NAND flash memory are connected to the controller 201 in parallel in the future can be met.
EXAMPLE seven：
The main difference between this embodiment and the fifth and sixth embodiments is that in this embodiment, the voltage conversion module 103 is not disposed between the motherboard power interface 102 and the controller voltage output interface 109 in the power module 100, and a voltage conversion module 103 (not shown) is disposed between the controller voltage input interface 209 and the controller 201, the volatile memory 202, and the non-volatile memory 203.
Specifically, in this embodiment, the voltage conversion module 103 is a low dropout regulator (not shown), and converts the 3.3VDC output by the first transformer 101 into five specified voltages, i.e., 1.0VDC, 1.2VDC, 1.5VDC, 1.8VDC and 2.5VDC, by the dropout regulator, so as to provide operating voltages for the controller 201, the volatile memory 202, the non-volatile memory 203 and other electronic components in the data loss protection device 200, thereby ensuring the normal operation thereof.
It is reasonably expected by those skilled in the art that a low dropout linear regulator (not shown) may be respectively disposed between the motherboard power interface 102 and the controller voltage output interface 109, and between the controller voltage input interface 209 and the controller 201, and between the volatile memory 202 and the nonvolatile memory 203, so as to achieve the technical effects of better reducing power supply noise and improving power supply rejection ratio.
Finally, in general, those skilled in the art will recognize that the various embodiments described herein may be combined individually and/or collectively into a variety of hardware configurations, including computers used in personal computers, workstations, servers, cloud computing hosts, including storage systems, and computer power supplies providing integrated power supplies for such hardware configurations.
The above-listed detailed description is only a specific description of a possible embodiment of the present invention, and they are not intended to limit the scope of the present invention, and equivalent embodiments or modifications made without departing from the technical spirit of the present invention should be included in the scope of the present invention.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be combined as appropriate to form other embodiments understood by those skilled in the art.
Claims (13)
1. The utility model provides a power supply module, includes electric connection's first transformer, mainboard power source interface and voltage conversion module in order to convert the commercial power into the assigned voltage and for a plurality of data power down protection device power supplies in the computer, its characterized in that, power supply module still includes: the power supply comprises a first transformer, an inverter, a first energy storage device, an electronic switch and a power supply control module, wherein the first transformer and the inverter are electrically connected with the first transformer;
the electronic switch is kept in a normally-off state when the computer is normally powered on, and when the computer is powered off, the power supply control module acquires a power-off trigger signal generated by the second transformer, sends a conducting signal to the electronic switch and supplies power to the first transformer through the first energy storage device.
2. The power supply component of claim 1, wherein the electronic switch is electrically connected between the first energy storage device and the inverter.
3. The power supply component of claim 1, wherein the motherboard power interface is an ATX power interface; the voltage conversion module consists of a low dropout linear regulator and/or a DC-DC converter.
4. The power supply module of claim 1, wherein a second energy storage device is connected in parallel between the power board interface and the voltage conversion module, and the second energy storage device has a capacitance greater than or equal to the capacitance of the first energy storage device.
5. The power supply module of claim 1, further comprising a controller voltage output interface electrically connected to the voltage conversion module and the power control module, respectively, for receiving an interrupt signal from the power controller module and providing the dc power converted by the voltage conversion module to the data loss protection device.
6. The power supply component of claim 4, wherein the first and second energy storage devices comprise a plurality of super capacitor banks, the super capacitor banks being formed by a plurality of super capacitors connected in series.
7. Power supply component according to any of claims 1 to 6, characterized in that the electronic switch comprises a MOS transistor, a relay, a triode, an IGBT transistor or a thyristor.
8. A storage system comprises a plurality of data power-down protection devices, wherein each data power-down protection device comprises a controller, a plurality of volatile memories and a plurality of nonvolatile memories which are connected with the controller, and an interface module which is connected with the controller and at least performs data and signal transmission with a host;
the storage system further comprising a power supply assembly according to any one of claims 1 to 7, the power supply assembly being electrically connected to at least one data loss protection device;
when the computer is powered off, the power supply assembly provides power supply for the data power-down protection device for a short time so as to back up data in the volatile memory to the nonvolatile memory.
9. The memory system of claim 8, wherein the interface module comprises a DIMM interface or a PCI-E interface.
10. The memory system of claim 8, wherein the data loss protection device further comprises a controller voltage input interface electrically connected to the controller, the power supply assembly further comprises a controller voltage output interface electrically connected to the voltage conversion module and the power supply control module, respectively, and a modular lead assembly;
the controller voltage output interface can transmit power and control signals through the modularized conducting wire assembly and the controller voltage input interface.
11. The memory system of claim 10, wherein the memory system comprises at least two data brown-out protectors, each connected in parallel to the controller voltage output interface of the power supply assembly through a respective controller voltage input interface and modular lead assembly.
12. The memory system of claim 10, wherein the data brown-out protection device further comprises a low dropout regulator disposed between the controller voltage input interface and the controller, the volatile memory, and the non-volatile memory.
13. The storage system of claim 8, wherein the power module further comprises an alarm device coupled to a power control module, the power control module comprising a storage module;
the storage module is configured to store storage medium configuration parameters of a volatile memory and a non-volatile memory which are accessed into the computer, and electric capacity configuration parameters of the first energy storage device;
when the computer is subjected to power-on self-test, comparing the storage medium configuration parameter with the capacitance configuration parameter, and if the capacitance configuration parameter does not meet the requirement of the storage medium configuration parameter, sending an enabling signal to an alarm device by a power control module to drive the alarm device;
the alarm device comprises a buzzer and an LED, and the storage module comprises E2The controller comprises an FPGA or an ASIC, the volatile memory is a DRAM, and the nonvolatile memory comprises a NAND flash memory and/or a phase change memory.
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