CN103731151A - Method and circuit for converting duty ratio into analog signal - Google Patents
Method and circuit for converting duty ratio into analog signal Download PDFInfo
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- CN103731151A CN103731151A CN201410017698.8A CN201410017698A CN103731151A CN 103731151 A CN103731151 A CN 103731151A CN 201410017698 A CN201410017698 A CN 201410017698A CN 103731151 A CN103731151 A CN 103731151A
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Abstract
The invention discloses a method and a circuit for converting a duty ratio into an analog signal. The circuit comprises a duty ratio measuring unit and a digital-to-analogue conversion unit; the duty ratio unit is used for receiving switch control signals and obtaining numerical values of relevant parameters of the duty ratio of the switch control signals; the digital-to-analogue conversion unit is used for receiving the numerical values of the relevant parameters of the duty ratio and converting the numerical values of the relevant parameters of the duty ratio into the analog signal. The circuit can reduce cost and improve the transient response speed.
Description
Technical field
The present invention relates to electronic technology field, relate to particularly method and circuit for duty cycle conversion being become to analog signal.
Background technology
Switching Power Supply generally includes power stage circuit and control circuit.The function of control circuit is when input voltage, inner parameter and external load change, and the turn-on and turn-off time of the switching system in regulating power level circuit, so that the output voltage of Switching Power Supply or output current maintenance are constant.
The control mode of Switching Power Supply can be divided into fixed-frequency control and variable frequency control.Fixed-frequency control is that switch periods is invariable, by the time width of adjusting switch conduction in one-period, carrys out regulation output voltage, i.e. pulse width modulation (PWM).Variable frequency control is that the frequency of switch changes with the amplitude of input signal, i.e. pulse frequency modulated (PFM).Pulse frequency modulated (PFM), it has constant on-time, constant turn-off time and sluggishness and the control mode such as relatively controls.
In Switching Power Supply, the Part I of control circuit compares output voltage or output current and sawtooth signal, thereby produces pwm signal or the PFM signal with duty ratio.The Part II reception pwm signal of control circuit or PFM signal, as input signal, then produce control signal, for switch conduction or the disconnection of power switched level circuit.Can regard the Part II of control circuit as duty cycle conversion circuit together with power stage circuit.This duty cycle conversion circuit converts pwm signal or PFM signal to analog signal, i.e. the VD of Switching Power Supply or DC output power.
Duty cycle conversion circuit is also widely used for various analog measurement instrument or load drive device.In analog measurement instrument, for example, need to convert pwm signal to analog voltage or current signal.In load drive device, for example, need to regulate by voltage or the electric current of load according to the pwm signal of outside input.As load drive device, duty cycle conversion circuit can be realized the simulation light modulation of light-emitting diode (LED), the simulation speed governing of radiator fan or the power adjustments of amplifier etc.
Although often utilize digital circuit to generate pwm signal or PFM signal, duty cycle conversion circuit self remains the analog circuit that comprises resistance capacitance loop.For the analog signal of level and smooth output, the frequency of the necessary long-range switch controlling signal of the time constant in resistance capacitance loop.This not only causes the volume of integrated circuit and cost to increase, and causes the transient response of duty cycle conversion circuit slow.
Therefore, expect further reduce the cost of duty cycle conversion circuit and improve transient response speed.
Summary of the invention
In view of this, the object of the present invention is to provide the fast duty cycle conversion circuit of a kind of low cost and transient response.
According to a first aspect of the invention, provide a kind of for duty cycle conversion being become to the circuit of analog signal, comprising: duty ratio measuring unit, for receiving key control signal, and the digital value of the duty ratio relevant parameter of acquisition switch controlling signal; And D/A conversion unit, for receiving the digital value of duty ratio relevant parameter, and convert the digital value of duty ratio relevant parameter to analog signal.
Preferably, in described circuit, described duty ratio relevant parameter comprises at least one in ON time, turn-off time and the Cycle Length of switch controlling signal.
Preferably, in described circuit, described analog signal comprises the one in direct current and direct voltage.
Preferably, in described circuit, described duty ratio measuring unit comprises: rising edge and trailing edge detector, for receiving key control signal, and produce corresponding synchronous triggering signal at rising edge and the trailing edge of the square wave pulse of switch controlling signal; Counter, for counting clock signal under the control of synchronous triggering signal; And register, for from counter count pick up value, and export count value under the control of synchronous triggering signal.
Preferably, in described circuit, described duty ratio measuring unit also comprises: with door, for receiving key control signal and clock signal, and only in high level stage of switch controlling signal to the pulse of counter output clock.
Preferably, in described circuit, described duty ratio measuring unit also comprises: not gate, for the inversion signal of receiving key control signal output switch control signal; And with door, for inversion signal and the clock signal of receiving key control signal, and only in low level stage of switch controlling signal to the pulse of counter output clock.
Preferably, in described circuit, described clock signal is produced by external circuit.
Preferably, described circuit also comprises: oscillator, and for produce described clock signal under the control of synchronous triggering signal.
Preferably, in described circuit, described duty ratio measuring unit comprises and also comprises shift register, for by the digital value displacement of described register output.
Preferably, in described circuit, described duty ratio relevant parameter comprises ON time and the Cycle Length of switch controlling signal, and described shift register is by the count value of the ON time of switch controlling signal and the Cycle Length identical figure place that is shifted.
Preferably, in described circuit, described duty ratio relevant parameter comprises turn-off time and the Cycle Length of switch controlling signal, and described shift register is by the count value of the turn-off time of switch controlling signal and the Cycle Length identical figure place that is shifted.
Preferably, in described circuit, described D/A conversion unit comprises digital to analog converter, for described duty ratio relevant parameter is converted to corresponding analog signal.
Preferably, in described circuit, described D/A conversion unit comprises: duty ratio computing module, for calculate the digital value of duty ratio from described duty ratio relevant parameter; And digital to analog converter, for converting the digital value of described duty ratio to corresponding analog signal.
Preferably, in described circuit, described D/A conversion unit comprises: digital to analog converter, represents the first resistance value of ON time and the second resistance value of indication cycle's length for described duty ratio relevant parameter is converted to; Current feedback circuit, for producing reference current according to the second resistance value; And voltage generator, for producing analog signal according to the first resistance value and reference current.
According to a second aspect of the invention, provide a kind of for duty cycle conversion being become to the method for analog signal, comprising: receiving key control signal; Obtain the digital value of the duty ratio relevant parameter of switch controlling signal; And convert the digital value of duty ratio relevant parameter to analog signal.
Preferably, in described method, described duty ratio relevant parameter comprises at least one in ON time, turn-off time and the Cycle Length of switch controlling signal.
Preferably, in described method, described analog signal comprises the one in direct current and direct voltage.
Preferably, in described method, the step of digital value that obtains the duty ratio relevant parameter of switch controlling signal comprises: rising edge and trailing edge in the square wave pulse of switch controlling signal produce corresponding synchronous triggering signal; Under the control of synchronous triggering signal, clock signal is counted; And export count value under the control of synchronous triggering signal.
Preferably, in described method, only, in the high level stage of switch controlling signal, under the control of synchronous triggering signal, clock signal is counted.
Preferably, in described method, only, in the low level stage of switch controlling signal, under the control of synchronous triggering signal, clock signal is counted.
Preferably, in described method, in the whole cycle of switch controlling signal, under the control of synchronous triggering signal, clock signal is counted.
Preferably, in described method, the step that obtains the digital value of the duty ratio relevant parameter of switch controlling signal comprises: obtain the ON time of switch controlling signal and the count value of Cycle Length; And by the count value of the ON time of switch controlling signal and the Cycle Length identical figure place that is shifted.
Preferably, in described method, the step that obtains the digital value of the duty ratio relevant parameter of switch controlling signal comprises: obtain the turn-off time of switch controlling signal and the count value of Cycle Length; And by the count value of the turn-off time of switch controlling signal and the Cycle Length identical figure place that is shifted.
Preferably, in described method, the step that the digital value of duty ratio relevant parameter is converted to analog signal comprises: the digital value that calculates duty ratio from described duty ratio relevant parameter; And convert the digital value of described duty ratio to corresponding analog signal.
Preferably, in described method, the step that the digital value of duty ratio relevant parameter is converted to analog signal comprises: described duty ratio relevant parameter is converted to and represents the first resistance value of ON time and the second resistance value of indication cycle's length; According to the second resistance value, produce reference current; And produce analog signal according to the first resistance value and reference current.
Duty cycle conversion circuit of the present invention is Digital Analog Hybrid Circuits, first adopts duty ratio measuring unit to convert switch controlling signal to digital value, then adopts D/A conversion unit to produce analog signal according to this digital value.Therefore, in output stage, do not need to adopt resistance and the output capacitance of large numerical value, thereby reduced chip area, thereby reduced the cost of duty cycle conversion circuit.This duty cycle conversion circuit can be realized the quick conversion from duty ratio to analog signal.Only within a signal period, the variation that the output of this duty cycle conversion circuit just can reflected input signal, thus improved transient response speed.
Accompanying drawing explanation
By the description to the embodiment of the present invention referring to accompanying drawing, above-mentioned and other objects of the present invention, feature and advantage will be more clear, in the accompanying drawings:
Fig. 1 illustrates according to the schematic circuit of the duty cycle conversion circuit of prior art;
Fig. 2 illustrates according to the schematic block diagram of duty cycle conversion circuit of the present invention;
Fig. 3 illustrates according to the flow chart of duty cycle conversion method of the present invention;
Fig. 4 illustrates according to the schematic block diagram of the first embodiment of duty ratio measuring unit in duty cycle conversion circuit of the present invention;
Fig. 5 illustrates according to the schematic block diagram of the second embodiment of duty ratio measuring unit in duty cycle conversion circuit of the present invention;
Fig. 6 illustrates according to the schematic block diagram of the 3rd embodiment of duty ratio measuring unit in duty cycle conversion circuit of the present invention;
Fig. 7 illustrates according to the schematic block diagram of the 4th embodiment of duty ratio measuring unit in duty cycle conversion circuit of the present invention;
Fig. 8 illustrates according to the sequential chart of pwm signal and external timing signal in duty cycle conversion circuit of the present invention;
Fig. 9 illustrates according to the schematic block diagram of the first embodiment of D/A conversion unit in duty cycle conversion circuit of the present invention;
Figure 10 illustrates according to the schematic block diagram of the second embodiment of D/A conversion unit in duty cycle conversion circuit of the present invention; And
Figure 11 illustrates according to the schematic block diagram of the second embodiment of D/A conversion unit in duty cycle conversion circuit of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the preferred embodiments of the present invention are described in detail.It should be understood by one skilled in the art that the accompanying drawing providing at this is all for illustrative purposes, and accompanying drawing not necessarily in proportion draw.For fear of obscuring essence of the present invention, known method, process, flow process, element and circuit do not describe in detail.
Should be appreciated that the connection between element can be physically, in logic or its combination when claiming element " to be couple to " or during " being connected to " another element, it can be directly couple or be connected to another element or can have intermediary element.On the contrary, when claiming element " to be directly coupled to " or during " being directly connected to " another element, meaning that both do not exist intermediary element.
In this application, term " switch controlling signal " refers to rectangular wave pulse signal, in each cycle of rectangular wave pulse signal, comprises a high level stage and a low level stage.Term " duty ratio " refers in the one-period of rectangular wave pulse signal, ON time Ton(for example, the duration of high level signal in one-period) with the switch periods T(of rectangular wave pulse signal, the length of one-period) ratio, by symbol, D represents.Term " duty ratio measuring unit " for example refers to, for measuring the parameter relevant to the duty ratio of rectangular wave pulse signal (ON time TON, turn-off time T
oFFand/or switch periods T) circuit module.
Fig. 1 illustrates the schematic circuit of conventional duty cycle conversion circuit 10.This duty cycle conversion circuit 10 comprises inverter A1, upper switching tube S1, lower switching tube S2, resistance R 1, output capacitance C1.Upper switching tube S1, lower switching tube S2, resistance R 1, output capacitance C1 form power stage circuit 11 together.
In duty cycle conversion circuit 10, upper switching tube S1 and lower switching tube S2 are connected in series in reference voltage V
rEFand between ground.The input of duty cycle conversion circuit 10 receives pwm signal.Then, pwm signal provides the control end of supreme switching tube S1, and pwm signal provides to the control end of lower switching tube S2 via inverter A1, makes switching tube S1 and lower switching tube S2 alternate conduction and disconnection.Resistance R 1 is serially connected between switching tube S1 and the node and output of lower switching tube S2.Output capacitance C1 is connected between output and ground.
When the pwm signal of input is high level, the control signal that is directly applied to the control end of switching tube S1 is high level, control signal through the anti-phase after-applied control end to lower switching tube S2 of inverter A1 is low level, thus upper switching tube S1 conducting, and lower switching tube S2 disconnects.Reference voltage V
rEFvia upper switching tube S1 and resistance R 1, output capacitance C1 is charged.Otherwise, when the pwm signal of input is low level, the control signal that is directly applied to the control end of switching tube S1 is low level, through the control signal of the anti-phase after-applied control end to lower switching tube S2 of inverter A1, is high level, thereby upper switching tube S1 disconnects, lower switching tube S2 conducting.Output capacitance C1 discharges over the ground via resistance R 1 and lower switching tube S2.
Because resistance R 1 and output capacitance C1 have smoothing effect for pulse input, under the control of continuous pwm signal, the output of duty cycle conversion circuit 10 is smooth dc voltage and the direct currents with minimum ripple stack component.If the time constant of resistance R 1 and output capacitance C1 is much larger than input pwm signal frequency, the voltage V of output
out=V
rEF* D, wherein D=T
oN/ T, T
oNfor the ON time in one-period, the length that T is one-period.
The shortcoming of the duty cycle conversion circuit 10 of above-mentioned routine is that the time constant of resistance R 1 and output capacitance C1 must, much larger than the frequency of pwm signal, just can guarantee voltage V
outbe approximately direct current signal.As a result, the numerical value of resistance R 1 and output capacitance C1 must be larger, and this can make cost increase in integrated circuit (IC) design, cannot realize even at all.And due to the existence of time constant, the dynamic adjustment of this method is very slow, the variation of switch controlling signal needs just can be reflected to for a long time V
out.
Fig. 2 illustrates that, according to the schematic block diagram of duty cycle conversion circuit 100 of the present invention, Fig. 3 illustrates according to the flow chart of duty cycle conversion method of the present invention.This duty cycle conversion circuit 100 comprises duty ratio measuring unit 110, D/A conversion unit 120.
The input of duty cycle conversion circuit 100 receives pwm signal or PFM signal (step S01).For each cycle, the parameter relevant to duty ratio measured in duty ratio measuring unit 110, and exports its digital value (step S02).In this application, the parameter relevant to duty ratio comprises ON time T
oN, turn-off time T
oFF, at least one parameter in Cycle Length T.D/A conversion unit 120 receives the digital value of described parameter, and converts digital value to the amplitude analog output signal corresponding with duty ratio (step S03).In one example, the voltage V of the output of duty cycle conversion circuit 100
out=k*D, wherein k is constant.
It should be noted that duty cycle conversion circuit 100 of the present invention is Digital Analog Hybrid Circuits, first adopt duty ratio measuring unit 110 to convert switch controlling signal to digital value, then adopt D/A conversion unit 120 to produce analog signal according to this digital value.Therefore, do not need to use resistance and the output capacitance of large numerical value in output stage, this has not only reduced the cost of duty cycle conversion circuit 100, and has improved transient response speed.
Fig. 4 to 7 illustrates that, according to the schematic block diagram of some embodiment of duty ratio measuring unit in duty cycle conversion circuit 100 of the present invention, Fig. 8 illustrates according to the sequential chart of pwm signal and external timing signal in duty cycle conversion circuit 100 of the present invention.
Referring to Fig. 4, according to the duty ratio measuring unit 110 of the first embodiment comprise rising edge and trailing edge detector 111, with door 112, counter 113, register 114.
Input receiving key control signal (example pwm signal as shown in Figure 8) and the external timing signal CLK(example clock signal clk as shown in Figure 8 of duty ratio measuring unit 110).In order to obtain suitable counting precision, the frequency f of external timing signal CLK
cLKshould obviously be greater than the frequency f of switch controlling signal
pWM.For example, f
cLK>100*f
pWM.
Switch controlling signal is provided to rising edge and trailing edge detector 111.In each cycle of switch controlling signal, rising edge and trailing edge detector 111 detects rising edge and the trailing edge of these signals, with obtain the high level stage the zero hour t0 and the finish time t1.The zero hour, t0 not only represented the beginning in high level stage, and represented the end in previous cycle and the beginning of current period.At moment t0 and t1, rising edge and trailing edge detector 111 produce corresponding synchronous triggering signal, and synchronous triggering signal is provided to counter 113 and register 114.
In addition, switch controlling signal is provided together with external timing signal CLK to door 112.In each cycle of switch controlling signal, with door 112 only in the output clock pulse of the high level stage of switch controlling signal.This output clock pulse provides to counter 113.Under the control of synchronous triggering signal, counter 113 is in moment t0 zero clearing and start counting, stops counting, and deposit count value in register 114 at moment t1, then exports the digital value T of ON time
oN.
Referring to Fig. 5, according to the duty ratio measuring unit 210 of the second embodiment comprise rising edge and trailing edge detector 211, with door 212, counter 213, register 214, not gate 215.
Different from the duty ratio measuring unit 110 shown in Fig. 4, according in the duty ratio measuring unit 210 of the second embodiment, switch controlling signal is provided to not gate 215.The inversion signal of not gate 215 output switch control signals.Then, the inversion signal of switch controlling signal is provided together with external timing signal CLK to door 212.In each cycle of switch controlling signal, with door 212 only in the output clock pulse of the low level stage of switch controlling signal.This output clock pulse provides to counter 213.Under the control of synchronous triggering signal, counter 213 is in moment t1 zero clearing and start counting, and in the zero hour in next cycle, t2 stops counting, and deposits count value in register 214, then exports the digital value T of turn-off time
oFF.
Other parts of this duty ratio measuring unit 210 are identical with the appropriate section of the duty ratio measuring unit 110 shown in Fig. 4.
Referring to Fig. 6, according to the duty ratio measuring unit 310 of the 3rd embodiment, comprise rising edge and trailing edge detector 311, counter 312, register 313.
Different from the duty ratio measuring unit 110 shown in Fig. 4, in duty ratio measuring unit 310, external timing signal CLK is directly provided to counter 312.Output clock pulse in the whole cycle of switch controlling signal.Under the control of synchronous triggering signal, counter 312 is in moment t0 zero clearing and start counting, and in the zero hour in next cycle, t2 stops counting, and deposits count value in register 313, then exports the digital value T of Cycle Length.
Other parts of this duty ratio measuring unit 310 are identical with the appropriate section of the duty ratio measuring unit 110 shown in Fig. 4.
The digital value T that duty ratio measuring unit obtains respectively ON time in each cycle of switch controlling signal has been described above
oN, the digital value T of turn-off time in each cycle
oFFor the different embodiment of the digital value T of the Cycle Length in each cycle.But these embodiment combination in any as required, to form new duty ratio measuring unit.
For example, referring to Fig. 7, according to the duty ratio measuring unit 410 of the 4th embodiment comprise rising edge and trailing edge detector 411, with door 412, counter 413, register 414, counter 416, register 417.The combination of the duty ratio measuring unit 310 shown in the duty ratio measuring unit 110 shown in Fig. 4 and Fig. 6 can be thought in this duty ratio measuring unit 410.As preferred embodiment, duty ratio measuring unit 410 also comprises additional shift register 415 and 418.
Input receiving key control signal (example pwm signal as shown in Figure 8) and the external timing signal CLK(example clock signal clk as shown in Figure 8 of duty ratio measuring unit 410).In order to obtain suitable counting precision, the frequency f of external timing signal CLK
cLKshould obviously be greater than the frequency f of switch controlling signal
pWM.For example, f
cLK>100*f
pWM.
Switch controlling signal is provided to rising edge and trailing edge detector 411.In each cycle of switch controlling signal, rising edge and trailing edge detector 411 detects rising edge and the trailing edge of these signals, with obtain the high level stage the zero hour t0 and the finish time t1.The zero hour, t0 not only represented the beginning in high level stage, and represented the end in previous cycle and the beginning of current period.At moment t0 and t1, rising edge and trailing edge detector 411 produce corresponding synchronous triggering signal, and synchronous triggering signal is provided to counter 413, register 414, counter 416, register 417 and optional shift register 415 and 418.
In addition, switch controlling signal is provided together with external timing signal CLK to door 412.In each cycle of switch controlling signal, only in the output clock pulse of the high level stage of switch controlling signal.This output clock pulse provides to counter 413.Under the control of synchronous triggering signal, counter 413 is in moment t0 zero clearing and start counting, stops counting, and deposit count value in register 414 at moment t1, then exports the digital value T of ON time
oN.
In addition, external timing signal CLK is directly provided to counter 416.Output clock pulse in the whole cycle of switch controlling signal.Under the control of synchronous triggering signal, counter 416 is in moment t0 zero clearing and start counting, and in the zero hour in next cycle, t2 stops counting, and deposits count value in register 417, then exports the digital value T of Cycle Length.
In a preferred embodiment, by the count value T of ON time
oNprovide to shift register 415, and the count value T of Cycle Length is provided to shift register 418.If detect that the highest significant position of the count value of Cycle Length is not equal to 1, in shift register 415 and 418, by the count value of the count value of ON time and the Cycle Length identical figure place that is shifted, and the highest significant position of guaranteeing the digital value T of Cycle Length is 1, the count value after displacement is as the digital value that will export.Subsequently, by according to the digital value T of ON time
oNratio computed duty cycle with the digital value T of Cycle Length.This normalization operation can obtain real duty ratio, and can reduce the error of calculation.
In a preferred embodiment, duty ratio measuring unit can comprise that internal oscillator is with clocking CLK, thereby replaces external timing signal CLK.Rising edge and trailing edge detector 411 are further for internal oscillator provides triggering signal.Under the control of lock-out pulse, internal oscillator resets to produce the clock pulse of aliging with the rising edge of switch controlling signal at moment t0, at moment t1, reset to produce the clock pulse of aliging with the trailing edge of switch controlling signal, thereby count results more accurately can be provided.
Fig. 9 to 11 illustrates according to the schematic block diagram of some embodiment of D/A conversion unit in duty cycle conversion circuit 100 of the present invention.
Referring to Fig. 9, according to the D/A conversion unit 120 of the first embodiment, comprise digital to analog converter 121.
Digital to analog converter 121 inputs receive the digital value T of ON time
oN, for example, from the output of the duty ratio measuring unit 110 shown in Fig. 4, receive T
oN.Then, digital to analog converter 121 converts this digital value to corresponding analog signal: V
oUT=V
rEF* T
oN, wherein V
rEFit is the reference voltage of digital to analog converter 121.If switch controlling signal is the pwm signal that frequency is constant, the output V of D/A conversion unit 120
oUTd is proportional with duty ratio: V
oUT=k*D, wherein k is constant.
Referring to Figure 10, according to the D/A conversion unit 220 of the second embodiment, comprise duty ratio computing module 221 and digital to analog converter 222.
The input of duty ratio computing module 221 receives the digital value T of ON time
oNwith the digital value T of Cycle Length, for example, from the output of the duty ratio measuring unit 410 shown in Fig. 7, receive T
oNand T.Then, duty ratio computing module 221 is according to equation D=T
oN/ T, calculates the digital value of duty ratio D.In alternative embodiment, the input of duty ratio computing module 221 receives turn-off time T
oFFdigital value and the digital value of Cycle Length T.Then, duty ratio computing module 221 is according to equation D=1-T
oFF/ T, calculates the digital value of duty ratio D.
The input of digital to analog converter 222 receives the digital value of duty ratio D, then converts thereof into corresponding analog signal: V
oUT=V
rEF* D, wherein V
rEFit is the reference voltage of digital to analog converter 222.As a result, no matter switch controlling signal is pwm signal that frequency is constant or the PFM signal of changeable frequency, the output V of D/A conversion unit 222
oUTall proportional with duty ratio D.
Referring to Figure 11, according to the D/A conversion unit 320 of the 3rd embodiment, comprise digital to analog converter 321 and 322, current feedback circuit 323 and voltage generator 324.
The input of digital to analog converter 321 and 322 receives respectively the digital value T of ON time
oNwith the digital value T of Cycle Length, for example, from the output of the duty ratio measuring unit 410 shown in Fig. 7, receive T
oNand T.
Then, digital to analog converter 321 is by the digital value T of ON time
oNbe converted to corresponding the first resistance value: R
tON=Ε n
i2
ir, wherein n
ibeing the digital value of i position, is 0 or 1; And R is a fixed resistance value.
For example,, if the digital value T of ON time
oNfor octet 1000,1000,
Similarly, the digital value T of Cycle Length can be converted to the second resistance value R
t.
Then, the second resistance value RT is provided to current feedback circuit 323, produce reference current I
rEF:
wherein V
rEFit is the reference voltage of current feedback circuit 323.
Then, by the first resistance value R
tonwith reference current I
rEFprovide to voltage generator 324.Voltage generator 324 produces output analog voltage: V
oUT=V
rEF* D, wherein V
rEFit is the reference voltage of current feedback circuit 323.As a result, no matter switch controlling signal is pwm signal that frequency is constant or the PFM signal of changeable frequency, in each cycle of switch controlling signal, the output V of voltage generator 324
oUTall proportional with duty ratio D.
Duty cycle conversion circuit and the method thereof of output analog voltage have been described hereinbefore.In alternative embodiment, duty cycle conversion circuit may further include additional converter, converts output analog voltage to output analog current.According to the duty cycle conversion circuit of this alternate embodiment, can be used as LED driver.For example, in LED driver, according to pwm signal, regulate the drive current of LED, to realize simulation light modulation (analog dimming).
According to embodiments of the invention as described above, these embodiment do not have all details of detailed descriptionthe, and also not limiting this invention is only described specific embodiment.Obviously, according to above description, can make many modifications and variations.These embodiment are chosen and specifically described to this specification, is in order to explain better principle of the present invention and practical application, thereby under making, technical field technical staff can utilize the present invention and the modification on basis of the present invention to use well.The present invention is only subject to the restriction of claims and four corner and equivalent.
Claims (25)
1. for duty cycle conversion being become to a circuit for analog signal, comprising:
Duty ratio measuring unit, for receiving key control signal, and the digital value of the duty ratio relevant parameter of acquisition switch controlling signal; And
D/A conversion unit, for receiving the digital value of duty ratio relevant parameter, and converts the digital value of duty ratio relevant parameter to analog signal.
2. circuit according to claim 1, wherein said duty ratio relevant parameter comprises at least one in ON time, turn-off time and the Cycle Length of switch controlling signal.
3. circuit according to claim 1, wherein said analog signal comprises the one in direct current and direct voltage.
4. circuit according to claim 1, wherein said duty ratio measuring unit comprises:
Rising edge and trailing edge detector, for receiving key control signal, and produce corresponding synchronous triggering signal at rising edge and the trailing edge of the square wave pulse of switch controlling signal;
Counter, for counting clock signal under the control of synchronous triggering signal; And
Register for from counter count pick up value, and is exported count value under the control of synchronous triggering signal.
5. circuit according to claim 4, wherein said duty ratio measuring unit also comprises:
With door, for receiving key control signal and clock signal, and only in high level stage of switch controlling signal to the pulse of counter output clock.
6. circuit according to claim 4, wherein said duty ratio measuring unit also comprises:
Not gate, for the inversion signal of receiving key control signal output switch control signal; And
With door, for inversion signal and the clock signal of receiving key control signal, and only in low level stage of switch controlling signal to the pulse of counter output clock.
7. circuit according to claim 4, described clock signal is produced by external circuit.
8. circuit according to claim 4, also comprises:
Oscillator, for producing described clock signal under the control of synchronous triggering signal.
9. circuit according to claim 4, wherein said duty ratio measuring unit comprises and also comprises shift register, for by the digital value displacement of described register output.
10. circuit according to claim 9, wherein said duty ratio relevant parameter comprises ON time and the Cycle Length of switch controlling signal, and described shift register is by the count value of the ON time of switch controlling signal and the Cycle Length identical figure place that is shifted.
11. circuit according to claim 9, wherein said duty ratio relevant parameter comprises turn-off time and the Cycle Length of switch controlling signal, and described shift register is by the count value of the turn-off time of switch controlling signal and the Cycle Length identical figure place that is shifted.
12. circuit according to claim 1, wherein said D/A conversion unit comprises digital to analog converter, for described duty ratio relevant parameter is converted to corresponding analog signal.
13. according to the circuit described in claim 10 or 11, and wherein said D/A conversion unit comprises:
Duty ratio computing module, for calculating the digital value of duty ratio from described duty ratio relevant parameter; And
Digital to analog converter, for converting the digital value of described duty ratio to corresponding analog signal.
14. circuit according to claim 10, wherein said D/A conversion unit comprises:
Digital to analog converter, represents the first resistance value of ON time and the second resistance value of indication cycle's length for described duty ratio relevant parameter is converted to;
Current feedback circuit, for producing reference current according to the second resistance value; And
Voltage generator, for producing analog signal according to the first resistance value and reference current.
15. 1 kinds for becoming duty cycle conversion the method for analog signal, comprising:
Receiving key control signal;
Obtain the digital value of the duty ratio relevant parameter of switch controlling signal; And
Convert the digital value of duty ratio relevant parameter to analog signal.
16. methods according to claim 15, wherein said duty ratio relevant parameter comprises at least one in ON time, turn-off time and the Cycle Length of switch controlling signal.
17. methods according to claim 15, wherein said analog signal comprises the one in direct current and direct voltage.
18. methods according to claim 15, the step that wherein obtains the digital value of the duty ratio relevant parameter of switch controlling signal comprises:
Rising edge and trailing edge in the square wave pulse of switch controlling signal produce corresponding synchronous triggering signal;
Under the control of synchronous triggering signal, clock signal is counted; And
Under the control of synchronous triggering signal, export count value.
19. methods according to claim 18 wherein, only in the high level stage of switch controlling signal, are counted clock signal under the control of synchronous triggering signal.
20. methods according to claim 18 wherein, only in the low level stage of switch controlling signal, are counted clock signal under the control of synchronous triggering signal.
21. methods according to claim 18 wherein, in the whole cycle of switch controlling signal, are counted clock signal under the control of synchronous triggering signal.
22. methods according to claim 15, the step that wherein obtains the digital value of the duty ratio relevant parameter of switch controlling signal comprises:
Obtain the ON time of switch controlling signal and the count value of Cycle Length; And
By the count value of the ON time of switch controlling signal and the Cycle Length identical figure place that is shifted.
23. methods according to claim 15, the step that wherein obtains the digital value of the duty ratio relevant parameter of switch controlling signal comprises:
Obtain the turn-off time of switch controlling signal and the count value of Cycle Length; And
By the count value of the turn-off time of switch controlling signal and the Cycle Length identical figure place that is shifted.
24. according to the method described in claim 22 or 23, and the step that wherein digital value of duty ratio relevant parameter is converted to analog signal comprises:
From described duty ratio relevant parameter, calculate the digital value of duty ratio; And
Convert the digital value of described duty ratio to corresponding analog signal.
25. methods according to claim 22, the step that wherein digital value of duty ratio relevant parameter is converted to analog signal comprises:
Described duty ratio relevant parameter is converted to and represents the first resistance value of ON time and the second resistance value of indication cycle's length;
According to the second resistance value, produce reference current; And
According to the first resistance value and reference current, produce analog signal.
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Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104822197A (en) * | 2015-04-20 | 2015-08-05 | 南京矽力杰半导体技术有限公司 | Analog dimming control method, control circuit and LED drive circuit using the analog dimming control method and control circuit |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030122692A1 (en) * | 2002-01-02 | 2003-07-03 | Roeckner William J. | Method and apparatus for generating a pulse width modulated signal |
| CN1736018A (en) * | 2002-11-14 | 2006-02-15 | 菲尔风暴有限公司 | Power converter circuitry and method |
| CN101039118A (en) * | 2006-03-16 | 2007-09-19 | 凌阳科技股份有限公司 | Digital simulation conversion system and method |
| CN102820763A (en) * | 2012-08-15 | 2012-12-12 | 魏其萃 | High-precision pulse width division realizing method for pulse width control of power converter |
-
2014
- 2014-01-15 CN CN201410017698.8A patent/CN103731151B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030122692A1 (en) * | 2002-01-02 | 2003-07-03 | Roeckner William J. | Method and apparatus for generating a pulse width modulated signal |
| CN1736018A (en) * | 2002-11-14 | 2006-02-15 | 菲尔风暴有限公司 | Power converter circuitry and method |
| CN101039118A (en) * | 2006-03-16 | 2007-09-19 | 凌阳科技股份有限公司 | Digital simulation conversion system and method |
| CN102820763A (en) * | 2012-08-15 | 2012-12-12 | 魏其萃 | High-precision pulse width division realizing method for pulse width control of power converter |
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| CN105245203B (en) * | 2015-11-13 | 2018-09-04 | 绍兴光大芯业微电子有限公司 | High-precision low-speed clock duty ratio detecting system and method |
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