CN103731135B - A kind of discrete magnitude Acquisition Circuit with self-checking function - Google Patents

Abstract

The invention discloses a discrete quantity acquisition circuit with self-detection function, which mainly consists of a voltage dividing circuit unit A1, a comparison circuit unit A2, a reference voltage output circuit unit A3, a reference voltage control circuit unit A4 and a protection circuit unit A5 composition. The invention has the advantages of simple circuit structure, not only can effectively collect discrete signals, but also has a circuit self-check function, can quickly locate problems in the circuit, and has high testability and maintainability.

Description

A Discrete Quantity Acquisition Circuit with Self-detection Function

technical field

The invention relates to a discrete quantity acquisition circuit, in particular to a discrete quantity acquisition circuit with self-detection function.

Background technique

Discrete acquisition mainly realizes the acquisition of discrete signals such as low/open, high/open, and ground/high. In the existing discrete acquisition circuit, devices such as inverters, comparators, optocouplers, and discrete-to-digital chips are used to acquire discrete signals. Only the discrete acquisition function is realized, and the circuit has no self-test function. It cannot quickly locate the problems in the discrete quantity acquisition circuit, and the testability and maintainability are low.

Contents of the invention

The object of the present invention is to provide a discrete quantity acquisition circuit with a self-detection function aiming at the deficiencies in the prior art.

In order to achieve the above object, the technical solution of the present invention is achieved as follows: a discrete quantity acquisition circuit with self-detection function, comprising,

A reference voltage output circuit unit, which is composed of a reference voltage chip U1, a third resistor R3, a fourth resistor R4, a seventh resistor R7, a first MOS transistor Q1, and a fourth MOS transistor Q4. The first terminal of the seven resistor R7 is connected to the first power supply VCC1, the second terminal of the seventh resistor R7 is respectively connected to the cathode terminal of the reference voltage chip U1 and the drain of the fourth MOS transistor Q4, and the source of the fourth MOS transistor Q4 is connected to the The first end of the fourth resistor R4, the second end of the fourth resistor R4 are respectively connected to the first end of the third resistor R3 and the reference end of the reference voltage chip U1, the second end of the third resistor R3 is connected to the first MOS transistor The drain of Q1, the source of the first MOS transistor Q1 is grounded;

A reference voltage control circuit unit, which is composed of a first resistor R1, a sixth resistor R6, a second MOS transistor Q2 and a third MOS transistor Q3, the first terminal of the first resistor R1 is connected to the first power supply VCC1, The second end of the first resistor R1 is respectively connected to the drain of the second MOS transistor Q2 and the gate of the first MOS transistor Q1, the source of the second MOS transistor Q2 is grounded, and the gate of the second MOS transistor Q2 is connected directly or through a The second resistor R2 is connected to the first I/O terminal of the processor CPU, the first terminal of the sixth resistor R6 is connected to the first power supply VCC1, and the second terminal of the sixth resistor R6 is respectively connected to the drain of the third MOS transistor Q3 and the first terminal of the sixth resistor R6. The gates of four MOS transistors Q4, the source of the third MOS transistor Q3 are grounded, and the gates of the third MOS transistor Q3 are connected directly or through a fifth resistor R5 to the second I/O end of the processor CPU;

A comparison circuit unit, which is composed of a comparator U2A and an eighth resistor R8, the first input terminal of the comparator U2A is connected to the drain of the fourth MOS transistor Q4, and the output terminal of the comparator is respectively connected to the eighth resistor R8. One end and the third I/O end of the processor CPU, the second end of the eighth resistor R8 is connected to the second power supply VCC2;

A voltage divider circuit unit, which is composed of a ninth resistor R9, a tenth resistor R10 and an eleventh resistor R11, the first end of the ninth resistor R9 is connected to the first power supply VCC1, the first end of the tenth resistor R10 Connect to a discrete input signal terminal DISC_IN, the first end of the eleventh resistor R11 is grounded, the second end of the ninth resistor R9, the second end of the tenth resistor R10, and the second end of the eleventh resistor R11 are all connected to the comparator U2A second input, and,

A protection circuit unit, which is composed of a first voltage regulator tube D1 and a first capacitor C1, the first voltage regulator tube D1 and the first capacitor C1 are connected in parallel, one end is connected to the second input end of the comparator, and the other end is grounded .

Furthermore, the comparator U2A uses LM139, the reference voltage chip U1 uses TL431, the first to fourth MOS tubes Q1~Q4 all use 2N7002, the first, second, fifth, sixth and eighth resistors R1, R2, R5, R6, R8 The resistance value of the fourth resistor R4 is 2kΩ, the third resistor R3 is 1.5kΩ, the seventh resistor R7 is 1k, and the ninth to eleventh resistors R9, R10, R11 are all 39kΩ , the first power supply VCC1 is +15VDC, the second power supply VCC2 is +3.3VDC, the first voltage regulator tube D1 is selected from BZV55-C15, and the capacity of the first capacitor C1 is 50V100nf.

Compared with the prior art, the present invention has the following advantages: the circuit structure is simple, not only can effectively collect discrete signals, but also has a circuit self-inspection function, which can quickly locate problems in the circuit, has high testability and maintainability, and is convenient and reliable .

Description of drawings

Fig. 1 is a schematic diagram of the circuit structure of the present invention.

Detailed ways

The present invention will be described in detail below in conjunction with the accompanying drawings and embodiments.

Please refer to Figure 1. What is shown in the figure is a discrete quantity acquisition circuit with self-detection function, which is mainly controlled by a voltage divider circuit unit A1, a comparison circuit unit A2, a reference voltage output circuit unit A3, and a reference voltage The circuit unit A4 is composed of a protection circuit unit A5.

The reference voltage output circuit unit A3 is composed of a reference voltage chip U1, a third resistor R3, a fourth resistor R4, a seventh resistor R7, a first MOS transistor Q1 and a fourth MOS transistor Q4. The first terminal of the resistor R7 is connected to the first power supply VCC1, the second terminal of the seventh resistor R7 is respectively connected to the cathode terminal of the reference voltage chip U1 and the drain of the fourth MOS transistor Q4, and the source of the fourth MOS transistor Q4 is connected to the fourth MOS transistor Q4. The first end of four resistors R4, the second end of the fourth resistor R4 are respectively connected to the first end of the third resistor R3 and the reference end of the reference voltage chip U1, the second end of the third resistor R3 is connected to the first MOS transistor Q1 The drain and the source of the first MOS transistor Q1 are grounded.

The reference voltage control circuit unit A4 is composed of a first resistor R1, a sixth resistor R6, a second MOS transistor Q2 and a third MOS transistor Q3, the first terminal of the first resistor R1 is connected to the first power supply VCC1, the The second end of the first resistor R1 is respectively connected to the drain of the second MOS transistor Q2 and the gate of the first MOS transistor Q1, the source of the second MOS transistor Q2 is grounded, and the gate of the second MOS transistor Q2 passes through a second resistor R2 is connected to the first I/O end of the processor CPU, the first end of the sixth resistor R6 is connected to the first power supply VCC1, and the second end of the sixth resistor R6 is respectively connected to the drain of the third MOS transistor Q3 and the fourth MOS transistor The gate of Q4, the source of the third MOS transistor Q3 is grounded, and the gate of the third MOS transistor Q3 is connected to the second I/O terminal of the processor CPU through a fifth resistor R5.

The comparison circuit unit A2 is composed of a comparator U2A and an eighth resistor R8, the positive input terminal of the comparator U2A is connected to the drain of the fourth MOS transistor Q4, and the output terminal of the comparator is respectively connected to the first terminal of the eighth resistor R8 and the third I/O end of the processor CPU, the second end of the eighth resistor R8 is connected to the second power supply VCC2.

The voltage dividing circuit unit A1 is composed of a ninth resistor R9, a tenth resistor R10 and an eleventh resistor R11, the first terminal of the ninth resistor R9 is connected to the first power supply VCC1, and the first terminal of the tenth resistor R10 is connected to A discrete input signal terminal DISC_IN, the first terminal of the eleventh resistor R11 is grounded, the second terminal of the ninth resistor R9, the second terminal of the tenth resistor R10, and the second terminal of the eleventh resistor R11 are all connected to the comparator U2A the second input.

The protection circuit unit A5 is composed of a first voltage regulator transistor D1 and a first capacitor C1, one end of the first voltage regulator transistor D1 and the first capacitor C1 are connected in parallel to the negative input end of the comparator U2A, and the other end is grounded.

Among them, the comparator U2A uses LM139, the reference voltage chip U1 uses TL431 (the reference voltage is 2.5V), the first to fourth MOS tubes Q1~Q4 all use 2N7002, the first, second, fifth, sixth and eighth resistors R1, R2 , R5, R6, R8 are all selected 10kΩ, the fourth resistor R4 is 2kΩ, the third resistor R3 is 1.5kΩ, the seventh resistor R7 is 1k, the ninth to eleventh resistors R9, R10, The resistance value of R11 is 39kΩ, the first power supply VCC1 is +15VDC, the second power supply VCC2 is +3.3VDC, the first regulator tube D1 is BZV55-C15, the first capacitor C1 is 50V100nf, and the above electronic components are commercially available sell products.

When the local/open signal is open, the voltage of the negative input terminal (pin 4) of the comparator U2A is +7.5V. When the first and second I/O terminals of the processor CPU are at low level, the second and third MOS tubes Q2, Q3 is turned off, the first and fourth MOS transistors Q1 and Q4 are turned on, the reference voltage Vref of the positive input terminal (pin 5) of the comparator U2A is (2/1.5+1)×2.5=5.83V, at this time the positive input of the comparator U2A The terminal voltage is lower than the negative input terminal voltage, its output is low level, and the third I/O terminal of the processor CPU is low level.

When the discrete signal input voltage V1 is less than 2.49V, the negative input terminal voltage (15+V1)/3 of the comparator U2A is less than 5.83V, at this time the output of the comparator U2A is open, after being pulled up to 3.3V by 10k, the third I/ The O terminal is high level, and the discrete data acquisition is completed.

When self-test is required, set the first I/O terminal to high level, the second MOS transistor Q2 is turned on, the first MOS transistor Q1 is turned off, the second I/O terminal is set to low level, and the third MOS transistor Q3 is turned off . The fourth MOS transistor Q4 is turned on, the output reference voltage Vref is 2.5V, the voltage at the positive input terminal of the comparator U2A is lower than the voltage at the negative input terminal, and the output is at low level, that is, the third I/O terminal is at low level. Then set the first and second I/O terminals to high level, the third MOS transistor Q3 is turned on, and the fourth MOS transistor Q4 is turned off; the first I/O terminal is set to low level, and the second MOS transistor Q2 is turned off , the first MOS transistor Q1 is turned on, the reference source output reference voltage Vref is 15V, the voltage of the positive input terminal of the comparator is greater than the voltage of the negative input terminal, and the third I/O terminal is at high level, realizing the self-test function of the discrete quantity acquisition circuit .

In the circuit, the first regulator tube D1 prevents the influence of the negative peak voltage of the signal terminal on the comparator U2A, and the first capacitor C1 can filter out clutter and peak interference.

This discrete signal acquisition circuit with self-testing function is also suitable for high/on discrete signal acquisition, just configure the resistance value in the voltage divider circuit and adjust the voltage of the reference voltage Vref to realize high/on or ground/ High signal acquisition circuit.

The above only expresses the embodiment of the present invention, and the description thereof is relatively specific and detailed, but it should not be construed as limiting the scope of the patent for the invention. It should be pointed out that those skilled in the art can make several modifications and improvements without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent for the present invention should be based on the appended claims.

Claims (3)

1. a kind of discrete magnitude Acquisition Circuit with self-checking function, which is characterized in that including,

One reference voltage output circuit unit, by a reference voltage chip U1, a 3rd resistor R3, one the 4th resistance R4, one 7th resistance R7, one first metal-oxide-semiconductor Q1 and one the 4th metal-oxide-semiconductor Q4 composition, the 7th resistance R7 first terminate the first power supply VCC1, 7th resistance R7 second end meets cathode terminal and the 4th metal-oxide-semiconductor Q4 drain electrode of reference voltage chip U1, the 4th MOS respectively Pipe Q4 source level connects the 4th resistance R4 first end, and the 4th resistance R4 second end connects 3rd resistor R3 first end and the base respectively The reference end of quasi- voltage chips U1,3rd resistor R3 second terminate the first metal-oxide-semiconductor Q1 drain electrode, the first metal-oxide-semiconductor Q1 source electrode Ground connection；

One reference voltage control circuit unit, by a first resistor R1, one the 6th resistance R6, one second metal-oxide-semiconductor Q2 and 1 Three metal-oxide-semiconductor Q3 composition, first resistor R1 first terminate the first power supply VCC1, first resistor R1 second end connect respectively this second Metal-oxide-semiconductor Q2 drain electrode and the first metal-oxide-semiconductor Q1 grid, the second metal-oxide-semiconductor Q2 source electrode ground connection, the second metal-oxide-semiconductor Q2 grid directly or Connect the first end I/O of processor CPU by a second resistance R2, the 6th resistance R6 first terminates the first power supply VCC1, this Six resistance R6 second ends connect third metal-oxide-semiconductor Q3 drain electrode and the 4th metal-oxide-semiconductor Q4 grid respectively, which is grounded, The third metal-oxide-semiconductor Q3 grid connects the 2nd end I/O of processor CPU directly or by one the 5th resistance R5；

One comparison circuit unit is made of a comparator U2A and one the 8th resistance R8, and comparator U2A first input end connects 4th metal-oxide-semiconductor Q4 drain electrode, the comparator output terminal connect the 8th resistance R8 first end and the 3rd I/O of processor CPU respectively End, the 8th resistance R8 second terminate second source VCC2；And

One bleeder circuit unit is made of, the 9th one the 9th resistance R9,1 the tenth resistance R10 and an eleventh resistor R11 The first power supply of termination of resistance R9 first VCC1, the tenth resistance R10 first terminate a discrete magnitude input signal end DISC_IN, should Eleventh resistor R11 first end ground connection, the 9th resistance R9 second end, the tenth resistance R10 second end, eleventh resistor R11 the Two ends all connect the comparator the second input terminal of U2A.

2. a kind of discrete magnitude Acquisition Circuit with self-checking function according to claim 1, which is characterized in that further include One protection circuit unit, is made of, the first voltage-stabiliser tube D1 and first capacitor one first voltage-stabiliser tube D1 and a first capacitor C1 One end is connect with second input terminal of comparator after C1 is in parallel, other end ground connection.

3. a kind of discrete magnitude Acquisition Circuit with self-checking function according to claim 1 or 2, which is characterized in that should Comparator U2A selects LM139, reference voltage chip U1 that TL431, first to fourth metal-oxide-semiconductor Q1~Q4 is selected to select 2N7002, the One, two, five, six, eight resistance R1, R2, R5, R6, R8 resistance values select 10k Ω, and the 4th resistance R4 resistance value selects 2k Ω, third electricity It hinders R3 resistance value and selects 1.5k Ω, the 7th resistance R7 resistance value selects 1k Ω, and the 9th to 11 resistance R9, R10, R11 resistance values are selected 39k Ω, the first power supply VCC1 are+15VDC, and second source VCC2 is+3.3VDC.