CN103731135A - Discrete magnitude collecting circuit with self test function - Google Patents
Discrete magnitude collecting circuit with self test function Download PDFInfo
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- CN103731135A CN103731135A CN201310598259.6A CN201310598259A CN103731135A CN 103731135 A CN103731135 A CN 103731135A CN 201310598259 A CN201310598259 A CN 201310598259A CN 103731135 A CN103731135 A CN 103731135A
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Abstract
The invention discloses a discrete magnitude collecting circuit with a self test function. The discrete magnitude collecting circuit with the self test function is mainly composed of a bleeder circuit unit A1, a comparison circuit unit A2, a reference voltage output circuit unit A3, a reference voltage control circuit unit A4 and a protective circuit unit A5. The discrete magnitude collecting circuit with the self test function has the advantages that the discrete magnitude collecting circuit is simple in structure and capable of effectively collecting discrete signals, has the circuit self test function, is capable of quickly locating problems occurring in the circuit and has high testability and maintainability.
Description
Technical field
The present invention relates to a kind of discrete magnitude Acquisition Circuit, especially relate to a kind of discrete magnitude Acquisition Circuit with self-checking function.
Background technology
That discrete magnitude collection mainly realizes is low/open, high/to open ,/collection of high discrete signal.In existing employing discrete magnitude Acquisition Circuit, adopt inverter, comparator, optocoupler, discrete magnitude to turn the devices such as digital quantity chip and gather discrete signal, only realize discrete magnitude acquisition function, its circuit is without self-checking function.Can not be to the fast location that goes wrong in discrete magnitude Acquisition Circuit, testability, maintainability are lower.
Summary of the invention
Object of the present invention is exactly for deficiency of the prior art, and a kind of discrete magnitude Acquisition Circuit with self-checking function is provided.
To achieve these goals, technical scheme of the present invention is achieved in that a kind of discrete magnitude Acquisition Circuit with self-checking function, comprise,
One reference voltage output circuit unit, it is by a reference voltage chip U1, one the 3rd resistance R 3, one the 4th resistance R 4, one the 7th resistance R 7, one first metal-oxide-semiconductor Q1 and one the 4th metal-oxide-semiconductor Q4 composition, the 7th resistance R 7 first termination the first power supply VCC1, the 7th resistance R 7 second ends connect respectively cathode terminal and the 4th metal-oxide-semiconductor Q4 drain electrode of this reference voltage chip U1, the 4th metal-oxide-semiconductor Q4 source class connects the 4th resistance R 4 first ends, the 4th resistance R 4 second ends connect respectively the reference edge of the 3rd resistance R 3 first ends and this reference voltage chip U1, the 3rd this first metal-oxide-semiconductor of resistance R 3 second terminations Q1 drain electrode, this first metal-oxide-semiconductor Q1 source ground,
One reference voltage control circuit unit, it is by one first resistance R 1, one the 6th resistance R 6, one second metal-oxide-semiconductor Q2 and one the 3rd metal-oxide-semiconductor Q3 composition, this first resistance R 1 first termination the first power supply VCC1, this the first resistance R 1 second end connects respectively this second metal-oxide-semiconductor Q2 drain electrode and this first metal-oxide-semiconductor Q1 grid, this second metal-oxide-semiconductor Q2 source ground, this second metal-oxide-semiconductor Q2 grid directly or by one second resistance R 2, connect an I/O end of processor CPU, the 6th resistance R 6 first termination the first power supply VCC1, the 6th resistance R 6 second ends connect respectively the 3rd metal-oxide-semiconductor Q3 drain electrode and the 4th metal-oxide-semiconductor Q4 grid, the 3rd metal-oxide-semiconductor Q3 source ground, the 3rd metal-oxide-semiconductor Q3 grid directly or by one the 5th resistance R 5, connect the 2nd I/O end of processor CPU,
One comparison circuit unit, it is comprised of a comparator U2A and one the 8th resistance R 8, this comparator U2A first input end connects the 4th metal-oxide-semiconductor Q4 drain electrode, this comparator output terminal meets respectively the 3rd I/O end of the 8th resistance R 8 first ends and processor CPU, the 8th resistance R 8 second termination second source VCC2;
One bleeder circuit unit, it is comprised of one the 9th resistance R 9,1 the tenth resistance R 10 and 1 the 11 resistance R 11, the 9th resistance R 9 first termination the first power supply VCC1, the tenth resistance R 10 first termination one discrete magnitude input signal end DISC_IN, the 11 resistance R 11 first end ground connection, the 9th, ten, 11 resistance R 9, R10, R11 the second end all connect this comparator U2A the second input; And,
One protective circuit unit, it is comprised of one first voltage-stabiliser tube D1 and one first capacitor C 1, and after this first voltage-stabiliser tube D1 is in parallel with the first capacitor C 1, one end is connected with this comparator second input, other end ground connection.
Further, this selects LM139 compared with device U2A, reference voltage chip U1 selects TL431, first to fourth metal-oxide-semiconductor Q1～Q4 all selects 2N7002, first, two, five, six, eight resistance R 1, R2, R5, R6, R8 resistance is all selected 10k Ω, the 4th resistance R 4 resistances are selected 2k Ω, the 3rd resistance R 3 resistances are selected 1.5k Ω, the 7th resistance R 7 resistances are selected 1k, the 9th to 11 resistance R 9, R10, R11 resistance is all selected 39k Ω, the first power supply VCC1 is+15VDC, second source VCC2 is+3.3VDC, the first voltage-stabiliser tube D1 selects BZV55-C15, the first capacitor C 1 capacitance is 50V100nf.
Compared with prior art, advantage of the present invention: circuit structure is simple, can not only gather discrete signal effectively, also has circuit self-checking function, the problem occurring in positioning circuit fast, and testability, maintainability are higher, convenient and reliable.
Accompanying drawing explanation
Fig. 1 is electrical block diagram of the present invention.
Embodiment
Below in conjunction with drawings and Examples, the present invention is elaborated.
Refer to Fig. 1; shown in figure is a kind of discrete magnitude Acquisition Circuit with self-checking function, mainly a bleeder circuit unit A1, a comparison circuit unit A2, a reference voltage output circuit unit A3, a reference voltage control circuit unit A4 and a protective circuit unit A5, consists of.
This reference voltage output circuit unit A3 is by a reference voltage chip U1, one the 3rd resistance R 3, one the 4th resistance R 4, one the 7th resistance R 7, one first metal-oxide-semiconductor Q1 and one the 4th metal-oxide-semiconductor Q4 composition, the 7th resistance R 7 first termination the first power supply VCC1, the 7th resistance R 7 second ends connect respectively cathode terminal and the 4th metal-oxide-semiconductor Q4 drain electrode of this reference voltage chip U1, the 4th metal-oxide-semiconductor Q4 source class connects the 4th resistance R 4 first ends, the 4th resistance R 4 second ends connect respectively the reference edge of the 3rd resistance R 3 first ends and this reference voltage chip U1, the 3rd this first metal-oxide-semiconductor of resistance R 3 second terminations Q1 drain electrode, this first metal-oxide-semiconductor Q1 source ground.
This reference voltage control circuit unit A4 is by one first resistance R 1, one the 6th resistance R 6, one second metal-oxide-semiconductor Q2 and one the 3rd metal-oxide-semiconductor Q3 composition, this first resistance R 1 first termination the first power supply VCC1, this the first resistance R 1 second end connects respectively this second metal-oxide-semiconductor Q2 drain electrode and this first metal-oxide-semiconductor Q1 grid, this second metal-oxide-semiconductor Q2 source ground, this second metal-oxide-semiconductor Q2 grid connects an I/O end of processor CPU by one second resistance R 2, the 6th resistance R 6 first termination the first power supply VCC1, the 6th resistance R 6 second ends connect respectively the 3rd metal-oxide-semiconductor Q3 drain electrode and the 4th metal-oxide-semiconductor Q4 grid, the 3rd metal-oxide-semiconductor Q3 source ground, the 3rd metal-oxide-semiconductor Q3 grid connects the 2nd I/O end of processor CPU by one the 5th resistance R 5.
This comparison circuit unit A2 is comprised of a comparator U2A and one the 8th resistance R 8, the 4th metal-oxide-semiconductor Q4 drain electrode of this comparator U2A positive input termination, this comparator output terminal meets respectively the 3rd I/O end of the 8th resistance R 8 first ends and processor CPU, the 8th resistance R 8 second termination second source VCC2.
This bleeder circuit unit A1 is comprised of one the 9th resistance R 9,1 the tenth resistance R 10 and 1 the 11 resistance R 11, the 9th resistance R 9 first termination the first power supply VCC1, the tenth resistance R 10 first termination one discrete magnitude input signal end DISC_IN, the 11 resistance R 11 first end ground connection, the 9th, ten, 11 resistance R 9, R10, R11 the second end all connect this comparator U2A negative input end.
This protective circuit unit A5 is comprised of one first voltage-stabiliser tube D1 and one first capacitor C 1, and after this first voltage-stabiliser tube D1 is in parallel with the first capacitor C 1, one end is connected with this comparator U2A negative input end, other end ground connection.
Wherein, this selects LM139 compared with device U2A, it is 2.5V that reference voltage chip U1 selects TL431(reference voltage), first to fourth metal-oxide-semiconductor Q1～Q4 all selects 2N7002, first, two, five, six, eight resistance R 1, R2, R5, R6, R8 resistance is all selected 10k Ω, the 4th resistance R 4 resistances are selected 2k Ω, the 3rd resistance R 3 resistances are selected 1.5k Ω, the 7th resistance R 7 resistances are selected 1k, the 9th to 11 resistance R 9, R10, R11 resistance is all selected 39k Ω, the first power supply VCC1 is+15VDC, second source VCC2 is+3.3VDC, the first voltage-stabiliser tube D1 selects BZV55-C15, the first capacitor C 1 capacitance is 50V100nf, above-mentioned electronic unit is all commercially available prod.
Local/while opening signal for open circuit, comparator U2A negative input end (4 pin) voltage is+7.5V, when first and second I/O end of processor CPU is low level, second and third metal-oxide-semiconductor Q2, Q3 close, first, fourth metal-oxide-semiconductor Q1, Q4 conducting, the reference voltage V ref of comparator U2A positive input terminal (5 pin) is (2/1.5+1) × 2.5=5.83V, now comparator U2A positive input terminal voltage is less than negative input end voltage, it is output as low level, and the 3rd I/O end of processor CPU is low level.
When discrete signal input voltage V1 is less than 2.49V, comparator U2A negative input end voltage (15+V1)/3 is less than 5.83V, and now comparator U2A is output as open circuit, and through drawing on 10k after 3.3V, the 3rd I/O end, for high level, completes discrete magnitude data acquisition.
While needing self check, the one I/O end is set high to level, the second metal-oxide-semiconductor Q2 conducting, the first metal-oxide-semiconductor Q1 close, the 2nd I/O end is set low to level, the 3rd metal-oxide-semiconductor Q3 closes, the 4th metal-oxide-semiconductor Q4 conducting, and output reference voltage Vref is 2.5V, and comparator U2A positive input terminal voltage is less than negative input end voltage, be output as low level, the 3rd I/O end is low level.Then first and second I/O end is set to high level, the 3rd metal-oxide-semiconductor Q3 conducting, the 4th metal-oxide-semiconductor Q4 closes; The one I/O end is set to low level, and the second metal-oxide-semiconductor Q2 closes, the first metal-oxide-semiconductor Q1 conducting, a reference source output reference voltage Vref is 15V, comparator positive input terminal voltage is greater than negative input end voltage, and the 3rd I/O end is high level, realizes the self-checking function of discrete magnitude Acquisition Circuit.
In circuit, the first voltage-stabiliser tube D1 prevents that signal end undershoot voltage-contrast is compared with the impact of device U2A, and the first capacitor C 1 can filtering clutter and spike interference.
This discrete signal Acquisition Circuit with self-checking function is equally applicable to height/open discrete signal collection, only needs resistance value in configuration bleeder circuit, regulates the voltage of reference voltage V ref to realize to have the height of self-checking function/open or ground/high signal acquisition circuit.
Below only expressed embodiments of the present invention, it describes comparatively concrete and detailed, but can not therefore be construed as limiting the scope of the patent.It should be pointed out that for the person of ordinary skill of the art, without departing from the inventive concept of the premise, can also make some distortion and improvement, these all belong to protection scope of the present invention.Therefore, the protection range of patent of the present invention should be as the criterion with claims.
Claims (4)
1. a discrete magnitude Acquisition Circuit with self-checking function, is characterized in that, comprises,
One reference voltage output circuit unit, it is by a reference voltage chip U1, one the 3rd resistance R 3, one the 4th resistance R 4, one the 7th resistance R 7, one first metal-oxide-semiconductor Q1 and one the 4th metal-oxide-semiconductor Q4 composition, the 7th resistance R 7 first termination the first power supply VCC1, the 7th resistance R 7 second ends connect respectively cathode terminal and the 4th metal-oxide-semiconductor Q4 drain electrode of this reference voltage chip U1, the 4th metal-oxide-semiconductor Q4 source class connects the 4th resistance R 4 first ends, the 4th resistance R 4 second ends connect respectively the reference edge of the 3rd resistance R 3 first ends and this reference voltage chip U1, the 3rd this first metal-oxide-semiconductor of resistance R 3 second terminations Q1 drain electrode, this first metal-oxide-semiconductor Q1 source ground,
One reference voltage control circuit unit, it is by one first resistance R 1, one the 6th resistance R 6, one second metal-oxide-semiconductor Q2 and one the 3rd metal-oxide-semiconductor Q3 composition, this first resistance R 1 first termination the first power supply VCC1, this the first resistance R 1 second end connects respectively this second metal-oxide-semiconductor Q2 drain electrode and this first metal-oxide-semiconductor Q1 grid, this second metal-oxide-semiconductor Q2 source ground, this second metal-oxide-semiconductor Q2 grid directly or by one second resistance R 2, connect an I/O end of processor CPU, the 6th resistance R 6 first termination the first power supply VCC1, the 6th resistance R 6 second ends connect respectively the 3rd metal-oxide-semiconductor Q3 drain electrode and the 4th metal-oxide-semiconductor Q4 grid, the 3rd metal-oxide-semiconductor Q3 source ground, the 3rd metal-oxide-semiconductor Q3 grid directly or by one the 5th resistance R 5, connect the 2nd I/O end of processor CPU,
One comparison circuit unit, it is comprised of a comparator U2A and one the 8th resistance R 8, this comparator U2A first input end connects the 4th metal-oxide-semiconductor Q4 drain electrode, this comparator output terminal meets respectively the 3rd I/O end of the 8th resistance R 8 first ends and processor CPU, the 8th resistance R 8 second termination second source VCC2; And,
One bleeder circuit unit, it is comprised of one the 9th resistance R 9,1 the tenth resistance R 10 and 1 the 11 resistance R 11, the 9th resistance R 9 first termination the first power supply VCC1, the tenth resistance R 10 first termination one discrete magnitude input signal end DISC_IN, the 11 resistance R 11 first end ground connection, the 9th, ten, 11 resistance R 9, R10, R11 the second end all connect this comparator U2A the second input.
2. a kind of discrete magnitude Acquisition Circuit with self-checking function according to claim 1; it is characterized in that; also comprise a protective circuit unit; it is comprised of one first voltage-stabiliser tube D1 and one first capacitor C 1; after this first voltage-stabiliser tube D1 is in parallel with the first capacitor C 1, one end is connected with this comparator second input, other end ground connection.
3. a kind of discrete magnitude Acquisition Circuit with self-checking function according to claim 1 and 2, it is characterized in that, this selects LM139 compared with device U2A, reference voltage chip U1 selects TL431, first to fourth metal-oxide-semiconductor Q1～Q4 all selects 2N7002, first, two, five, six, eight resistance R 1, R2, R5, R6, R8 resistance is all selected 10k Ω, the 4th resistance R 4 resistances are selected 2k Ω, the 3rd resistance R 3 resistances are selected 1.5k Ω, the 7th resistance R 7 resistances are selected 1k, the 9th to 11 resistance R 9, R10, R11 resistance is all selected 39k Ω, the first power supply VCC1 is+15VDC, second source VCC2 is+3.3VDC.
4. a kind of discrete magnitude Acquisition Circuit with self-checking function according to claim 2, it is characterized in that, this selects LM139 compared with device U2A, reference voltage chip U1 selects TL431, first to fourth metal-oxide-semiconductor Q1～Q4 all selects 2N7002, first, two, five, six, eight resistance R 1, R2, R5, R6, R8 resistance is all selected 10k Ω, the 4th resistance R 4 resistances are selected 2k Ω, the 3rd resistance R 3 resistances are selected 1.5k Ω, the 7th resistance R 7 resistances are selected 1k, the 9th to 11 resistance R 9, R10, R11 resistance is all selected 39k Ω, the first power supply VCC1 is+15VDC, second source VCC2 is+3.3VDC, the first voltage-stabiliser tube D1 selects BZV55-C15, the first capacitor C 1 capacitance is 50V100nf.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110542848A (en) * | 2019-09-20 | 2019-12-06 | 天津津航计算技术研究所 | Discrete magnitude acquisition power-on BIT self-detection circuit based on micro relay |
| CN112098762A (en) * | 2020-09-22 | 2020-12-18 | 陕西千山航空电子有限责任公司 | Discrete switching value acquisition and detection circuit |
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| CN110542848B (en) * | 2019-09-20 | 2021-07-20 | 天津津航计算技术研究所 | Discrete magnitude acquisition power-on BIT self-detection circuit based on micro relay |
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