CN103730344B - The method forming the monox lateral wall of metallic silicon tangsten silicide grid - Google Patents
The method forming the monox lateral wall of metallic silicon tangsten silicide grid Download PDFInfo
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- CN103730344B CN103730344B CN201210388548.9A CN201210388548A CN103730344B CN 103730344 B CN103730344 B CN 103730344B CN 201210388548 A CN201210388548 A CN 201210388548A CN 103730344 B CN103730344 B CN 103730344B
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- 238000000034 method Methods 0.000 title claims abstract description 88
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 34
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 32
- 239000010703 silicon Substances 0.000 title claims abstract description 32
- 229910021332 silicide Inorganic materials 0.000 title claims abstract description 13
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 title claims abstract description 13
- 229910052751 metal Inorganic materials 0.000 claims abstract description 37
- 239000002184 metal Substances 0.000 claims abstract description 37
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims abstract description 36
- 229910052721 tungsten Inorganic materials 0.000 claims abstract description 35
- 239000010937 tungsten Substances 0.000 claims abstract description 35
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 16
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 14
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 13
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 13
- 239000000758 substrate Substances 0.000 claims abstract description 9
- 239000008367 deionised water Substances 0.000 claims abstract description 7
- 229910021641 deionized water Inorganic materials 0.000 claims abstract description 7
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims abstract description 7
- TXEYQDLBPFQVAA-UHFFFAOYSA-N tetrafluoromethane Chemical compound FC(F)(F)F TXEYQDLBPFQVAA-UHFFFAOYSA-N 0.000 claims abstract description 5
- 238000001020 plasma etching Methods 0.000 claims description 18
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 14
- 239000007789 gas Substances 0.000 claims description 13
- 238000007254 oxidation reaction Methods 0.000 claims description 12
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 11
- 239000001301 oxygen Substances 0.000 claims description 11
- 229910052760 oxygen Inorganic materials 0.000 claims description 11
- 238000000137 annealing Methods 0.000 claims description 9
- 238000005530 etching Methods 0.000 claims description 9
- 230000003647 oxidation Effects 0.000 claims description 9
- XPDWGBQVDMORPB-UHFFFAOYSA-N Fluoroform Chemical compound FC(F)F XPDWGBQVDMORPB-UHFFFAOYSA-N 0.000 claims description 8
- 230000015572 biosynthetic process Effects 0.000 claims description 8
- 239000011241 protective layer Substances 0.000 claims description 8
- 229910052757 nitrogen Inorganic materials 0.000 claims description 7
- 238000007788 roughening Methods 0.000 claims description 5
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 claims description 5
- 229910021342 tungsten silicide Inorganic materials 0.000 claims description 5
- 238000006243 chemical reaction Methods 0.000 claims description 4
- 230000001590 oxidative effect Effects 0.000 claims description 2
- 230000015556 catabolic process Effects 0.000 abstract description 5
- 230000007547 defect Effects 0.000 abstract description 4
- 239000013078 crystal Substances 0.000 abstract description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 2
- 238000004380 ashing Methods 0.000 abstract description 2
- 239000003292 glue Substances 0.000 abstract description 2
- 229910052814 silicon oxide Inorganic materials 0.000 abstract description 2
- 239000010410 layer Substances 0.000 description 13
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 150000002500 ions Chemical class 0.000 description 2
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 1
- 240000007594 Oryza sativa Species 0.000 description 1
- 235000007164 Oryza sativa Nutrition 0.000 description 1
- 229910003978 SiClx Inorganic materials 0.000 description 1
- 235000013339 cereals Nutrition 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000001953 recrystallisation Methods 0.000 description 1
- 235000009566 rice Nutrition 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28247—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon passivation or protection of the electrode, e.g. using re-oxidation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28123—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
- H01L21/28132—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects conducting part of electrode is difined by a sidewall spacer or a similar technique, e.g. oxidation under mask, plating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Drying Of Semiconductors (AREA)
Abstract
A kind of method that the invention discloses monox lateral wall forming metallic silicon tangsten silicide grid, including step: form the grid structure being made up of grid oxic horizon, grid polycrystalline silicon and metal silication tungsten, grid structure top is photo-etched glue protection；The RIE technique of carbon tetrafluoride carries out ashing process to photoresist to utilize process gas to include；Silicon substrate after RIE technique is carried out deionized water rinsing；Carry out RTO technique, form monox lateral wall at gate structure sidewall.The inventive method, it can be avoided that make the crystal grain of metal silication tungsten grow up and form ball bumps during growing silicon oxide side wall, is also avoided that owing to avoiding the point discharge caused by ball bumps, improves the breakdown voltage of device；The present invention can also reduce process costs.The monox lateral wall that the inventive method is formed can reduce the stress between silicon nitride layer and gate polycrystalline sidewall silicon and can repair the lattice defect of gate polycrystalline sidewall silicon.
Description
Technical field
The present invention relates to a kind of semiconductor integrated circuit method of manufacturing technology, particularly relate to a kind of formation metal silication tungsten
The method of the monox lateral wall of grid.
Background technology
In the MOS technique of metallic silicon tangsten silicide grid (Tungsten Polycide), after gate patterns has etched,
Need to form a layer thickness in the sidewall surfaces of grid structure to be about
Monox lateral wall protect
Layer.As it is shown in figure 1, be the structural representation of the monox lateral wall of the metallic silicon tangsten silicide grid that existing method is formed；Existing
Having method generally to use the method sidewall growth monox lateral wall at grid structure of boiler tube, wherein grid structure includes depending on
Secondary it is formed at the grid oxic horizon 102 on silicon substrate 101 surface, grid polycrystalline silicon 103 and metal silication tungsten 104,
The surface of metal silication tungsten 104 is also formed with silicon nitride protective layer 105, by high-temperature oxydation in boiler tube, described
The sidewall surfaces of grid structure forms monox lateral wall 106.The monox lateral wall 106 that existing method is formed can reduce
The follow-up silicon nitride layer grown for self-registered technology (Self-Alignment Contact) and grid polycrystalline silicon 103
Stress between sidewall, can play the effect of cushion；Monox lateral wall 106 is the high-temperature oxydation shape by boiler tube
Becoming, so also being able to play high temperature repair, the lattice that during minimizing pattern etching, polysilicon sidewall produces lacks
Fall into；Meanwhile, monox lateral wall 106 can also effectively act as insulation effect, it is to avoid point discharge, decreases electric charge
Assembling in the silicon nitride layer, so sidewall breakdown voltage for raising metal-oxide-semiconductor plays a good role.
Though the monox lateral wall 106 of boiler tube method growth, film quality compact structure, furnace tube operation temperature is higher,
Easily cause metal silication tungsten to aoxidize recrystallization, cause crystallite dimension (Grain Size) to grow up and form spherical (pilling)
Protruding (pilling) 107, ball bumps 107 has large effect to the pattern of grid, easily makes when situation is serious
Become point discharge to puncture grid curb wall, reduce the side wall breakdown voltage of metal-oxide-semiconductor.
Summary of the invention
The technical problem to be solved is to provide the side of a kind of monox lateral wall forming metallic silicon tangsten silicide grid
Method, is avoided that the sidewall at metal silication tungsten forms ball bumps and avoids the point discharge caused by ball bumps,
Improve the breakdown voltage of device, it is possible to reducing the process costs forming monox lateral wall, the monox lateral wall of formation can be very
The stress reduced between silicon nitride layer and gate polycrystalline sidewall silicon got well and the lattice that gate polycrystalline sidewall silicon can be repaired
Defect.
For solving above-mentioned technical problem, the method bag of the monox lateral wall forming metallic silicon tangsten silicide grid that the present invention provides
Include following steps:
Step one, sequentially form grid oxic horizon, grid polycrystalline silicon and metal silication tungsten in surface of silicon；Use light
Carving technology defines grid structure graphics field with photoresist, uses etching technics successively to described with photoresist for mask
Metal silication tungsten, described grid polycrystalline silicon and described grid oxic horizon perform etching formation grid structure figure.
Step 2, carry out reactive ion etching process, utilize reactive ion etching process that described photoresist is ashed
Process and described photoresist is removed；The process gas of reactive ion etching process includes carbon tetrafluoride (CF4), instead
Bombard the sidewall surfaces of described metal silication tungsten by the fluorion produced and utilize fluorine during answering ion etch process
Ion and the chemical reaction of tungsten silicide make the sidewall surfaces of described metal silication tungsten roughening, thus improve described metallic silicon
Change the oxidized speed of sidewall surfaces of tungsten.
Step 3, the described silicon substrate after reactive ion etching process is carried out deionized water rinsing.
Step 4, the described silicon substrate after deionized water rinsing is carried out rapid thermal oxidation annealing；Described Rapid Thermal
It is 100 angstroms～150 that oxidizing annealing makes described metal silication tungsten, the sidewall surfaces of described grid polycrystalline silicon form a thickness
Angstrom monox lateral wall.
Further improving is that in step one, the surface at described metal silication tungsten is also formed with silicon nitride protective layer, uses
In described metal silication tungsten is protected.
Further improving is also to include fluoroform in the process gas of reactive ion etching process described in step 2
(CHF3) and oxygen (O2)。
Further improve and be, the technological temperature of the described rapid thermal oxidation annealing in step 4 is 975 DEG C, technique time
Between be 20 seconds～30 seconds, process gas is made up of oxygen and nitrogen, and nitrogen flow is 20 centimetres3/ minute～50 lis
Rice3/ minute, the content of oxygen is the 1%～2% of the total amount of process gas.
The inventive method is by being passed through CF when removing the photoresist above grid structure by RIE technique4, oxygen and
CHF3, it is possible to pass through CF4And CHF3The fluorion that gas ionization the produces side to grid structure particularly metal silication tungsten
Wall surface carries out bombarding and making the sidewall surfaces of metal silication tungsten roughening；The sidewall surfaces of metal silication tungsten roughening it
After, it is possible to increase the oxidized speed of sidewall surfaces of described metal silication tungsten, make the sidewall surfaces of described metal silication tungsten
It is easier to oxidized, it is not necessary to use high and time length the furnace process of temperature to form monox lateral wall, and only need to adopt
Just can form monox lateral wall in the sidewall surfaces of grid structure by RTO technique, use the time of RTO technique to be smaller than
The high temperature heating time of furnace process, institute is in the process of the present invention it can be avoided that make metal due to long high-temperature oxydation
The crystal grain of tungsten silicide is grown up and is formed ball bumps, is also avoided that owing to avoiding the point discharge caused by ball bumps,
Improve the breakdown voltage of device.The present invention uses RTO technique to form monox lateral wall simultaneously, and the cost of this technique is lower.
The monox lateral wall that the inventive method is formed can also well reduce answering between silicon nitride layer and gate polycrystalline sidewall silicon
Power and the lattice defect of gate polycrystalline sidewall silicon can be repaired.
Accompanying drawing explanation
The present invention is further detailed explanation with detailed description of the invention below in conjunction with the accompanying drawings:
Fig. 1 is the structural representation of the oxide layer sidewall of the metallic silicon tangsten silicide grid that existing method is formed；
Fig. 2 is embodiment of the present invention method flow diagram；
Fig. 3 A-Fig. 3 C is the device architecture schematic diagram in each step of embodiment of the present invention method.
Detailed description of the invention
As in figure 2 it is shown, be embodiment of the present invention method flow diagram；As shown in Fig. 3 A to Fig. 3 C, it is that the present invention implements
Device architecture schematic diagram in each step of example method.The embodiment of the present invention forms the monox lateral wall of metallic silicon tangsten silicide grid
Method comprise the steps:
Step one, as shown in Figure 3A, sequentially form on silicon substrate 1 surface grid oxic horizon 2, grid polycrystalline silicon 3,
Metal silication tungsten 4, and silicon nitride protective layer 5 is formed on the surface of described metal silication tungsten 4；Use photoetching process
6 define grid structure graphics field with photoresist, use etching technics successively to described nitrogen with photoresist 6 for mask
SiClx protective layer 5, described metal silication tungsten 4, described grid polycrystalline silicon 3 and described grid oxic horizon 2 perform etching
And form the grid structure being made up of described grid oxic horizon 2, described grid polycrystalline silicon 3 and described metal silication tungsten 4
Figure, is that the described silicon nitride protective layer 5 of grid structure graphics field is photo-etched glue 6 and protects during etching.
Step 2, as shown in Figure 3 B, carries out reactive ion etching process, utilizes reactive ion etching process to described
Photoresist 6 carries out ashing process and is removed by described photoresist 6；The process gas of reactive ion etching process includes
Carbon tetrafluoride, fluoroform and oxygen, during reactive ion etching process, process gas knows from experience ionization and by producing
Fluorion bombard the sidewall surfaces of described metal silication tungsten 4 and to utilize the chemical reaction of fluorion and tungsten silicide to make described
The sidewall surfaces of metal silication tungsten is roughening, after reactive ion etching process, and described grid polycrystalline silicon 3, described metal
The sidewall surfaces of tungsten silicide 4 and described silicon nitride protective layer 5 forms a rough layer 7, and this rough layer 7 is easier to by oxygen
Change and form silicon oxide.
Step 3, the described silicon substrate 1 after reactive ion etching process is carried out deionized water rinsing.
Step 4, as shown in Figure 3 C, carries out rapid thermal oxidation annealing to the described silicon substrate 1 after deionized water rinsing
Process；The annealing of described rapid thermal oxidation makes described silicon nitride protective layer 5, described metal silication tungsten 4, described grid many
The sidewall surfaces of crystal silicon 3 forms the monox lateral wall 8 that a thickness is 100 angstroms～150 angstroms.Described rapid thermal oxidation moves back
The technological temperature of fire is 975 DEG C, the process time is 20 seconds～30 seconds, and process gas is made up of oxygen and nitrogen, nitrogen
Throughput is 20 centimetres3/ minute～50 centimetres3/ minute, the content of oxygen is the 1%～2% of the total amount of process gas.
After forming above-mentioned grid and sidewall structure, follow-up the technique identical with other existing MOS technique can be used to walk
Suddenly, forming a complete MOS device, subsequent technique is as formed lightly-doped source drain region, forming source-drain area, and formation connects
The steps such as contact hole and formation metal connecting line.
By containing CF in the embodiment of the present invention4、CHF3And O2The reactive ion etching process sidewall to grid structure
After surface processes, define one layer of rough layer 7 being more prone to oxidation, the formation of rough layer 7 so that this
Unnecessary employing furnace process in bright embodiment, and just can form monox lateral wall 8 only with rapid thermal oxidation annealing.
So can not only reduce process costs, moreover it is possible to the formation of hemisphere jut when avoiding using furnace process, it is thus possible to prevent
Puncturing of grid curb wall, improves the voltage endurance capability of grid curb wall.The monox lateral wall 8 that the inventive method is formed can also be very
The stress reduced between silicon nitride layer and grid polycrystalline silicon 3 sidewall got well and the crystalline substance that grid polycrystalline silicon 3 sidewall can be repaired
Lattice defect.
Above by specific embodiment, the present invention is described in detail, but these have not constituted the limit to the present invention
System.Without departing from the principles of the present invention, those skilled in the art it may also be made that many deformation and improves, this
Also should be regarded as protection scope of the present invention a bit.
Claims (4)
1. the method for the monox lateral wall forming metallic silicon tangsten silicide grid, it is characterised in that comprise the steps:
Step one, sequentially form grid oxic horizon, grid polycrystalline silicon and metal silication tungsten in surface of silicon；Use light
Carving technology defines grid structure graphics field with photoresist, uses etching technics successively to described with photoresist for mask
Metal silication tungsten, described grid polycrystalline silicon and described grid oxic horizon perform etching formation grid structure figure；
Step 2, carry out reactive ion etching process, utilize reactive ion etching process that described photoresist is ashed
Process and described photoresist is removed；The process gas of reactive ion etching process includes carbon tetrafluoride, reaction from
In sub-etching process, the fluorion by producing bombards the sidewall surfaces of described metal silication tungsten and utilizes fluorion
The sidewall surfaces making described metal silication tungsten with the chemical reaction of tungsten silicide is roughening, thus improves described metal silication tungsten
The oxidized speed of sidewall surfaces；
Step 3, the described silicon substrate after reactive ion etching process is carried out deionized water rinsing；
Step 4, the described silicon substrate after deionized water rinsing is carried out rapid thermal oxidation annealing；Described Rapid Thermal
It is 100 angstroms～150 that oxidizing annealing makes described metal silication tungsten, the sidewall surfaces of described grid polycrystalline silicon form a thickness
Angstrom monox lateral wall.
2. the method for the monox lateral wall forming metallic silicon tangsten silicide grid as claimed in claim 1, it is characterised in that:
In step one, the surface at described metal silication tungsten is also formed with silicon nitride protective layer, for entering described metal silication tungsten
Row protection.
3. the method for the monox lateral wall forming metallic silicon tangsten silicide grid as claimed in claim 1, it is characterised in that:
The process gas of reactive ion etching process described in step 2 also includes fluoroform and oxygen.
4. the method for the monox lateral wall forming metallic silicon tangsten silicide grid as claimed in claim 1, it is characterised in that:
The technological temperature of the described rapid thermal oxidation annealing in step 4 is 975 DEG C, the process time is 20 seconds～30 seconds, work
Process gases is made up of oxygen and nitrogen, and nitrogen flow is 20 centimetres3/ minute～50 centimetres3/ minute, the content of oxygen
For the total amount of process gas 1%～2%.
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| CN104485280A (en) * | 2014-12-31 | 2015-04-01 | 上海华虹宏力半导体制造有限公司 | Method for manufacturing grid electrode |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1263357A (en) * | 1998-12-28 | 2000-08-16 | 因芬尼昂技术北美公司 | Semiconductor device and its production method |
| CN1571144A (en) * | 2003-07-15 | 2005-01-26 | 旺宏电子股份有限公司 | Self-alignment process for flash memory |
| CN102074466A (en) * | 2009-11-20 | 2011-05-25 | 中芯国际集成电路制造(上海)有限公司 | Grid manufacturing method |
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| TW465061B (en) * | 2000-11-16 | 2001-11-21 | Promos Technologies Inc | Method for avoiding protrusion on the gate side wall of metal silicide layer |
| KR100435805B1 (en) * | 2002-08-14 | 2004-06-10 | 삼성전자주식회사 | Method of fabricating MOS transistors |
| WO2012109572A1 (en) * | 2011-02-11 | 2012-08-16 | Brookhaven Science Associates, Llc | Technique for etching monolayer and multilayer materials |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1263357A (en) * | 1998-12-28 | 2000-08-16 | 因芬尼昂技术北美公司 | Semiconductor device and its production method |
| CN1571144A (en) * | 2003-07-15 | 2005-01-26 | 旺宏电子股份有限公司 | Self-alignment process for flash memory |
| CN102074466A (en) * | 2009-11-20 | 2011-05-25 | 中芯国际集成电路制造(上海)有限公司 | Grid manufacturing method |
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