CN103728797A - Display panel, production method thereof and display device - Google Patents

Display panel, production method thereof and display device Download PDF

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Publication number
CN103728797A
CN103728797A CN201310727491.5A CN201310727491A CN103728797A CN 103728797 A CN103728797 A CN 103728797A CN 201310727491 A CN201310727491 A CN 201310727491A CN 103728797 A CN103728797 A CN 103728797A
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rete
layer
display panel
electrode
grid
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CN103728797B (en
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薛伟
李小和
邵贤杰
董职福
张晓洁
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BOE Technology Group Co Ltd
Hefei BOE Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Hefei BOE Optoelectronics Technology Co Ltd
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Abstract

An embodiment of the invention discloses a display panel, a production method thereof and a display device, and relates to the technical field of display. Production cost of the display panel can be reduced on the premise of crosstalk elimination. The display panel comprises an array substrate. The array substrate comprises a plurality of film layers sequentially formed on a first substrate. A data line and a drain electrode are positioned on the same film layer. A grid line, a grid electrode and a first common electrode are positioned on the same film layer. The film layer where the grid line, the grid electrode and the first common electrode are positioned is positioned between the film layer where the data line and the drain electrode are positioned and the film layer where a pixel electrode is positioned.

Description

Display panel and preparation method thereof and display device
Technical field
The present invention relates to display technique field, relate in particular to a kind of display panel and preparation method thereof and display device.
Background technology
Display panel in liquid crystal display is for display frame, and display panel mainly comprises array base palte and color membrane substrates.Wherein, array base palte consists of underlay substrate and a plurality of retes of being formed on underlay substrate.
Fig. 1 is the sectional view of the data line part on array base palte, is formed with successively public electrode 11 ', gate insulator 12 ', active layer 13 ', data line 14 ', passivation layer 15 ' and pixel electrode 16 ' on underlay substrate 10 '.Wherein, public electrode 11 ' is positioned at same rete with grid line, grid on array base palte, through a composition technique, has formed public electrode 11 ' and grid line and grid on underlay substrate 10 ' simultaneously.
In using the process of the array base palte shown in Fig. 1, when applying voltage to data line 14 ', due to the passivation layer 16 ' only insulating across one deck between data line 14 ' and pixel electrode 16 ', therefore between data line 14 ' meeting and pixel electrode 16 ', produce " coupling ", the voltage that is data line 14 ' produces and pulls the voltage of pixel electrode 16 ', thereby causes display panel when display frame, to produce crosstalk phenomenon.
In prior art, can eliminate by the method for moving on public electrode 11 ' method of crosstalk phenomenon, even if public electrode 11 ' is positioned between pixel electrode 16 ' and data line 14 ', thereby can mask above-mentioned " coupling ".Inventor finds, adopt said method to eliminate crosstalk phenomenon and need to increase composition technique one time, for form the figure that comprises public electrode 11 ' between pixel electrode 16 ' and data line 14 ', therefore need to increase usage quantity and the operation of mask plate, thereby cause the cost of manufacture of display panel to increase.
Summary of the invention
Technical matters to be solved by this invention is to provide a kind of display panel and preparation method thereof and display device, can, eliminating under the prerequisite of crosstalk phenomenon, reduce the cost of manufacture of display panel.
For solving the problems of the technologies described above, the embodiment of the present invention provides a kind of display panel, and this adopts following technical scheme:
A kind of display panel, comprise array base palte, described array base palte is included in a plurality of retes that form successively on the first underlay substrate, data line and drain electrode are positioned at same rete, grid line, grid and the first public electrode are positioned at same rete, and the rete at described grid line, described grid and described the first public electrode place is between described data line and the rete at described drain electrode place and the rete at pixel electrode place.
Particularly, the described a plurality of retes that form successively on the first underlay substrate comprise:
Be positioned at the first rete on described the first underlay substrate, described the first rete comprises black matrix;
Be positioned at the second rete on described the first rete, described the second rete comprises active layer, and wherein, described active layer region is dropped in described black matrix region;
Be positioned at the tertiary membrane layer on described the second rete, described tertiary membrane layer comprises described data line and described drain electrode;
Be positioned at the 4th rete on described tertiary membrane layer, described the 4th rete is the first insulation course;
Be positioned at the 5th rete on described the 4th rete, described the 5th rete comprises described grid line, described grid and described the first public electrode;
Be positioned at the 6th rete on described the 5th rete, described the 6th rete is the second insulation course, wherein, on described the 4th rete and described the 6th rete, is provided with the via hole corresponding to described drain electrode;
Described in being positioned at, be provided with the 7th rete on described the 6th rete of described via hole, described the 7th rete comprises described pixel electrode, and described pixel electrode is electrically connected to described drain electrode by described via hole.
Further, described display panel also comprises color membrane substrates, and described color membrane substrates comprises:
The second underlay substrate;
Be positioned at the color filter layer on described the second underlay substrate;
Be positioned at the second public electrode in described color filter layer.
In addition, described color membrane substrates also comprises:
Protective clear layer, described protective clear layer is between described color filter layer and described the second public electrode.
The embodiment of the present invention provides a kind of display panel, and this display panel has structure as above.On the one hand, because the rete at grid and the first public electrode place is between data line and the drain electrode rete at place and the rete at pixel electrode place, therefore, the first public electrode can shadow data line and pixel electrode between " coupling ", thereby can eliminate the crosstalk phenomenon in display panel.On the other hand, because grid line, grid and the first public electrode are positioned at same rete, grid line, grid and the first public electrode can form in a composition technique, therefore reduced the usage quantity of mask plate, simplify the production process of display panel, thereby reduced the cost of manufacture of display panel.
The embodiment of the present invention also provides a kind of display device, and described display device comprises the display panel described in above any one.
In order further to solve the problems of the technologies described above, the embodiment of the present invention also provides a kind of method for making of display panel, and the method for making of this display panel adopts following technical scheme:
A method for making for display panel, comprises the following steps:
On substrate, form the first metal layer, through a composition technique, form the figure that comprises data line and drain electrode;
On described substrate, form the first insulation course;
On described the first insulation course, form the second metal level, through a composition technique, form the figure that comprises grid line, grid and the first public electrode;
On described substrate, form the second insulation course;
On described the first insulation course forming and described the second insulation course, through a composition technique, form the via hole corresponding to described drain electrode;
On described substrate, form layer of transparent conductive layer, through a composition technique, form pixel electrode, described pixel electrode is electrically connected to described drain electrode by described via hole, to form array base palte.
Further, the method for making of described display panel also comprises:
On the first underlay substrate, form one deck light shield layer, through a composition technique, form the figure that comprises black matrix;
On described the first underlay substrate, form semiconductive thin film, through a composition technique, form the figure that comprises active layer, to form described substrate, wherein, described active layer region is dropped in described black matrix region.
In addition, the method for making of described display panel also comprises:
On the second underlay substrate, form color filter layer;
Form the second public electrode, to form color membrane substrates.
Further, before forming the second public electrode, also comprise:
In described color filter layer, form protective clear layer.
The embodiment of the present invention provides a kind of method for making of display panel as above, wherein first formed the figure that comprises data line and drain electrode, then form the figure that comprises grid line, grid and the first public electrode, finally form the figure that comprises pixel electrode, the rete at grid line, grid and the first public electrode place on the display panel that makes to form is between data line and the drain electrode rete at place and the rete at pixel electrode place, thereby the first public electrode can shadow data line and pixel electrode between " coupling ", and then eliminate crosstalk phenomenon.In addition, grid line, grid and the first public electrode form in a composition technique, have therefore reduced the usage quantity of mask plate, have simplified the production process of display panel, thereby have reduced the cost of manufacture of display panel.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, below the accompanying drawing of required use during embodiment is described is briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the schematic cross-section of the data line part on array base palte of the prior art;
Fig. 2 is the floor map of the first array base palte in the embodiment of the present invention;
Fig. 3 is that the array base palte shown in the Fig. 2 in the embodiment of the present invention is along the schematic cross-section of A-A ' direction;
Fig. 4 is that the array base palte shown in the Fig. 2 in the embodiment of the present invention is along the schematic cross-section of B-B ' direction;
Fig. 5 is the structural representation of the color membrane substrates in the embodiment of the present invention;
Fig. 6 is the structural representation of the display panel in the embodiment of the present invention;
Fig. 7 is the method for making process flow diagram of the display panel in the embodiment of the present invention;
Fig. 8 is the method for making process flow diagram of the substrate in step S701 in the Fig. 7 in the embodiment of the present invention;
Fig. 9 is the structural representation of the second array base palte in the embodiment of the present invention;
Figure 10 is the method for making process flow diagram of the color membrane substrates in the embodiment of the present invention.
Description of reference numerals:
1-array base palte; The 10-the first underlay substrate; 11-black matrix;
12-active layer; 131-data line; 132-drain electrode;
The 14-the first insulation course; 151-grid line; 152-grid;
The 153-the first public electrode; The 16-the second insulation course; 17-pixel electrode;
18-via hole; The 20-the second underlay substrate; 21-color filter layer;
22-protective clear layer; The 23-the second public electrode; 3-layer of liquid crystal molecule;
31-liquid crystal molecule; 4-chock insulator matter; 10 '-underlay substrate;
11 '-public electrode; 12 '-gate insulator; 13 '-active layer;
14 '-data line; 15 '-passivation layer; 16 '-pixel electrode.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is the present invention's part embodiment, rather than whole embodiment.Embodiment based in the present invention, those of ordinary skills, not making the every other embodiment obtaining under creative work prerequisite, belong to the scope of protection of the invention.
Embodiment mono-
The embodiment of the present invention provides a kind of display panel, and this display panel can, eliminating under the prerequisite of crosstalk phenomenon, reduce the cost of manufacture of display panel.The display panel embodiment of the present invention being provided below in conjunction with accompanying drawing is described in detail.
This display panel comprises array base palte, as shown in Figure 2, Figure 3 and Figure 4, array base palte is included in a plurality of retes that form successively on the first underlay substrate 10, wherein, data line 131 and drain electrode 132 are positioned at same rete, grid line 151, grid 152 and the first public electrode 153 are positioned at same rete, and the rete at grid line 151, grid 152 and the first public electrode 153 places is between data line 131 and the drain electrode rete at 132 places and the rete at pixel electrode place.
Particularly, as shown in Figure 2, Figure 3 and Figure 4, a plurality of retes that form successively on the first underlay substrate 10 comprise:
Be positioned at the first rete on the first underlay substrate 10, the first rete comprises black matrix 11.Wherein, the material of black matrix 11 can, for the combination of acyclic sensing optical activity resin, poly-imines non-sense optically-active resin or above-mentioned resin, can be also the combination of chromated oxide, molybdenum oxide or above-mentioned oxide.In addition, the thickness of black matrix 11 can be
Figure BDA0000446061460000061
Be positioned at the second rete on the first rete 11, the second rete comprises active layer 12, and wherein, active layer 12 regions are dropped in black matrix 11 regions.Exemplarily, active layer 12 comprises that thickness is
Figure BDA0000446061460000062
semiconductor layer and thickness be doping semiconductor layer.
It should be noted that, the first underlay substrate 10 comprising due to above-mentioned array base palte is generally glass substrate or the quartz base plate that light transmission is good, the light of launching for fear of backlight is irradiated on active layer 12, make active layer 12 produce photo-generated carrier, thereby array base palte cannot normally be used, in embodiments of the present invention black matrix 11 is arranged on array base palte, active layer 12 regions are dropped in black matrix 11 regions, the light that black matrix 11 can be launched backlight all blocks, thereby avoid active layer 12 to produce photo-generated carrier under the irradiation of the light of backlight, guarantee that array base palte can normally be used.
Be positioned at the tertiary membrane layer on the second rete, tertiary membrane layer comprises data line 131 and drain electrode 132.Wherein the thickness of data line 131 and drain electrode 132 can be
Figure BDA0000446061460000071
in addition, the material of data line 131 and drain electrode 132 can be metal and the alloys thereof such as Cr, W, Ti, Ta, Mo, Al, Cu.You need to add is that, in embodiments of the present invention, source electrode is not set on array base palte, usage data line 131 is directly as source electrode, but is not limited to usage data line 131 directly as source electrode, also source electrode can be set on array base palte.
Be positioned at the 4th rete on tertiary membrane layer, the 4th rete is the first insulation course 14.Exemplarily, the thickness of the first insulation course 14 can be
Figure BDA0000446061460000072
the material of the first insulation course 14 can be oxide, nitride or oxynitrides.
Be positioned at the 5th rete on the 4th rete, the 5th rete comprises grid line 151, grid 152 and the first public electrode 153.Wherein, grid line 151, grid 152 and the first public electrode 153 can be used the metals such as Cr, W, Ti, Ta, Mo, Al, Cu and alloy thereof to make, and also can be comprised of multiple layer metal film.The thickness of grid line 151, grid 152 and the first public electrode 153 can be
Figure BDA0000446061460000073
Be positioned at the 6th rete on the 5th rete, the 6th rete is the second insulation course 16, wherein, is provided with the via hole 18 corresponding to drain electrode on the 4th rete and the 6th rete.The thickness of the second insulation course 16 is chosen as
Figure BDA0000446061460000074
conventionally, the material of the second insulation course 16 can be oxide, nitride or oxynitrides.
Be positioned at the 7th rete on the 6th rete that is provided with via hole 18, the 7th rete comprises pixel electrode 17, and pixel electrode 17 is electrically connected to drain electrode 132 by via hole 18.Wherein, the thickness of pixel electrode 17 can be
Figure BDA0000446061460000081
the material of pixel electrode is generally tin indium oxide, indium zinc oxide, the electrically conducting transparent things such as aluminum zinc oxide.
Further, the display panel that the embodiment of the present invention provides also comprises color membrane substrates, and as shown in Figure 5, this color membrane substrates comprises:
The second underlay substrate 20, the second underlay substrates 20 are preferably glass substrate or the quartz base plate that light transmission is good.
Be positioned at the color filter layer 21 on the second underlay substrate 20, wherein color filter layer 21 preferred thickness are the resin material with filter action of 1 μ m~3 μ m.Particularly, color filter layer 21 comprises red area, green area and blue region, and red area is selected the resin material that can see through ruddiness, and green area is selected the resin material that can see through green glow, and blue region is selected the resin material that can see through blue light.
The thickness that is positioned at the second public electrode 23, the second public electrodes 23 in color filter layer 21 can be
Figure BDA0000446061460000082
, the material of the second public electrode 23 is generally tin indium oxide, indium zinc oxide, the electrically conducting transparent things such as aluminum zinc oxide.
Further, above-described color membrane substrates can also comprise protective clear layer 22, thus the degree that has an even surface that can protect better color filter layer 21 and improve color filter layer 21.Wherein, protective clear layer 22 is between color filter layer 21 and the second public electrode 23.Usually, the material of protective clear layer 22 is preferably epoxy resin and acrylic resin system macromolecular material.
In addition, as shown in Figure 6, display panel also comprises the layer of liquid crystal molecule 3 between array base palte 1 and color membrane substrates 2, under the pixel electrode 17 that liquid crystal molecule 31 in layer of liquid crystal molecule 3 can be on array base palte 1 and the effect of the electric field between the second public electrode 23 on color membrane substrates 2, deflect, thereby determine whether the light that backlight is launched can pass through layer of liquid crystal molecule 3.
Further, in order to make after 2 pairs of boxes of array base palte 1 and color membrane substrates, box between array base palte 1 and color membrane substrates 2 is thick stable, thereby there is better display effect, as shown in Figure 6, the display panel that the embodiment of the present invention provides also comprises chock insulator matter 4, and chock insulator matter 4 is preferably cylindrical spacer, and the material of chock insulator matter 4 can be for gathering the non-sense optically-active of imines resin etc.In addition, chock insulator matter 4 can be positioned on array base palte 1, also can be positioned on color membrane substrates 2, preferably chock insulator matter 4 is arranged on the color membrane substrates 2 that has formed the second public electrode 23 in embodiments of the present invention.
The embodiment of the present invention provides a kind of display panel, and this display panel has structure as above.On the one hand, because the rete at grid and the first public electrode place is between data line and the drain electrode rete at place and the rete at pixel electrode place, therefore, the first public electrode can shadow data line and pixel electrode between " coupling ", thereby can eliminate the crosstalk phenomenon in display panel.On the other hand, because grid line, grid and the first public electrode are positioned at same rete, grid line, grid and the first public electrode can form in a composition technique, therefore reduced the usage quantity of mask plate, simplify the production process of display panel, thereby reduced the cost of manufacture of display panel.
In addition, the embodiment of the present invention also provides a kind of display device, and this display device comprises display panel as above.Particularly, described display device can comprise: any product or parts with Presentation Function such as liquid crystal panel, Electronic Paper, organic LED panel, mobile phone, panel computer, televisor, display, notebook computer, digital album (digital photo frame), navigating instrument.
Embodiment bis-
In order to prepare, have the as above display panel of structure, the embodiment of the present invention also provides a kind of method for making of display panel, and as shown in Figure 7, the method for making of this display panel comprises the steps:
Step S701, on substrate, form the first metal layer, through a composition technique, form the figure that comprises data line and drain electrode.
First, by methods such as sputter or thermal evaporations, form the first metal layer on substrate, conventionally, the first metal layer is selected and is formed as the metals such as Cr, W, Ti, Ta, Mo, Al, Cu and alloy deposition thereof, and the thickness of the first metal layer is
Figure BDA0000446061460000101
Then, on the first metal layer, apply photoresist, use has the mask plate that comprises data line 131 and drain 132 figures and hides the first metal layer that is coated with photoresist, after the steps such as overexposure, development, etching, forms the figure that comprises data line 131 and drain electrode 132 on substrate.You need to add is that, in embodiments of the present invention, usage data line 131 is directly as source electrode, but be not limited to usage data line 131 directly as source electrode, also can on array base palte 1, source electrode be set, now only need to be used in the pattern that also comprises source electrode on the mask plate that hides the first metal layer that is coated with photoresist.
Step S702, on the substrate of above-mentioned steps, form the first insulation course completing.
By methods such as plasma reinforced chemical vapour deposition, sputter or thermal evaporations, on the substrate of above-mentioned steps, form the first insulation course 14 completing.Exemplarily, the thickness of the first insulation course 14 can be
Figure BDA0000446061460000103
, the first insulation course 14 can select oxide, nitride or oxynitrides to make, and while preparing the first insulation course 14 of above-mentioned material, using reacting gas can be SiH 4, NH 3, N 2mixed gas or SiH 2cl 2, NH 3, N 2mixed gas.
Step S703, on the first insulation course, form the second metal level, through a composition technique, form the figure that comprises grid line, grid and the first public electrode.
First, by methods such as plasma reinforced chemical vapour deposition, sputter or thermal evaporations, on the first insulation course 14, form the second metal level.Conventionally, the second metal level can be metal and the alloys thereof such as Cr, W, Ti, Ta, Mo, Al, Cu, can be also the structure of multiple layer metal film composition.The thickness of the second metal level can be
Figure BDA0000446061460000102
Then, on the second metal level, apply photoresist, the mask plate that use has the figure that comprises grid line 151, grid 152 and the first public electrode 153 hides the second metal level that is coated with photoresist, after the steps such as overexposure, development, etching, form the figure that comprises grid line 151, grid 152 and the first public electrode 153.
Step S704, complete on the substrate of above-mentioned steps, forming the second insulation course.
By methods such as plasma reinforced chemical vapour deposition, sputter or thermal evaporations, on the substrate of above-mentioned steps, form the second insulation course 16 completing.Alternatively, the thickness of the second insulation course 16 is chosen as
Figure BDA0000446061460000111
conventionally, the material of the second insulation course 16 can be oxide, nitride or oxynitrides, and while preparing the second insulation course 16 of above-mentioned material, using reacting gas can be SiH 4, NH 3, N 2mixed gas or SiH 2cl 2, NH 3, N 2mixed gas.
Step S705, on the first insulation course forming and the second insulation course, through a composition technique, form the via hole corresponding to drain electrode.
On the second insulation course 16, apply photoresist, the mask plate that use has the figure of via hole 18 hides the second insulation course 16 that is coated with photoresist, then after the techniques such as overexposure, development, etching, on mask plate, corresponding the first insulation course 14 and the second insulation course in the figure place of via hole 18 is all etched away, thereby makes on the first insulation course 14 and the second insulation course 16 to form the via hole 18 corresponding to drain electrode 132.
Step S706, complete on the substrate of above-mentioned steps, form layer of transparent conductive layer, through a composition technique, forming pixel electrode, pixel electrode is electrically connected to drain electrode by via hole, to form array base palte.
First, by methods such as sputter or thermal evaporations, on the substrate of above-mentioned steps, form layer of transparent conductive layer completing.Wherein, the thickness of transparency conducting layer can be
Figure BDA0000446061460000113
the material of transparency conducting layer is generally tin indium oxide, indium zinc oxide, the electrically conducting transparent things such as aluminum zinc oxide.
Then, on transparency conducting layer, apply photoresist, use the mask plate of the pattern with pixel electrode 17 to hide the transparency conducting layer that is coated with photoresist, after the steps such as overexposure, development, etching, form pixel electrode 17, thereby form array base palte 1.
Further, at step S701: form the first metal layer on substrate, form through a composition technique figure that comprises data line and drain electrode, also comprise forming the step of described substrate, specifically can comprise following steps as shown in Figure 8 before:
Step S801, on the first underlay substrate, form one deck light shield layer, through a composition technique, form the figure that comprises black matrix.
First, by methods such as coatings, on the first underlay substrate 10, form one deck light shield layer, the material of light shield layer can, for the combination of acyclic sensing optical activity resin, poly-imines non-sense optically-active resin or above-mentioned resin, can be also the combination of chromated oxide, molybdenum oxide or above-mentioned oxide.In addition, the thickness of light shield layer can be
Then, on light shield layer, apply photoresist, use to have to comprise that the mask plate of black matrix 11 patterns hides the light shield layer that is coated with photoresist, after the steps such as overexposure, development, etching, forms the figure that comprises black matrix 11.
Step S802, complete on the first underlay substrate of above-mentioned steps, form semiconductive thin film, through a composition technique, forming the figure that comprises active layer, to form described substrate, wherein, active layer region is dropped in black matrix region.
First, by methods such as plasma activated chemical vapour depositions, form semiconductive thin film completing on the first underlay substrate 10 of above-mentioned steps, exemplarily, semiconductive thin film can be for comprising that thickness is semiconductor layer and thickness be
Figure BDA0000446061460000122
the double-decker of doping semiconductor layer.
Then, on semiconductive thin film, apply photoresist, use the mask plate with the pattern that comprises active layer 12 to hide the semiconductive thin film that is coated with photoresist, after the steps such as overexposure, development, etching, formation comprises the figure of active layer 12, and then forms the substrate described in step S701.
It should be noted that, active layer 12 regions that form in step S802 are dropped in black matrix 11 regions that form in step S801, its main cause is, the first underlay substrate 10 is generally glass substrate or the quartz base plate that light transmission is good, the light of launching for fear of backlight is irradiated on active layer 12, make active layer 12 produce photo-generated carrier, thereby array base palte cannot normally be used, in the embodiment of the present invention, black matrix 11 is arranged on array base palte, active layer 12 regions are dropped in black matrix 11 regions, the light that black matrix 11 can be launched backlight all blocks, thereby avoid active layer 12 to produce photo-generated carrier under the irradiation of the light of backlight, guarantee that array base palte can normally be used.
In addition, also you need to add is that, in the manufacturing process of array base palte, first formation semiconductive thin film that can be as described in the present embodiment of the invention, through a composition technique, form active layer 12, then form the first metal layer, through a composition technique, form data line 131 and drain electrode 132; Also can first form semiconductive thin film and the first metal layer, then on the first metal layer, apply photoresist, use a semi-transparent mask plate to hide, through exposure for the first time, develop for the first time, for the first time after etching, form data line 131 and drain electrode 132, then through exposure for the second time, second development, for the second time after etching, form active layer 12, now, as shown in Figure 9, wherein the below of whole piece data line 131 is provided with active layer 12 to the structure of the array base palte of formation.
Further, because display panel also comprises color membrane substrates as shown in Figure 5, so the method for making of display panel also comprise shown in Figure 10 in order to form the following steps of color membrane substrates:
Step S901, on the second underlay substrate, form color filter layer.
Because color filter layer 21 comprises red area, green area and blue region, therefore, in color filter layer 21, the making in the region of different colours need to be carried out respectively.
Exemplarily, first make red area, its concrete manufacturing process is as follows:
First, by methods such as coatings, apply the resin material that one deck can see through ruddiness on the second underlay substrate 20, thickness can be 1 μ m~3 μ m.
Then, use the mask plate of the pattern with red area to hide above-mentioned resin material, after the steps such as overexposure, development, etching, form the red area of color filter layer 21.Similarly, form successively green area and the blue region of color filter layer 21.
It should be noted that, in embodiments of the present invention, first form red area, form again green area, finally form blue region, but the formation of red area, green area and blue region is sequentially not limited to this, those skilled in the art can adjust according to actual conditions, and the embodiment of the present invention does not limit this.
Step S902, formation the second public electrode, to form color membrane substrates.
By methods such as sputter or thermal evaporations, form the second public electrode 23, thereby form color membrane substrates 2.Exemplarily, the thickness of the second public electrode 23 can be
Figure BDA0000446061460000141
the material of the second public electrode 23 is generally tin indium oxide, indium zinc oxide, the electrically conducting transparent things such as aluminum zinc oxide.
For the degree that has an even surface of protecting better color filter layer 21 and improving color filter layer 21; before forming the second public electrode 23; can also in color filter layer 21, form protective clear layer 22 by modes such as deposition, coatings; then on protective clear layer 22, form the second public electrode 23, to form color membrane substrates 2.Usually, the material of protective clear layer 22 is preferably epoxy resin and acrylic resin system macromolecular material.
Further, after making array base palte and color membrane substrates to box, box between array base palte and color membrane substrates is thick stable, thereby there is better display effect, as shown in Figure 6, the display panel that the embodiment of the present invention provides also comprises chock insulator matter 4, therefore, the method for making of the display panel that the embodiment of the present invention provides also comprises the making of chock insulator matter 4, and preferably on color membrane substrates 2, make cylindrical spacer, concrete manufacturing process is as follows: first, by methods such as coatings, on color membrane substrates 2, form one deck chock insulator matter layer, conventionally the material of chock insulator matter layer is for gathering the non-sense optically-active of imines resin etc., then, use the mask plate with cylindrical spacer pattern to hide chock insulator matter layer, after the steps such as overexposure, development, etching, on color membrane substrates 2, form cylindrical spacer.
Finally, at array base palte 1 or formed on the color membrane substrates 2 of cylindrical spacer and be coated with a circle sealed plastic box, appropriate liquid crystal molecule 31 drips in the region of using liquid crystal dripping device to surround in sealed plastic box, in vacuum environment, carry out box technique, two substrates are bonded to each other, make sealed plastic box fixed-type, finally formed the display panel that comprises array base palte 1, color membrane substrates 2, layer of liquid crystal molecule 3 and chock insulator matter 4 as shown in Figure 6.
The embodiment of the present invention provides a kind of method for making of display panel as above, wherein first formed the figure that comprises data line and drain electrode, then form the figure that comprises grid line, grid and the first public electrode, finally form the figure that comprises pixel electrode, the rete at grid line, grid and the first public electrode place on the display panel that makes to form is between data line and the drain electrode rete at place and the rete at pixel electrode place, thereby the first public electrode can shadow data line and pixel electrode between " coupling ", and then eliminate crosstalk phenomenon.In addition, grid line, grid and the first public electrode form in a composition technique, have therefore reduced the usage quantity of mask plate, have simplified the production process of display panel, thereby have reduced the cost of manufacture of display panel.
The above; be only the specific embodiment of the present invention, but protection scope of the present invention is not limited to this, is anyly familiar with those skilled in the art in the technical scope that the present invention discloses; can expect easily changing or replacing, within all should being encompassed in protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection domain of described claim.

Claims (9)

1. a display panel, comprises array base palte, and described array base palte is included in a plurality of retes that form successively on the first underlay substrate, it is characterized in that,
Data line and drain electrode are positioned at same rete, grid line, grid and the first public electrode are positioned at same rete, and the rete at described grid line, described grid and described the first public electrode place is between described data line and the rete at described drain electrode place and the rete at pixel electrode place.
2. display panel according to claim 1, is characterized in that, the described a plurality of retes that form successively on the first underlay substrate comprise:
Be positioned at the first rete on described the first underlay substrate, described the first rete comprises black matrix;
Be positioned at the second rete on described the first rete, described the second rete comprises active layer, and wherein, described active layer region is dropped in described black matrix region;
Be positioned at the tertiary membrane layer on described the second rete, described tertiary membrane layer comprises described data line and described drain electrode;
Be positioned at the 4th rete on described tertiary membrane layer, described the 4th rete is the first insulation course;
Be positioned at the 5th rete on described the 4th rete, described the 5th rete comprises described grid line, described grid and described the first public electrode;
Be positioned at the 6th rete on described the 5th rete, described the 6th rete is the second insulation course, wherein, on described the 4th rete and described the 6th rete, is provided with the via hole corresponding to described drain electrode;
Described in being positioned at, be provided with the 7th rete on described the 6th rete of described via hole, described the 7th rete comprises described pixel electrode, and described pixel electrode is electrically connected to described drain electrode by described via hole.
3. display panel according to claim 2, is characterized in that, described display panel also comprises color membrane substrates, and described color membrane substrates comprises:
The second underlay substrate;
Be positioned at the color filter layer on described the second underlay substrate;
Be positioned at the second public electrode in described color filter layer.
4. display panel according to claim 3, is characterized in that, described color membrane substrates also comprises:
Protective clear layer, described protective clear layer is between described color filter layer and described the second public electrode.
5. a display device, is characterized in that, comprises the display panel as described in claim 1~4 any one.
6. a method for making for display panel, is characterized in that, comprises the following steps:
On substrate, form the first metal layer, through a composition technique, form the figure that comprises data line and drain electrode;
On described substrate, form the first insulation course;
On described the first insulation course, form the second metal level, through a composition technique, form the figure that comprises grid line, grid and the first public electrode;
On described substrate, form the second insulation course;
On described the first insulation course forming and described the second insulation course, through a composition technique, form the via hole corresponding to described drain electrode;
On described substrate, form layer of transparent conductive layer, through a composition technique, form pixel electrode, described pixel electrode is electrically connected to described drain electrode by described via hole, to form array base palte.
7. the method for making of display panel according to claim 6, is characterized in that,
Also comprise:
On the first underlay substrate, form one deck light shield layer, through a composition technique, form the figure that comprises black matrix;
On described the first underlay substrate, form semiconductive thin film, through a composition technique, form the figure that comprises active layer, to form described substrate, wherein, described active layer region is dropped in described black matrix region.
8. according to the method for making of the display panel described in claim 6 or 7, it is characterized in that, also comprise:
On the second underlay substrate, form color filter layer;
Form the second public electrode, to form color membrane substrates.
9. the method for making of display panel according to claim 8, is characterized in that,
Before forming the second public electrode, also comprise:
In described color filter layer, form protective clear layer.
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