CN103727988B - A kind of current mirror of anti-single particle effect - Google Patents

A kind of current mirror of anti-single particle effect Download PDF

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Publication number
CN103727988B
CN103727988B CN201310756220.2A CN201310756220A CN103727988B CN 103727988 B CN103727988 B CN 103727988B CN 201310756220 A CN201310756220 A CN 201310756220A CN 103727988 B CN103727988 B CN 103727988B
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China
Prior art keywords
nmos tube
pmos
single particle
grid
drain electrode
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CN201310756220.2A
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Chinese (zh)
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CN103727988A (en
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徐江涛
贾文龙
高静
史再峰
姚素英
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Tianjin University
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Tianjin University
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Abstract

A kind of current mirror of anti-single particle effect, include the first NMOS tube M1 and the second NMOS tube M2, wherein, the grid of the first described NMOS tube M1 and the grid of the second NMOS tube M2 are connected, the source electrode of the first NMOS tube M1 and the source ground of the second NMOS tube M2, the drain electrode of the first NMOS tube M1 connects the grid of this first NMOS tube M1 described and connects reference current Iref, and the drain electrode of the second described NMOS tube M2 connects load and respectively for eliminating the single particle effect auxiliary circuit to load effect.The present invention can eliminate the impact of the single particle effect electric current on flowing through load in current mirror, makes circuit reach anti-single particle effect, thus can apply under the radiation conditions such as space.

Description

A kind of current mirror of anti-single particle effect
Technical field
The present invention relates to a kind of current mirror.Particularly relate to the electric current of the anti-single particle effect of current mirror in a kind of Analogous Integrated Electronic Circuits Mirror.
Background technology
In analog circuit, the use of current source is very frequent, and the design of current source is based on the duplication to reference current, i.e. electricity Stream mirror.On the premise of not considering transistor channel length mudulation effect, current mirror can accurately replica current and not by technique Impact with temperature.But, the analog circuit worked under radiation environment may be occurred performance even function by radiation effect Change.Single particle effect refers to single high energy particle when through the sensitive volume of microelectronic component, deposits electricity on its track Lotus, these electric charges are collected by device electrode, cause change or the device failure of device logic state.When there is electric field, particle rail Electron hole pair on mark will separate, and is collected by electrode and forms transient current.Along with the reduction of characteristic size, single particle effect The Circuit responce coupling caused and electric charge are shared equivalent strain and are obtained significantly.The current mirroring circuit affected by single particle effect, due to The electric current that single particle effect produces, reference current can not accurately copy on required branch road, may cause using branch road electricity The circuit cisco unity malfunction of stream, is also possible to time serious cause and punctures even device failure.
Summary of the invention
The technical problem to be solved is to provide and a kind of can eliminate the single particle effect electricity to flowing through load in current mirror The current mirror of the anti-single particle effect of stream impact
The technical solution adopted in the present invention is: the current mirror of a kind of anti-single particle effect, include the first NMOS tube M1 and Second NMOS tube M2, wherein, the grid of the first described NMOS tube M1 and the grid of the second NMOS tube M2 are connected, The source electrode of the first NMOS tube M1 and the source ground of the second NMOS tube M2, the drain electrode of the first NMOS tube M1 connects The grid of this first NMOS tube M1 described and connection reference current Iref, the drain electrode of the second described NMOS tube M2 divides Lian Jie not load and for eliminating the single particle effect auxiliary circuit to load effect.
Described auxiliary circuit includes the first PMOS M4, the second PMOS M5 and the 3rd NMOS tube M3, institute The drain electrode stating the first PMOS M4 connects the drain electrode of the second NMOS tube M2, the source electrode of the first PMOS M4 and second The source class of PMOS M5 meets power vd D, and the grid of the first PMOS M4 and the grid of the second PMOS M5 are connected, The drain electrode of the second PMOS M5 connects the grid of this second PMOS M5, and the drain electrode of the second PMOS M5 is also connected with The drain electrode of the 3rd NMOS tube M3, the source electrode of the 3rd NMOS tube M3 and the equal ground connection of grid.
3rd NMOS tube M3 of described auxiliary circuit and the second NMOS tube M2 are equivalently-sized, and layout design uses altogether Barycenter layout, and make the drain electrode of the 3rd NMOS tube M3 and the second NMOS tube M2 be close.
The current mirror of a kind of anti-single particle effect of the present invention, can eliminate the single particle effect electric current to flowing through load in current mirror Impact, make circuit reach anti-single particle effect, thus can apply under the radiation conditions such as space.
Accompanying drawing explanation
Fig. 1 is the circuit theory diagrams of the present invention;
Fig. 2 is the circuit theory diagrams that the present invention is embodied as.
Detailed description of the invention
Below in conjunction with embodiment and accompanying drawing, the current mirror of a kind of anti-single particle effect of the present invention is described in detail.
The current mirror of universal architecture can accurately replicate reference current, but does not have the ability of Anti-single particle radiation.In order to make electricity Stream source has the ability of anti-single particle effect, needs to increase auxiliary circuit.
As it is shown in figure 1, the current mirror of a kind of anti-single particle effect of the present invention, include the first NMOS tube M1 and second NMOS tube M2, wherein, the grid of the first described NMOS tube M1 and the grid of the second NMOS tube M2 are connected, the The source electrode of one NMOS tube M1 and the source ground of the second NMOS tube M2, the drain electrode of the first NMOS tube M1 connects institute Stating the grid of this first NMOS tube M1 and connect reference current Iref, the electric current i.e. flowing through the first NMOS tube M1 is base Quasi-electric current Iref, the drain electrode of the second described NMOS tube M2 connects load C and respectively for eliminating single particle effect to load The auxiliary circuit B of C impact.
When current mirror normally works, the electric current I flowing through the second NMOS tube M2 and the load of the second NMOS tube M2 can be accurately Mirror image Iref.
The current mirror of a kind of anti-single particle effect of the present invention is divided into two kinds of mode of operations: be not affected by single particle effect when affecting, auxiliary Helping circuit not work, this circuit is as broad as long with common current mirror, then flows through the electric current I=Iref of the second NMOS tube M2 load; When second NMOS tube M2 drain electrode (A point) is affected by single particle effect, it is assumed that the electric current that single particle effect produces is Δ I, Then flowing through the electric current I2=Iref+ Δ I of the second NMOS tube M2, now auxiliary circuit work, output size is that the electric current of Δ I is to A Point, electric current the I '=I2-Δ I=Iref now flow through in load load, remain to accurately replicate reference current, i.e. eliminate single-particle effect The impact of reply load load, the follow-up analog circuit of this current mirror also will not be affected by single particle effect.
As in figure 2 it is shown, described auxiliary circuit B includes the first PMOS M4, the second PMOS M5 and the 3rd NMOS Pipe M3, the 3rd described NMOS tube M3 and the second NMOS tube M2 are equivalently-sized.Described first PMOS M4 Drain electrode connects the drain electrode of the second NMOS tube M2, and the source electrode of the first PMOS M4 and the source class of the second PMOS M5 connect Power vd D, the grid of the first PMOS M4 and the grid of the second PMOS M5 are connected, the second PMOS M5 Drain electrode connect this second PMOS M5 grid, the drain electrode of the second PMOS M5 is also connected with the 3rd NMOS tube M3 Drain electrode, the source electrode of the 3rd NMOS tube M3 and the equal ground connection of grid.
The core concept of Design assistant circuit is that electric charge is shared.Along with the lasting reduction of device pitch, single particle is incident, may At multiple adjacent PN junction generation charge-trappings.Assume that single-particle is incident identical on the impact of adjacent transistor.The of auxiliary circuit Three NMOS tube M3 are equivalently-sized with the second NMOS tube M2 constituting current mirror, except using common centroid cloth during layout design Office, also to make the drain electrode of two transistors closely, so can maximize shared charge-trapping.The first of auxiliary circuit PMOS M4, the second PMOS M5 are current mirror form.
When being not affected by single particle effect, the 3rd NMOS tube M3 grounded-grid in auxiliary circuit, the 3rd NMOS tube M3 is closed Disconnected, do not have electric current to flow through, then the first PMOS M4 does not has electric current to flow through yet, i.e. auxiliary circuit is in idle state, Current mirror normally works, I=Iref, as broad as long with General Current mirror.Second NMOS tube M2 drain electrode (A point) is by simple grain During sub-effects, the electric current flowing through the second NMOS tube M2 is no longer Iref, also includes being affected generation by single particle effect Electric current;The drain electrode of the second NMOS tube M2 and the 3rd NMOS tube M3 closely, due to electric charge share, the 3rd NMOS Pipe M3 can collect and the electric charge of the second NMOS tube M2 equivalent, and the i.e. the 3rd NMOS tube M3 also can by single particle effect Produce electric current;Assume that the electric current then flowing through the second NMOS tube M2 and the 3rd NMOS tube M3 is Δ I, due to first PMOS M4 and the second PMOS M5 constitute current mirror, flow through the electric current of the first PMOS M4 also for Δ I.So Auxiliary circuit is exported electric current Δ I when current mirroring circuit affects by single particle effect, and the electric current flowing through the second NMOS tube M2 is I2=Iref+ Δ I, then the electric current flowing through load is I '=I2-Δ I=Iref, i.e. eliminates the single particle effect impact on load load electric current, Single particle effect does not interferes with follow-up analog circuit yet.

Claims (2)

  1. null1. the current mirror of an anti-single particle effect,Include the first NMOS tube (M1) and the second NMOS tube (M2),Wherein,The grid of described the first NMOS tube (M1) and the grid of the second NMOS tube (M2) are connected,The source electrode of the first NMOS tube (M1) and the source ground of the second NMOS tube (M2),The drain electrode of the first NMOS tube (M1) connects the grid of this first NMOS tube (M1) described and connects reference current Iref,It is characterized in that,The drain electrode of described the second NMOS tube (M2) connects load (C) respectively and is used for eliminating the auxiliary circuit (B) that load (C) is affected by single particle effect,Described auxiliary circuit (B) includes the first PMOS (M4)、Second PMOS (M5) and the 3rd NMOS tube (M3),The drain electrode of described first PMOS (M4) connects the drain electrode of the second NMOS tube (M2),The source electrode of the first PMOS (M4) and the source class of the second PMOS (M5) meet power vd D,The grid of the first PMOS (M4) and the grid of the second PMOS (M5) are connected,The drain electrode of the second PMOS (M5) connects the grid of this second PMOS (M5),The drain electrode of the second PMOS (M5) is also connected with the drain electrode of the 3rd NMOS tube (M3),The source electrode of the 3rd NMOS tube (M3) and the equal ground connection of grid.
  2. The current mirror of a kind of anti-single particle effect the most according to claim 1, it is characterized in that, 3rd NMOS tube (M3) of described auxiliary circuit is equivalently-sized with the second NMOS tube (M2), and layout design uses common centroid layout, and the 3rd NMOS tube (M3) is made to be close with the drain electrode of the second NMOS tube (M2).
CN201310756220.2A 2013-12-30 2013-12-30 A kind of current mirror of anti-single particle effect Expired - Fee Related CN103727988B (en)

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Application Number Priority Date Filing Date Title
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CN103727988B true CN103727988B (en) 2016-08-17

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Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03159410A (en) * 1989-11-17 1991-07-09 Toshiba Corp Current mirror circuit
CN101464700A (en) * 2007-12-18 2009-06-24 原景科技股份有限公司 Current mirror circuit
CN102809982A (en) * 2012-07-13 2012-12-05 电子科技大学 Low voltage current mirror
CN102981550A (en) * 2012-11-27 2013-03-20 中国科学院微电子研究所 Low-voltage low-power-consumption CMOS voltage source
CN203719714U (en) * 2013-12-30 2014-07-16 天津大学 Current mirror resisting single event effect

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Granted publication date: 20160817