CN203719714U

CN203719714U - Current mirror resisting single event effect

Info

Publication number: CN203719714U
Application number: CN201320894188.XU
Authority: CN
Inventors: 徐江涛; 贾文龙; 高静; 史再峰; 姚素英
Original assignee: Tianjin University
Current assignee: Tianjin University
Priority date: 2013-12-30
Filing date: 2013-12-30
Publication date: 2014-07-16
Anticipated expiration: 2023-12-30

Abstract

The utility model provides a current mirror resisting the single event effect. The current mirror comprises a first NMOS tube M1 and a second NMOS tube M2. A grid of the first NMOS tube M1 and a grid of the second NMOS tube M2 are connected. A source of the first NMOS tube M1 and a source of the second NMOS tube M2 are grounded. A drain of the first NMOS tube M1 is connected with the grid of the first NMOS tube M1 and reference currents Iref. A drain of the second NMOS tube M2 is respectively connected with a load and an auxiliary circuit used for eliminating the influence of the single event effect on the load. The current mirror can eliminate the influence of the single event effect on the currents flowing through the load in the current mirror, and can be applied to the radiation conditions of space and the like, and the circuit can resist the single event effect.

Description

A kind of current mirror of anti-single particle effect

Technical field

The utility model relates to a kind of current mirror.Particularly relate to the current mirror of the anti-single particle effect of current mirror in a kind of Analogous Integrated Electronic Circuits.

Background technology

In mimic channel, the use of current source is very frequent, and the design of current source is based on to the copying of reference current, i.e. current mirror.Do not considering under the prerequisite of transistor channel length mudulation effect accurately replica current and be not subject to the impact of flow-route and temperature of current mirror.But the mimic channel of working under radiation environment may be subject to radiation effect and the even change of function of performance occurs.Single particle effect refers to single high energy particle in the time of the sensitive volume through microelectronic component, deposited charge on its track, and these electric charges are collected by device electrode, cause change or the device failure of device logic state.While there is electric field, the electron hole pair on particle trajectory will separate, and is collected and forms momentary current by electrode.Along with reducing of characteristic dimension, the Circuit responce coupling that single particle effect causes and electric charge are shared equivalent strain and are obtained significantly.Be subject to the current mirroring circuit of single particle effect impact, due to the electric current of single particle effect generation, reference current can not accurately copy on needed branch road, may cause using the circuit cisco unity malfunction of branch current, when serious, also may cause and puncture even device failure.

Summary of the invention

Technical problem to be solved in the utility model is, provides a kind of single particle effect of can eliminating to flowing through the current mirror of anti-single particle effect of current affects of load in current mirror

The technical scheme that the utility model adopts is: a kind of current mirror of anti-single particle effect, include a NMOS pipe M1 and the 2nd NMOS pipe M2, wherein, the grid of a described NMOS pipe M1 is connected with the grid of the 2nd NMOS pipe M2, the source ground of the source electrode of the one NMOS pipe M1 and the 2nd NMOS pipe M2, the drain electrode of the one NMOS pipe M1 connects the grid of a described NMOS pipe M1 and connects reference current Iref, and the drain electrode of the 2nd described NMOS pipe M2 connects respectively load and for eliminating the auxiliary circuit of single particle effect to load effect.

Described auxiliary circuit includes a PMOS pipe M4, the 2nd PMOS pipe M5 and the 3rd NMOS pipe M3, the drain electrode of a described PMOS pipe M4 connects the drain electrode of the 2nd NMOS pipe M2, the source class of the source electrode of the one PMOS pipe M4 and the 2nd PMOS pipe M5 meets power vd D, the grid of the one PMOS pipe M4 is connected with the grid of the 2nd PMOS pipe M5, the drain electrode of the 2nd PMOS pipe M5 connects the grid of the 2nd PMOS pipe M5, the drain electrode of the 2nd PMOS pipe M5 also connects the drain electrode of the 3rd NMOS pipe M3, source electrode and the equal ground connection of grid of the 3rd NMOS pipe M3.

The 3rd NMOS pipe M3 and the 2nd NMOS pipe M2 of described auxiliary circuit are measure-alike, and layout design use common centroid layout, and the drain electrode of the 3rd NMOS pipe M3 and the 2nd NMOS pipe M2 is close.

The current mirror of a kind of anti-single particle effect of the present utility model, can eliminate single particle effect to flowing through the impact of electric current of load in current mirror, makes circuit reach anti-single particle effect, thereby can be applied under the radiation conditions such as space.

Brief description of the drawings

Fig. 1 is circuit theory diagrams of the present utility model;

Fig. 2 is the concrete circuit theory diagrams of implementing of the utility model.

Embodiment

Below in conjunction with embodiment and accompanying drawing, the current mirror of a kind of anti-single particle effect of the present utility model is described in detail.

The current mirror of universal architecture can accurately copy reference current, but does not have the ability of anti-single particle radiation.In order to make current source there is the ability of anti-single particle effect, need to increase auxiliary circuit.

As shown in Figure 1, the current mirror of a kind of anti-single particle effect of the present utility model, include a NMOS pipe M1 and the 2nd NMOS pipe M2, wherein, the grid of a described NMOS pipe M1 is connected with the grid of the 2nd NMOS pipe M2, the source ground of the source electrode of the one NMOS pipe M1 and the 2nd NMOS pipe M2, the drain electrode of the one NMOS pipe M1 connects the grid of a described NMOS pipe M1 and connects reference current Iref, the electric current that flows through a NMOS pipe M1 is reference current Iref, the auxiliary circuit B that the drain electrode of the 2nd described NMOS pipe M2 connects respectively load C and for eliminating single particle effect, load C affected.

When current mirror is normally worked, the electric current I that flows through the 2nd NMOS pipe M2 and the 2nd NMOS pipe M2 load can accurate mirror image Iref.

The current mirror of a kind of anti-single particle effect of the present utility model is divided into two kinds of mode of operations: when not being subject to single particle effect and affecting, auxiliary circuit is not worked, and this circuit and common current mirror are as broad as long, now flows through the electric current I=Iref of the 2nd NMOS pipe M2 load; When the 2nd NMOS pipe M2 drain electrode (A point) is subject to single particle effect and affects, suppose that the electric current that single particle effect produces is Δ I, flow through the electric current I 2=Iref+ Δ I of the 2nd NMOS pipe M2, now auxiliary circuit work, output size be the electric current of Δ I to A point, the electric current I now flowing through in load load '=I2-Δ I=Iref, still can accurately copy reference current, eliminated the impact of single particle effect on load load, the follow-up mimic channel of this current mirror also can not be subject to the impact of single particle effect.

As shown in Figure 2, described auxiliary circuit B includes a PMOS pipe M4, the 2nd PMOS pipe M5 and the 3rd NMOS pipe M3, and described the 3rd NMOS pipe M3 and the 2nd NMOS pipe M2 are measure-alike.The drain electrode of a described PMOS pipe M4 connects the drain electrode of the 2nd NMOS pipe M2, the source class of the source electrode of the one PMOS pipe M4 and the 2nd PMOS pipe M5 meets power vd D, the grid of the one PMOS pipe M4 is connected with the grid of the 2nd PMOS pipe M5, the drain electrode of the 2nd PMOS pipe M5 connects the grid of the 2nd PMOS pipe M5, the drain electrode of the 2nd PMOS pipe M5 also connects the drain electrode of the 3rd NMOS pipe M3, source electrode and the equal ground connection of grid of the 3rd NMOS pipe M3.

The core concept of Design assistant circuit is that electric charge is shared.Along with device pitch continue reduce, the incident of single particle, may be at multiple adjacent PN junction generation charge-trappings.Suppose that single-particle incident is identical on the impact of adjacent transistor.The 3rd NMOS pipe M3 of auxiliary circuit is measure-alike with the 2nd NMOS pipe M2 that forms current mirror, when layout design, except using common centroid layout, also will make two transistorized drain electrodes very approaching, can maximize so shared charge-trapping.The one PMOS pipe M4, the 2nd PMOS pipe M5 of auxiliary circuit are current mirror form.

While not being subject to single particle effect, the 3rd NMOS pipe M3 grounded-grid in auxiliary circuit, the 3rd NMOS pipe M3 turn-offs, do not have electric current to flow through, a PMOS pipe M4 does not have electric current to flow through yet, and auxiliary circuit is in idle state, and current mirror is normally worked, I=Iref, as broad as long with General Current mirror.When the 2nd NMOS pipe M2 drain electrode (A point) is subject to single particle effect and affect, flowing through the electric current that the 2nd NMOS manages M2 is no longer Iref, also comprises the electric current that is subject to single particle effect to affect generation; The drain electrode of the 2nd NMOS pipe M2 and the 3rd NMOS pipe M3 is very approaching, and because electric charge is shared, the 3rd NMOS pipe M3 can collect the electric charge with the 2nd NMOS pipe M2 equivalent, the 3rd NMOS pipe M3 be subject to single particle effect also can generation current; Suppose that the electric current that now flows through the 2nd NMOS pipe M2 and the 3rd NMOS pipe M3 is Δ I, due to a PMOS pipe M4 and the 2nd PMOS pipe M5 formation current mirror, the electric current that flows through a PMOS pipe M4 is also Δ I.Auxiliary circuit output current Δ I in the time that current mirroring circuit is subject to single particle effect and affects like this, the electric current that flows through the 2nd NMOS pipe M2 is I2=Iref+ Δ I, the electric current that flows through load is I '=I2-Δ I=Iref, eliminated the impact of single particle effect on load load electric current, single particle effect can not affect follow-up mimic channel yet.

Claims

1. the current mirror of an anti-single particle effect, include a NMOS pipe M1 and the 2nd NMOS pipe M2, wherein, the grid of a described NMOS pipe M1 is connected with the grid of the 2nd NMOS pipe M2, the source ground of the source electrode of the one NMOS pipe M1 and the 2nd NMOS pipe M2, the drain electrode of the one NMOS pipe M1 connects the grid of a described NMOS pipe M1 and connects reference current Iref, it is characterized in that the auxiliary circuit (B) that the drain electrode of the 2nd described NMOS pipe M2 connects respectively load (C) and for eliminating single particle effect, load (C) affected.

2. the current mirror of a kind of anti-single particle effect according to claim 1, it is characterized in that, described auxiliary circuit (B) includes a PMOS pipe M4, the 2nd PMOS pipe M5 and the 3rd NMOS pipe M3, the drain electrode of a described PMOS pipe M4 connects the drain electrode of the 2nd NMOS pipe M2, the source class of the source electrode of the one PMOS pipe M4 and the 2nd PMOS pipe M5 meets power vd D, the grid of the one PMOS pipe M4 is connected with the grid of the 2nd PMOS pipe M5, the drain electrode of the 2nd PMOS pipe M5 connects the grid of the 2nd PMOS pipe M5, the drain electrode of the 2nd PMOS pipe M5 also connects the drain electrode of the 3rd NMOS pipe M3, source electrode and the equal ground connection of grid of the 3rd NMOS pipe M3.

3. the current mirror of a kind of anti-single particle effect according to claim 2, it is characterized in that, the 3rd NMOS pipe M3 and the 2nd NMOS pipe M2 of described auxiliary circuit are measure-alike, and layout design use common centroid layout, and the drain electrode of the 3rd NMOS pipe M3 and the 2nd NMOS pipe M2 is close.