CN103687242A - Method for detecting output conduction angle theta of silicon controlled light modulator - Google Patents

Abstract

The invention discloses a method for detecting the output conduction angle theta of a silicon controlled light modulator. The silicon controlled light modulator comprises a non-linear current source connected with the output end of a diode in a full-wave rectifier in parallel. The method includes the steps that a stray capacitance energy storage voltage of the diode in the full-wave rectifier is kept to be zero before the silicon controlled light modulator has output; when the input on the alternating-current side of the full-wave rectifier is close to zero, the stray capacitance energy storage voltage of the diode in the full-wave rectifier is released, and therefore the output conduction angle theta of the silicon controlled light modulator can be accurately detected with small power consumption.

Description

Detect the method for controllable silicon dimmer output conduction angle

Technical field

The invention belongs to electronic technology field, relate to the control of AC/DC LED light modulation and power.More particularly, the present invention relates to a kind of for LED illumination thyristor regulating light signal detection method and related circuit (being a kind of method that detects controllable silicon dimmer output conduction angle).

Background technology

In AC-DC LED controllable silicon tunable optical driving power, by conducting and the cut-off of controllable silicon dimmer, can transmit input power and corresponding light modulation information, export conduction angle.So in general utilization, control power output and the electric current of AC-DC LED controllable silicon tunable optical driving power by detecting the output conduction angle of controllable silicon dimmer.

In prior art, the method that the most simply detects the pulse of output conduction angle is first to detect pulse duration corresponding to output conduction angle, then calculates the ratio in corresponding electric main cycle of pulse duration corresponding to conduction angle; The specific implementation circuit of this detection method is to be completed through voltage comparator by AC-DC full-wave rectifier output voltage, that is to say, when the conduction angle pulse voltage of exporting when described AC-DC full-wave rectifier is greater than the valve level of voltage comparator, voltage comparator output level"1"; When the conduction angle pulse voltage of exporting when described AC-DC full-wave rectifier is less than the valve level of voltage comparator, voltage comparator output level "0"; For the more accurate size that reflects the conduction angle that AC-DC full-wave rectifier is exported with voltage comparator output " 1 " and level "0", the valve level of voltage comparator should be selected lower value; But, in AC-DC full-wave rectifier circuit, there is parasitic electric capacity, energy storage effect due to parasitic electric capacity, when AC-DC full-wave rectifier AC instantaneous voltage value reduces, diode in AC-DC full-wave rectifier is because of the tank voltage effect reverse bias of parasitic electric capacity, so the DC side output of AC-DC full-wave rectifier is by the not input of corresponding its AC.Make the DC side output of AC-DC full-wave rectifier corresponding to the input of its AC, the parasitic capacitance tank voltage effect that will remove diode in AC-DC full-wave rectifier, is about to the input variation that parasitic capacitance tank voltage is followed AC; The most direct way is the output of diode in AC-DC full-wave rectifier and meets a constant current source I _dIS, conventionally, described constant current source I _dISbe greater than I _mIN(I _mINwith this parasitic capacitance size and response time decision); By constant current source I _dISthe parasitic capacitance tank voltage of diode in full-wave rectifier is discharged, thereby the input that makes parasitic capacitance tank voltage follow AC changes.The cost of this method is the power consumption P on current source _dIS, i.e. P _dIS=V _iN* I _dIS, and some other problem makes resulting output waveform can not reflect well the size of conduction angle.

In AC-DC LED controllable silicon tunable optical driving power, the output conduction angle that detects AC-DC full-wave rectifier is key point.And output conduction angle is when pay close attention to be " 1 ", when be " 0 "; The output of not paying close attention to this full-wave rectifier is how accurately to follow the input of AC to change, and just requirement can accurately draw when be " 1 ", when be " 0 ".The present invention is exactly the output conduction angle of managing accurately to detect with as far as possible little power consumption this controllable silicon dimmer, when is " 1 ", when is " 0 ".

Summary of the invention

The technical problem to be solved in the present invention be to provide a kind of as how as far as possible little power consumption accurately detect the method for controllable silicon dimmer output conduction angle.

In order to solve the problems of the technologies described above, the invention provides a kind of method that detects controllable silicon dimmer output conduction angle, comprise full-wave rectification bridge in controllable silicon dimmer and with controllable silicon dimmer in full-wave rectification bridge and the non-linear current source connecing; The parasitic capacitance tank voltage of full-wave rectification bridge before having output, controllable silicon dimmer is remained to zero, and near the input of the AC of full-wave rectification bridge approaches zero time, the parasitic capacitance tank voltage of full-wave rectification bridge is discharged, thereby accurately detect the output conduction angle of controllable silicon dimmer.

As detection controllable silicon dimmer of the present invention being exported to the improvement of the method for conduction angle: described non-linear current source is four side pressure control current source devices, comprise that the detection input G that detects external voltage size is, the output conduction angle of the corresponding controllable silicon dimmer of output cycle square-wave pulse and output control signal end D, current input terminal A and the electric current ground end K of corresponding frequency; Input voltage V at described detection input G _gin the process of 0 increase, the input earth current I of current input terminal A _dISby maximum current I _mAXwith the input voltage V that detects input G _gincrease and reduce; When detecting the input voltage V of input G _gbe greater than cut-in voltage V _fIXtime, the stable state input earth current I of current input terminal A _dISbe zero, output control signal end D output level"1"; Input voltage V at described detection input G _gby cut-in voltage V _fIXin the process reducing, the input earth current I of current input terminal A _dISby the zero input voltage V with detection input G _greduce and increase; When detecting the input voltage V of input G _gequal at 0 o'clock, the stable state input earth current I of current input terminal A _dISreach maximum current I _mAX; Output control signal end D output level "0".

As detection controllable silicon dimmer of the present invention being exported to the further improvements in methods of conduction angle: described non-linear current source comprises high pressure N-channel MOS FET, low pressure P channel mosfet, resistance R 1 and module 1; Described module 1 provides the grid one fixed-bias transistor circuit V of high pressure N-channel MOS FET _bIAS, and by the input voltage V of input detection input G _gsignal shaping is the output control signal D of square-wave pulse output ₁; When detecting the input voltage V of input G _gbe greater than cut-in voltage V _fIXtime, output control signal D ₁for level"1"; When detecting the input voltage V of input G _g=0, output control signal D ₁for level "0".

As detection controllable silicon dimmer of the present invention being exported to the further improvements in methods of conduction angle: non-linear current source comprises high pressure N-channel MOS FET, low pressure P channel mosfet, resistance R 1, resistance R 2, low pressure N-channel MOS FET and module 2; The grid of described high pressure N-channel MOS FET is to be provided or other modes provide fixed-bias transistor circuit V by module 2 _bIAS; Described module 2 is also by input control end V _gsignal be shaped as the output control signal D of square-wave pulse output ₁; Described resistance R 2, low pressure N-channel MOS FET and output control signal D ₁by high pressure N-channel MOS FET, formed output control signal D ₁the switching current I controlling _d; Described module 2 is also controlled low pressure N-channel MOS FET, forms output control signal D ₁the switching current I controlling _d; When detecting the input voltage V of input G _gbe greater than cut-in voltage V _fIXtime, output control signal D ₁for level"1"; When detecting the input voltage V of input G _g=0 o'clock, output control signal D ₁for level "0".

As detection controllable silicon dimmer of the present invention being exported to the further improvements in methods of conduction angle: non-linear current source comprises high pressure N-channel MOS FET, low pressure N-channel MOS FET, resistance R 1 and module 3; Described module 3 also detects input the input voltage V of input G _gsignal through built-in cut-in voltage V _fIXbe shaped as the output control signal D of square-wave pulse output ₁; The grid of described high pressure N-channel MOS FET is the fixed-bias transistor circuit V by module 3 provides or other modes provide _bIAS; Described high pressure N-channel MOS FET, resistance R 1 and low pressure N-channel MOS FET have formed output control signal D by high pressure N-channel MOS FET ₁the switching current I controlling _d; Described module 3 is also controlled low pressure N-channel MOS FET, forms output control signal D ₁the switching current I controlling _d; When detecting the input voltage V of input G _gbe greater than cut-in voltage V _fIXtime, output control signal D ₁for level"1"; When detecting the input voltage V of input G _gbe less than cut-in voltage V _fIXtime, output control signal D ₁for level "0".

As detection controllable silicon dimmer of the present invention being exported to the further improvements in methods of conduction angle: described module 1, module 2 and module 3 all can consist of comparator and logical circuit.

As detection controllable silicon dimmer of the present invention being exported to the further improvements in methods of conduction angle: be provided with hysteresis voltage Δ V in described module 1, module 2 and module 3.

In the method for detection controllable silicon dimmer output conduction angle of the present invention, by the parasitic capacitance tank voltage of full-wave rectification bridge being remained before controllable silicon dimmer has output to zero, and near the input of full-wave rectification bridge AC approaches zero, the parasitic capacitance tank voltage of full-wave rectification bridge is discharged, thereby can accurately detect with as far as possible little power consumption the output conduction angle of controllable silicon dimmer.

Externally, in above process, needed non-linear current source is four side pressure control current source devices (as shown in Figure 1, comprise and detect input G, output control signal end D, current input terminal A and electric current ground end K); Detect input G and detect external voltage size; Output conduction angle and the corresponding frequency of the corresponding controllable silicon dimmer of output control signal end D output cycle square-wave pulse; The another two ends of non-linear current source are current input terminal A and electric current ground end K.Along with detecting the input voltage V of input G _gby 0 increase, the input earth current I of current input terminal A _dISby maximum current I _mAXwith the input voltage V that detects input G _gincrease and reduce (due to the positive feedback effect of loop, this process time is shorter conventionally); When detecting the input voltage V of input G _gbe greater than cut-in voltage V _fIXtime, the stable state input earth current I of current input terminal A _dISbe zero, output control signal end D is output as level"1".Along with detecting the input voltage V of input G _gby cut-in voltage V _fIXreduce the input earth current I of current input terminal A _dISby the zero input voltage V with detection input G _greduce and increase (due to the positive feedback effect of loop, this process time is shorter conventionally); When detecting the input voltage V of input G _gequal at 0 o'clock, the stable state input earth current I of current input terminal A _dISreach maximum current I _mAX; Output control signal end D is output as level "0".

When detecting the input voltage V of input G _gbe greater than cut-in voltage V _fIXtime, output control signal end D is level"1"; The input earth current I of non-linear current source _dISbe zero, the power consumption of corresponding non-linear current source is P _dIS:

P _DIS＝V _IN·I _DIS(V _G＞V _FIX)＝V _IN·0＝0 （1）

In formula, V _iNit is full-wave rectifier output voltage; I _dISbe the input earth current of current source, be 0.

When detecting the input voltage V of input G _gbe less than cut-in voltage V _fIXtime, the input current of non-linear current source is I _dIS(V _g), its corresponding instantaneous power consumption is full-wave rectifier output voltage V _iNfunction P _dIS(V _iN):

$P_{\mathrm{DIS}}\left(V_{\mathrm{IN}}\right)=V_G\·k\·I_{\mathrm{DIS}}\left(V_G\right)=V_{\mathrm{IN}}\·I_{\mathrm{DIS}}\left(\frac{V_{\mathrm{IN}}}{\mathrm{\α}}\right)---\left(2\right)$

In formula, V _gto detect input voltage corresponding to input G; I _dIS(V _g) be with the input voltage V that detects input G _gthe input current of the current source changing; K is full-wave rectifier output voltage V _iNto detecting the input voltage V of input G _gthe inverse of voltage ratio α.

When detecting the input voltage V of input G _g=0 o'clock, the full-wave rectifier output voltage V that it is corresponding _iNalso be zero; The input current of non-linear current source is I _mAX, output control signal end D is level "0"; The power consumption of corresponding non-linear current source is P _dIS:

P _DIS＝V _IN·I _MAX＝0·I _MAX＝0 （3）

Due to input voltage V _gbe greater than cut-in voltage V _fIXand equaling at 0 o'clock, the steady state power consumption of non-linear current source is zero, only input voltage V _g0 to V _fIXbetween in transient process, non-linear current source has the instantaneous power consumption shown in formula (2).Due to the positive feedback effect of loop, the process time of transient process is shorter conventionally, so the average power consumption of non-linear current source is quite low.

Accompanying drawing explanation

Below in conjunction with accompanying drawing, the specific embodiment of the present invention is described in further detail.

Fig. 1 is non-linear current source surface figure of the present invention;

Fig. 2 is non-linear current source and the typical application principle figure that exchanges dimmer (Dimmer);

Fig. 3 is the physical circuit figure mono-of non-linear current source;

Fig. 4 is the physical circuit figure bis-of non-linear current source;

Fig. 5 is the physical circuit figure tri-of non-linear current source;

Fig. 6 is that non-linear current source is applied physical circuit figure mono-with the typical case who exchanges dimmer (Dimmer);

Fig. 7 is that non-linear current source is applied physical circuit figure bis-with the typical case who exchanges dimmer (Dimmer);

Fig. 8 is that non-linear current source is applied physical circuit figure tri-with the typical case who exchanges dimmer (Dimmer);

Fig. 9 is that non-linear current source is applied physical circuit figure tetra-with the typical case who exchanges dimmer (Dimmer);

Figure 10 is that non-linear current source is applied physical circuit figure five with the typical case who exchanges dimmer (Dimmer);

Figure 11 is that non-linear current source is applied physical circuit figure six with the typical case who exchanges dimmer (Dimmer).

Embodiment

Fig. 1～Fig. 2 has provided the method that detects controllable silicon dimmer output conduction angle; Comprise and the output of full-wave rectification bridge the non-linear current source connecing, the parasitic capacitance tank voltage of full-wave rectification bridge before having output, controllable silicon dimmer is remained to zero, and near the input of full-wave rectification bridge AC approaches zero, the parasitic capacitance tank voltage of full-wave rectification bridge is discharged, thereby can accurately detect with as far as possible little power consumption the output conduction angle of controllable silicon dimmer.

Above-described non-linear current source has following characteristic:

Externally, above-described non-linear current source is four side pressure control current source devices (as shown in Figure 1, comprise and detect input G, output control signal end D, current input terminal A and electric current ground end K); Detect input G and detect external voltage size; Output conduction angle and the corresponding frequency of the corresponding controllable silicon dimmer of output control signal end D output cycle square-wave pulse; The another two ends of non-linear current source are current input terminal A and electric current ground end K.

Along with detecting the input voltage V of input G _gby 0 increase, the input earth current I of current input terminal A _dISby maximum current I _mAXwith the input voltage V that detects input G _gincrease and reduce (due to the positive feedback effect of loop, this process time is shorter conventionally); When detecting the input voltage V of input G _gbe greater than cut-in voltage V _fIXtime, the stable state input earth current I of current input terminal A _dISbe zero, output control signal end D is output as level"1".

Along with detecting the input voltage V of input G _gby cut-in voltage V _fIXreduce the input earth current I of current input terminal A _dISby the zero input voltage V with detection input G _greduce and increase (due to the positive feedback effect of loop, this process time is shorter conventionally); When detecting the input voltage V of input G _gequal at 0 o'clock, the stable state input earth current I of current input terminal A _dISreach maximum current I _mAX; Output control signal end D is output as level "0".

Feature from above-described non-linear current source:

When detecting the input voltage V of input G _gbe greater than cut-in voltage V _fIXtime, output control signal end D is level"1"; The input earth current I of non-linear current source _dISbe zero, the power consumption of corresponding non-linear current source is P _dIS:

P _DIS＝V _IN·I _DIS(V _G＞Ｖ _FIX)＝V _IN·0＝0 （1）

In formula, V _iNit is full-wave rectifier output voltage; I _dISbe the input earth current of current source, be 0.

When detecting the input voltage V of input G _gbe less than cut-in voltage V _fIXtime, the input current of non-linear current source is I _dIS(V _g), its corresponding instantaneous power consumption is full-wave rectifier output voltage V _iNfunction P _dIS(V _iN):

$P_{\mathrm{DIS}}\left(V_{\mathrm{IN}}\right)=V_G\·k\·I_{\mathrm{DIS}}\left(V_G\right)=V_{\mathrm{IN}}\·I_{\mathrm{DIS}}\left(\frac{V_{\mathrm{IN}}}{\mathrm{\α}}\right)---\left(2\right)$

In formula, V _gto detect input voltage corresponding to input G; I _dIS(V _g) be with the input voltage V that detects input G _gthe input current of the current source changing; K is full-wave rectifier output voltage V _iNto detecting the input voltage V of input G _gthe inverse of voltage ratio α.

When detecting the input voltage V of input G _g=0 o'clock, the full-wave rectifier output voltage V that it is corresponding _iNalso be zero; The input current of non-linear current source is I _mAX, output control signal end D is level "0"; The power consumption of corresponding non-linear current source is P _dIS:

P _DIS＝V _IN·I _MAX＝0·I _MAX＝0 （3）

Due to input voltage V _gbe greater than cut-in voltage V _fIXand equaling at 0 o'clock, the steady state power consumption of non-linear current source is zero, only input voltage V _g0 to V _fIXbetween in transient process, non-linear current source has the instantaneous power consumption shown in formula (2).Due to the positive feedback effect of loop, the process time of transient process is shorter conventionally, so the average power consumption of non-linear current source is quite low.

The application principle circuit of concrete non-linear current source as shown in Figure 2.

Due to non-linear current source I _dISeffect, the square wave pulse width of output control signal end D output can accurately reflect the output conduction angle of corresponding controllable silicon dimmer, when is " 1 ", when is " 0 ".Output control signal end D is for the control of the power output of subsequent power converter.

Embodiment 1, is as shown in Figure 3 a kind of physical circuit figure (non-linear current source I) of non-linear current source: the main body of non-linear current source comprises high pressure N-channel MOS FET Q1, low pressure P channel mosfet Q2, resistance R 1 and module 1; The grid of high pressure N-channel MOS FET Q1 is the fixed-bias transistor circuit V being provided by module 1 or other modes _bIAS; Module 1 is except providing bias voltage V _bIASoutward, also by the V of input control end _gsignal shaping is the output control signal D of square-wave pulse output ₁.

When detecting the input voltage V of input G _gbe greater than cut-in voltage V _fIXtime, output control signal D ₁for level"1"; When detecting the input voltage V of input G _g=0, output control signal D ₁for level "0", specific as follows:

As seen from Figure 3, the cut-in voltage V of non-linear current source I _fIXbe:

V _FIX＝V _BIAS-V _{N_th}+V _{P_th} (4）

In formula, V _{n_th}it is N-channel MOS FET cut-in voltage; V _{p_th}it is P channel mosfet cut-in voltage.The voltage controlled current I of non-linear current source I _dISexpression formula is:

$I_{\mathrm{DIS}}\left(V_G\right)=\frac{V_{\mathrm{BIAS}}-V_{N\_\mathrm{th}}+V_{P\_\mathrm{th}}-V_G}{R1}---\left(5\right)$

Work as V _gbe greater than V _fIXtime, I _dIS(V _g)=0 (6)

Output control signal D ₁for level"1".

Work as V _g=0, $I_{\mathrm{DIS}}\left(0\right)=I_{\mathrm{MAX}}=\frac{V_{\mathrm{BIAS}}-V_{N\_\mathrm{th}}+V_{P\_\mathrm{th}}}{R1}---\left(7\right)$

Output control signal D ₁for level "0".

Above-described module 1 consists of comparator and logical circuit, is built-in with hysteresis voltage Δ V.

Embodiment 2, is as shown in Figure 4 a kind of physical circuit figure (non-linear current source II) of non-linear current source: non-linear current source II is V _gthe non-linear current source that FEEDBACK CONTROL drives, comprises high pressure N-channel MOS FET Q1, low pressure P channel mosfet Q2, resistance R 1, resistance R 2, low pressure N-channel MOS FET Q3 and module 2; The grid of high pressure N-channel MOS FET is the fixed-bias transistor circuit V by module 2 provides or other modes provide _bIAS; Module 2 is also by input control end V _gsignal be shaped as the output control signal D of square-wave pulse output ₁; Resistance R 2, low pressure N-channel MOS FETQ3 and output control signal D ₁by high pressure N-channel MOS FET Q1, formed output control signal D ₁the switching current I controlling _d; Module 2 is also controlled low pressure N-channel MOS FET Q3, forms output control signal D ₁the switching current I controlling _d.

When detecting the input voltage V of input G _gbe greater than cut-in voltage V _fIXtime, output control signal D ₁for level"1"; When detecting the input voltage V of input G _g=0 o'clock, output control signal D ₁for level "0"; Specific as follows:

As seen from Figure 4, the cut-in voltage V of non-linear current source II _fIXbe:

V _FIX＝V _BIAS-V _{N_th}+V _{P_ｔｈ} （8）

The voltage controlled current I of this non-linear current source II _dISexpression formula is:

$I_{\mathrm{DIS}}\left(V_G\right)=\frac{V_{\mathrm{BLAS}}-V_{N\_\mathrm{th}}+V_{P\_\mathrm{th}}-V_G}{R1}---\left(9\right)$

Work as V _gbe greater than V _fIXtime, I _dIS(V _g)=0 (10)

Output control signal D ₁for level"1".

Work as V _g=0 o'clock, $I_{\mathrm{DIS}}\left(0\right)=\frac{V_{\mathrm{BIAS}}-V_{N\_\mathrm{th}}+V_{P\_\mathrm{th}}}{R1}---\left(11\right)$

Output control signal D ₁for level "0".

The switching current I that output control signal D controls _dexpression formula is:

When D is level"1", I _d=0 (12)

When D is level "0", $I_D=\frac{V_{\mathrm{BIAS}}-V_{N\_\mathrm{th}}}{R2}---\left(13\right)$

So, work as V _g=0 o'clock, $I_{\mathrm{MAX}}=I_{\mathrm{DIS}}\left(0\right)+I_D=\frac{V_{\mathrm{BIAS}}-V_{N\_\mathrm{th}}+V_{P\_\mathrm{<figure-callout\; id="1"\; label="th\; R"\; filenames="HDA0000440032990000013.png,HDA0000440032990000031.png"\; state="\{\{state\}\}">th</figure-callout>}}}{R}+\frac{V_{\mathrm{BIAS}}-V_{N\_\mathrm{th}}}{R2}---\left(14\right)$

Above-described module 2 consists of comparator and logical circuit, is built-in with hysteresis voltage Δ V.

Embodiment 3, is as shown in Figure 5 a kind of physical circuit figure (non-linear current source III) of non-linear current source: non-linear current source III comprises high pressure N-channel MOS FET Q1, low pressure N-channel MOS FET Q2, resistance R 1 and module 3; Module 3 also detects input the input voltage V of input G _gsignal through built-in cut-in voltage V _fIXbe shaped as the output control signal D of square-wave pulse output ₁, the grid of high pressure N-channel MOS FET is the fixed-bias transistor circuit V by module 3 provides or other modes provide _bIAS; High pressure N-channel MOS FET Q1, resistance R 1 and low pressure N-channel MOS FET Q2 have formed output control signal D by high pressure N-channel MOS FET Q1 ₁the switching current I controlling _d; Module 3 is also controlled low pressure N-channel MOS FET Q2, forms output control signal D ₁the switching current I controlling _d.

When detecting the input voltage V of input G _gbe greater than cut-in voltage V _fIXtime, output control signal D ₁for level"1"; When detecting the input voltage V of input G _gbe less than cut-in voltage V _fIXtime, output control signal D ₁for level "0"; Specific as follows:

Work as V _gbe greater than V _fIXtime, I _d=0 (15)

Output control signal D is level"1".

Work as V _gbe less than V _fIXtime, $I_D=\frac{V_{\mathrm{BIAS}}-V_{N\_\mathrm{<figure-callout\; id="1"\; label="th\; R"\; filenames="HDA0000440032990000013.png,HDA0000440032990000031.png"\; state="\{\{state\}\}">th</figure-callout>}}}{R}=I_{\mathrm{MAX}}---\left(16\right)$

Output control signal D is level "0".

Above-described module 3 consists of comparator and logical circuit, is built-in with hysteresis voltage Δ V.In side circuit is realized, owing to detecting the input voltage V of input G _gbe accompanied with interference noise, module 3 is eliminated interference noise by hysteresis voltage Δ V.

Maximum current I _mAXeffect be to make before controllable silicon dimmer opens, the output voltage of full-wave rectifier remains no-voltage.

If the instantaneous output voltage V of full-wave rectifier _iNbe greater than V _fIX* k(k is full-wave rectifier output voltage V _iNto input G voltage V _gvoltage ratio), the input voltage V of the Input voltage terminal G of corresponding non-linear current source _gdo not open the voltage controlled current I of non-linear current source _dIS.Instantaneous output voltage V when full-wave rectifier _iNbe less than V _fIX* k, the input voltage V of the Input voltage terminal G of corresponding non-linear current source _gopen the voltage controlled current I of non-linear current source _dIS.

Input voltage V due to non-linear current source Input voltage terminal G _ginstantaneous output voltage V to full-wave rectifier _iNdetection is through non-linear current source I _dISloop positive feedback regulating action, the input earth current I of non-linear current source _dISalong with the instantaneous output voltage of full-wave rectifier reduces and increases, until it detects the input voltage V of input G _gbe zero, thereby reach maximum current I _mAX; Same non-linear current source input earth current is along with the instantaneous output voltage of full-wave rectifier increases and reduces, until it detects the input voltage V of input G _gbe greater than V _fIX, and be reduced to zero.

Due to the effect of non-linear current source, the instantaneous output voltage of full-wave rectifier is by some difference of the input voltage of the instantaneous AC with corresponding, but the pulse of their correspondences is that assurance is identical.This target that the present invention looks for just.

Owing to detecting the input voltage V of input G _gbe greater than V _fIXwith equal at 0 o'clock, the steady state power consumption of non-linear current source is zero, only detects the input voltage V of input G _g0 to V _fIXbetween in transient process, due to I _mAXonly to be greater than I _mIN(I _mINwith this parasitic capacitance size and response time decision), the instantaneous power consumption P that non-linear current source is limited _dIS; Due to the positive feedback effect of loop, the process time Δ t of this transient process shorter (us level) conventionally, with regard to mains frequency, half period time T/2(ms level) be much larger than Δ t, the average power consumption of non-linear current source is P _{dIS_AVG}quite low.

The output output control signal D of non-linear current source ₁be cycle square wave, due to the effect of full-wave rectifier, its frequency is the frequency multiplication of input civil power; Its pulsewidth is the output conduction angle corresponding to controllable silicon dimmer; This square-wave signal is by the control of the output current for rear class power power pack.

The non-linear current source of the physical circuit one, two, three of corresponding non-linear current source is applied physical circuit figure mono-, two, three, four with the typical case who exchanges dimmer (Dimmer), and five, six respectively as Fig. 6, shown in 7,8,9,10 and 11.At Fig. 9, large current diode D in 10,11 _incan by the rectifier diode of two low currents, be replaced and save.

Finally, it is also to be noted that, what more than enumerate is only a specific embodiment of the present invention.Obviously, the invention is not restricted to above embodiment, can also have many distortion.All distortion that those of ordinary skill in the art can directly derive or associate from content disclosed by the invention, all should think protection scope of the present invention.

Claims (7)

1. detect a method for controllable silicon dimmer output conduction angle, comprise full-wave rectification bridge in controllable silicon dimmer and with controllable silicon dimmer in full-wave rectification bridge and the non-linear current source connecing; It is characterized in that: the parasitic capacitance tank voltage of full-wave rectification bridge was remained to zero before controllable silicon dimmer has output, and near the input of the AC of full-wave rectification bridge approaches zero time, the parasitic capacitance tank voltage of full-wave rectification bridge is discharged, thereby accurately detect the output conduction angle of controllable silicon dimmer.

2. detection controllable silicon dimmer according to claim 1 is exported the method for conduction angle, it is characterized in that: described non-linear current source is four side pressure control current source devices, comprise and detect the detection input G of external voltage size, the output conduction angle of the corresponding controllable silicon dimmer of output cycle square-wave pulse and output control signal end D, current input terminal A and the electric current ground end K of corresponding frequency;

Input voltage V at described detection input G _gin the process of 0 increase, the input earth current I of current input terminal A _dISby maximum current I _mAXwith the input voltage V that detects input G _gincrease and reduce; When detecting the input voltage V of input G _gbe greater than cut-in voltage V _fIXtime, the stable state input earth current I of current input terminal A _dISbe zero, output control signal end D output level"1";

Input voltage V at described detection input G _gby cut-in voltage V _fIXin the process reducing, the input earth current I of current input terminal A _dISby the zero input voltage V with detection input G _greduce and increase; When detecting the input voltage V of input G _gequal at 0 o'clock, the stable state input earth current I of current input terminal A _dISreach maximum current I _mAX; Output control signal end D output level "0".

3. the method for detection controllable silicon dimmer output conduction angle according to claim 2, is characterized in that: described non-linear current source comprises high pressure N-channel MOS FET, low pressure P channel mosfet, resistance R 1 and module 1;

Described module 1 provides the grid one fixed-bias transistor circuit V of high pressure N-channel MOS FET _bIAS, and by the input voltage V of input detection input G _gsignal shaping is the output control signal D of square-wave pulse output ₁;

When detecting the input voltage V of input G _gbe greater than cut-in voltage V _fIXtime, output control signal D ₁for level"1";

When detecting the input voltage V of input G _g=0, output control signal D ₁for level "0".

4. the method for detection controllable silicon dimmer output conduction angle according to claim 2, is characterized in that: non-linear current source comprises high pressure N-channel MOS FET low pressure P channel mosfet, resistance R 1, resistance R 2, low pressure N-channel MOS FET and module 2;

The grid of described high pressure N-channel MOS FET is by module 2 provides or other modes provide fixed-bias transistor circuit V _bIAS;

Described module 2 is also by input control end V _gsignal be shaped as the output control signal D of square-wave pulse output ₁;

Described resistance R 2, low pressure N-channel MOS FET and output control signal D ₁by high pressure N-channel MOS FET, form output control signal D ₁the switching current I controlling _d;

Described module 2 is also controlled low pressure N-channel MOS FET, forms output control signal D ₁the switching current I controlling _d;

When detecting the input voltage V of input G _gbe greater than cut-in voltage V _fIXtime, output control signal D ₁for level"1";

When detecting the input voltage V of input G _g=0 o'clock, output control signal D ₁for level "0".

5. the method for detection controllable silicon dimmer output conduction angle according to claim 2, is characterized in that: non-linear current source comprises high pressure N-channel MOS FET, low pressure N-channel MOS FET, resistance R 1 and module 3;

Described module 3 also detects input the input voltage V of input G _gsignal through built-in cut-in voltage V _fIXbe shaped as the output control signal D of square-wave pulse output ₁;

The grid of described high pressure N-channel MOS FET is the fixed-bias transistor circuit V by module 3 provides or other modes provide _bIAS;

Described high pressure N-channel MOS FET, resistance R 1 and low pressure N-channel MOS FET have formed output control signal D by high pressure N-channel MOS FET ₁the switching current I controlling _d;

Described module 3 is also controlled low pressure N-channel MOS FET, forms output control signal D ₁the switching current I controlling _d;

When detecting the input voltage V of input G _gbe greater than cut-in voltage V _fIXtime, output control signal D ₁for level"1"; When

Detect the input voltage V of input G _gbe less than cut-in voltage V _fIXtime, output control signal D ₁for level "0".

6. according to the method for the detection controllable silicon dimmer output conduction angle described in claim 3,4 and 5, it is characterized in that: described module 1, module 2 and module 3 form by comparator and logical circuit.

7. the method for detection controllable silicon dimmer output conduction angle according to claim 6, is characterized in that: in described module 1, module 2 and module 3, be provided with hysteresis voltage Δ V.

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