CN103684013B - A kind of multi-electrical level inverter SVPWM control method - Google Patents

A kind of multi-electrical level inverter SVPWM control method Download PDF

Info

Publication number
CN103684013B
CN103684013B CN201310694777.8A CN201310694777A CN103684013B CN 103684013 B CN103684013 B CN 103684013B CN 201310694777 A CN201310694777 A CN 201310694777A CN 103684013 B CN103684013 B CN 103684013B
Authority
CN
China
Prior art keywords
coordinate
vector
inverter
control method
level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201310694777.8A
Other languages
Chinese (zh)
Other versions
CN103684013A (en
Inventor
戴鹏
吴斌
张金科
朱茂森
苏良成
吴强
邢履帅
石祥龙
岳悦
王姝洁
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
China University of Mining and Technology CUMT
Original Assignee
China University of Mining and Technology CUMT
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by China University of Mining and Technology CUMT filed Critical China University of Mining and Technology CUMT
Priority to CN201310694777.8A priority Critical patent/CN103684013B/en
Publication of CN103684013A publication Critical patent/CN103684013A/en
Application granted granted Critical
Publication of CN103684013B publication Critical patent/CN103684013B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Inverter Devices (AREA)

Abstract

The invention discloses a kind of multi-electrical level inverter SVPWM control method, belongs to inverter control method.Step is as follows:Phasor coordinate is turned to integer by a. coordinate transform;B. the coordinate of primary Calculation and the nearest even number redundant vectors of reference voltage vector vertex distance;C. the calculated coordinate of institute in step b is corrected;D. reference voltage vector is decomposed;E. polarity judges and action time calculates;F. on off state is calculated and generates inverter driving moving pulse.Beneficial effect is:The control method does not need sector to judge and table look-up, and without trigonometric function and radical sign computing, only need to simply add and subtract multiplying;Directly can pass through simply to be calculated the on off state of each phase, programming code is few, improves system running speed;Can apply to the very little for increasing increase of inverter and amount of calculation with level number of any level.

Description

A kind of multi-electrical level inverter SVPWM control method
Technical field
The present invention relates to a kind of modulation technique in multilevel power electronic inverter field, and in particular to a kind of quick electricity more Flat inverter SVPWM control method.
Background technology
The thought of multi-electrical level inverter proposed by the southern ripple Jiang Zhang et al. of Japanese Chang Gang Universities of Science and Technology most earlier than 1980, it Basic thought be to synthesize staircase waveform by several level steps, to approach sinusoidal output waveform.Multi-electrical level inverter is opened up from circuit Flutter structure to start with, while high-quality output waveform is obtained, overcome the shortcomings of two-level inverter, become without the need for output Depressor and dynamic voltage-balancing, switching frequency are low, and have the series of advantages such as switching device stress is little, system effectiveness is high.
Propose so far, to have defined three class basic topologies and a series of improvement topology from the concept of multi-electrical level inverter. Corresponding, the modulator approach of various multi-electrical level inverters is also suggested and studied.In terms of topology, improved Main way It is to reduce number of devices, solves imbalance of capacitance voltage etc.;In terms of modulation, improved Main way is output waveform performance Optimization and algorithm simplification and the versatility etc. of algorithm.
At present, two the most frequently used class pulse width modulations (Pulse Width Modulation, hereinafter referred to as:PWM) side Method is Carrier-based PWM control method and SVPWM.SVPWM due to higher than Carrier-based PWM control method by about 15% with voltage utilization, Output harmonic wave content is few, it is easy to optimize inverter output performance using redundant vectors, digitlization reality easily the advantages of, enjoy wide Big scholar's concern.When traditional SVPWM is applied to less than three-level inverter, also do not include it is too complicated, but be applied to many level and with When upper, will become sufficiently complex, be difficult to use on multi-electrical level inverter, this will limit multi-electrical level inverter to a certain extent Development.
The content of the invention
It is an object of the invention to solve the defect that above-mentioned prior art is present, there is provided a kind of algorithm is relatively easy, calculating A kind of less big SVPWM control method of fast multilevel inverter of amount.
A kind of multi-electrical level inverter SVPWM control method, the control method are comprised the following steps:
A. three traditional phase coordinate systems are carried out into coordinate transform, turns to the coordinate of all vectors in three dimensional vector diagram whole Number;
B. the coordinate of primary Calculation and the nearest even number redundant vectors of reference voltage vector vertex distance;
C. the calculated coordinate of institute in step b is corrected;
D. reference voltage vector is decomposed;
E. judge the polarity after reference voltage vector decomposition and calculate and three closest vectors of reference voltage vector Action time within a sampling period;
F. calculate under threephase switch state and generate inverter driving according to the polarity and the action time for calculating for judging Moving pulse.
Further, SVPWM control method of fast multilevel inverter as above, the seat in described step (1) Mark conversion, its rule of conversion are as follows:
New coordinate system after conversion is that conventional three-phase coordinate system turns clockwise 30 ° and obtains, the new coordinate system after conversion Represented with ab, bc, ca, if using uab、ubc、ucaAnd ua、ub、ucThe variable under ab-bc-ca and a-b-c coordinate systems is represented respectively, then The transformation relation that the new coordinate systems of ab-bc-ca are tied to from a-b-c coordinates is:
Further, SVPWM control method of fast multilevel inverter as above, it is preliminary in described step b The coordinate with the nearest even number redundant vectors of reference voltage vector vertex distance is calculated, computing formula is as follows:
Cab=floor (uab+0.5)
Cbc=floor (ubc+0.5)
Cca=floor (uca+0.5) (2);
Wherein, Cab、Cbc、CcaIt is the even number redundant vectors nearest with reference voltage vector vertex distance in ab, bc, ca axle Coordinate components;Floor is represented.
Further, SVPWM control method of fast multilevel inverter as above, in described step c to step The calculated coordinate of institute in rapid b is corrected, and its updating formula is as follows:
ui=max (uab,ubc,uca) (3);
Ci=2floor ((ui+even)/2)+odd (4);
If | uj-Cj|>|uk-Ck|, then:Cj=-Ci-Ck(5);
Otherwise, Ck=-Ci-Cj(6);
Wherein, the possibility value of i, j, k be ab, bc, ca;The possibility value of even and odd is 1 or 0, when the electricity of inverter When flat number is even number, even=1, odd=0;When the level number of inverter is odd number, even=0, odd=1.
Further, SVPWM control method of fast multilevel inverter as above, in described step d to ginseng Examining voltage vector carries out decomposing the coordinate for obtaining equivalent two level reference voltages vector, and decomposition method is:
Wi=ui-Ci(7);
Wherein, i=ab, bc, ca.
Further, SVPWM control method of fast multilevel inverter as above, the polarity in described step e Judge and vector action time calculates, concrete grammar is as follows:
Polarity judges:
Wherein, i=ab, bc, ca;
Vector action time calculates:
Wherein, tx、tyTo synthesize the non-zero u of equivalent two level reference voltages vectorx、uyCorresponding action time, tzFor two equivalent zero vector uz1、uz2Action time sum;TsFor the sampling time.
Further, SVPWM control method of fast multilevel inverter as above, the calculating in described step f Threephase switch state simultaneously generates inverter driving moving pulse, such as following formula:
Two equivalent zero vector on off states:
Sz1a=max (0, Cab,-Cca)
Sz1b=max (0, Cbc,-Cab)
Sz1c=max (0, Cca,-Cbc) (10);
Sz2a=Sz1a+1
Sz2b=Sz1b+1
Sz2c=Sz1c+1 (11);
Non-zero on off state:
Sxa=Sz1a;if[(Pab> 0) and (Pca< is 0)] Sxa+=1
Sxb=Sz1b;if[(Pbc> 0) and (Pab< is 0)] Sxb+=1
Sxc=Sz1c;if[(Pca> 0) and (Pbc< is 0)] Sxc+=1 (12);
Sya=Sz1a;if[(Pab> 0) or (Pca< is 0)] Sya+=1
Syb=Sz1b;if[(Pbc> 0) or (Pab< is 0)] Syb+=1
Syc=Sz1c;if[(Pca> 0) or (Pbc< is 0)] Syc+=1 (13);
Generate inverter driving moving pulse:
According to uz1-ux-uy-uz2-uy-ux-uz1Be sequentially generated symmetrical seven segmentations modulated inverter driving pulse, with reduce Inverter output voltage harmonic wave and common-mode voltage.
When the present invention is applied to multi-electrical level inverter for traditional SVPWM control method, algorithm becomes sufficiently complex, calculates A kind of too big shortcoming of amount, there is provided SVPWM control method of fast multilevel inverter, the control method do not need sector judge with Table look-up, without trigonometric function and radical sign computing, only simply add and subtract multiplying;Can be directly each by being simply calculated The on off state of phase, programming code are few, improve system running speed;Can apply to the inverter and amount of calculation of any level The very little for increasing increase of level number therewith.
Description of the drawings
Fig. 1 is the flow chart of SVPWM control method of fast multilevel inverter of the present invention;
Fig. 2 is neutral point clamp H bridge five-electrical level inverter main circuit topologies;
Fig. 3 is five-electrical level inverter three dimensional vector diagram under new coordinate system;
Fig. 4 A be modulation degree be 0.4 when inverter a phase current iaSimulation waveform;
Fig. 4 B be modulation degree be 0.4 when inverter line voltage vabSimulation waveform;
Fig. 5 A be modulation degree be 0.9 when inverter a phase current iaSimulation waveform;
Fig. 5 B be modulation degree be 0.9 when inverter line voltage vabSimulation waveform.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with the accompanying drawing in the present invention, to this Technical scheme in invention is clearly and completely described, it is clear that described embodiment is a part of embodiment of the invention, Rather than the embodiment of whole.Based on the embodiment in the present invention, those of ordinary skill in the art are not making creative labor The every other embodiment obtained under the premise of dynamic, belongs to the scope of protection of the invention.
Fig. 1 is the flow chart of SVPWM control method of fast multilevel inverter of the present invention, as shown in figure 1, the present invention is quick Multi-electrical level inverter SVPWM control method is comprised the following steps:
Step 101:Three traditional phase coordinate systems are carried out into coordinate transform, the coordinate of all vectors in three dimensional vector diagram is made Turn to integer.
Specifically, simplify to allow calculate, three traditional phase coordinate systems are carried out coordinate transform by the present invention, swear space The coordinate of all vectors in spirogram turns to integer.
Step 102:The coordinate of primary Calculation and the nearest even number redundant vectors of reference voltage vector vertex distance.
Specifically, due to, in multi-electrical level inverter, having too high saltus step to prevent output voltage, being typically chosen and ginseng Examine three nearest vectors of voltage vector to be synthesized.The coordinate for calculating even number redundant vectors is selected to be because, with even number redundancy Little hexagon (i.e. equivalent two level space vectors figure) centered on vector will not produce larger overlap each other, be easy to ginseng Examine the judgement of voltage vector position.
Step 103:To step:The calculated coordinate of institute in 102 is corrected.
Specifically, in order to prevent the calculated coordinate in step 102 from calculating error, the present invention is to calculated seat Mark is corrected.
Step 104:Reference voltage vector is decomposed.
Specifically, decomposition mentioned here is exactly subtraction, its objective is for reference voltage vector to be converted into equivalent two Level reference voltage vector, so as to multi-electrical level inverter SVPWM is converted into simple two level SVPWM, below step is all It is to come around two level SVPWMs.
Step 105:Judgement is examined the polarity after voltage vector decomposes and calculates three closest with reference voltage vector Action time of the vector within a sampling period.
Specifically, polarity judgement here, is to realize two level SVPWM provides convenients in order to following.
Step 106:According to the polarity and action time for calculating for judging is in threephase switch state computation and generates inversion Device driving pulse.
Fig. 2 is neutral point clamp H bridge five-electrical level inverter main circuit topologies, as shown in Fig. 2 per being made up of a H bridge, often Individual H bridges are made up of two three level bridge arms, and each bridge arm has 4 switching devices (containing fly-wheel diode), can export Vdc/2、 0、-Vdc/ 2 three level, two or three level bridge arm output voltage of left and right subtract each other and can obtain Vdc、Vdc/2、0、-Vdc/2、-VdcFive Level.5 can so be obtained3=125 voltage vectors, which is based on the three dimensional vector diagram under new coordinate system as shown in figure 3, Fig. 3 It is five-electrical level inverter three dimensional vector diagram under new coordinate system.
With reference to the control method flow chart of Fig. 1, by taking neutral point clamp H bridge five-electrical level inverters as an example, the tool of the present invention is illustrated Body implementation steps:
A. three traditional phase coordinate systems are carried out into coordinate transform, turns to the coordinate of all vectors in three dimensional vector diagram whole Number, as shown in Figure 3;
Its rule of conversion is as follows:
New coordinate system after conversion is that conventional three-phase coordinate system turns clockwise 30 ° and obtains, the new coordinate system after conversion Represented with ab, bc, ca, if using uab、ubc、ucaAnd ua、ub、ucThe variable under ab-bc-ca and a-b-c coordinate systems is represented respectively, then The transformation relation that the new coordinate systems of ab-bc-ca are tied to from a-b-c coordinates is:
B. the coordinate of primary Calculation and the nearest even number redundant vectors of reference voltage vector vertex distance;
Computing formula is as follows:
Wherein, Cab、Cbc、CcaIt is the even number redundant vectors nearest with reference voltage vector vertex distance in ab, bc, ca axle Coordinate components;Floor is represented;
C. the calculated coordinate of institute in step b is corrected;
Its updating formula is as follows:
ui=max (uab,ubc,uca) (3);
Ci=2floor ((ui+even)/2)+odd (4);
If | uj-Cj|>|uk-Ck|, then Cj=-Ci-Ck(5);
Otherwise Ck=-Ci-Cj(6);
Wherein, the possibility value of i, j, k be ab, bc, ca;The possibility value of even and odd is 1 or 0, when the electricity of inverter When flat number is even number, even=1, odd=0;When the level number of inverter is odd number, even=0, odd=1;Here, being five Level, so, even=0, odd=1;As shown in figure 3, now VrefIt is closest with vector (1,2, -3), so, Cab=1, Cbc=2, Cca=-3;
D. reference voltage vector is decomposed;
Reference voltage vector is decomposed to obtain the coordinate of equivalent two level reference voltages vector,
Decomposition method is:
Wi=ui-Ci(7);
Wherein, i=ab, bc, ca;
E. polarity judges and action time calculates;
Concrete grammar is as follows:
Polarity judges:
Wherein, i=ab, bc, ca;
Vector action time calculates:
Wherein, tx、tyTo synthesize the non-zero u of equivalent two level reference voltages vectorx、uyCorresponding action time, tzFor two equivalent zero vector uz1、uz2Action time sum;TsFor the sampling time;
F. on off state is calculated and generates inverter driving moving pulse.
Such as following formula:
Two equivalent zero vector on off states:
Non-zero on off state:
Generate inverter driving moving pulse:
According to uz1-ux-uy-uz2-uy-ux-uz1Be sequentially generated symmetrical seven segmentations modulated inverter driving pulse, with reduce Inverter output voltage harmonic wave and common-mode voltage.
Fig. 4 A be modulation degree be 0.4 when inverter a phase current iaSimulation waveform, Fig. 4 B be modulation degree be 0.4 when inversion Device line voltage vabSimulation waveform, Fig. 5 A be modulation degree be 0.9 when inverter a phase current iaSimulation waveform, Fig. 5 B are modulation Spend for 0.9 when inverter line voltage vabSimulation waveform.As shown in Fig. 4 A, 4B, 5A, 5B, simulation parameter is:Vdc=300V, directly Bus derided capacitors capacity is flowed for 4700 μ F, three-phase symmetrical resistance sense load R=10, L=15mH;Sample frequency is 5kHz.Emulation As a result the correctness and feasibility of many level SVPWM control methods of the present invention are illustrated.
Finally it should be noted that:Above example only to illustrate technical scheme, rather than a limitation;Although With reference to the foregoing embodiments the present invention has been described in detail, it will be understood by those within the art that:Which still may be used To modify to the technical scheme described in foregoing embodiments, or equivalent is carried out to which part technical characteristic; And these modification or replace, do not make appropriate technical solution essence depart from various embodiments of the present invention technical scheme spirit and Scope.

Claims (6)

1. a kind of multi-electrical level inverter SVPWM control method, it is characterised in that the control method is comprised the following steps:
A. three traditional phase coordinate systems are carried out into coordinate transform, makes the coordinate of all vectors in three dimensional vector diagram turn to integer;
B. the coordinate of primary Calculation and the nearest even number redundant vectors of reference voltage vector vertex distance;
C. the calculated coordinate of institute in step b is corrected, its updating formula is as follows:
ui=max (uab,ubc,uca) (3);
Ci=2floor ((ui+even)/2)+odd (4);
If | uj-Cj|>|uk-Ck|, then:Cj=-Ci-Ck(5);
If | uj-Cj|>|uk-Ck|, then:Ck=-Ci-Cj(6);
Wherein, the possibility value of i, j, k be ab, bc, ca;Even and odd values are 1 or 0, when the level number of inverter is even number When, even=1, odd=0;When the level number of inverter is odd number, even=0, odd=1;uab、ubc、ucaRepresent through sitting Coordinate system after mark conversion, i.e. variable under ab-bc-ca coordinate systems;uiFor uab、ubc、ucaIn maximum, CiFor corrected Coordinate of the even number redundant vectors nearest with reference voltage vector vertex distance under new coordinate system ab-bc-ca afterwards;floor() Represent downward bracket function;
D. reference voltage vector is decomposed;
E. judge to decompose the equivalent two level reference voltages vector W of gainediPolarity and calculate three vectors closest with which Action time within a sampling period;
F. carry out threephase switch state computation and generate inverter driving artery according to the polarity and the action time for calculating for judging Punching.
2. a kind of multi-electrical level inverter SVPWM control method according to claim 1, it is characterised in that described step a In coordinate transform, its rule of conversion is as follows:
New coordinate system ab-bc-ca after conversion is that conventional three-phase coordinate system a-b-c turns clockwise 30 ° and obtains, after conversion New coordinate system is represented with ab, bc, ca, if using uab、ubc、ucaAnd ua、ub、ucRepresented under ab-bc-ca and a-b-c coordinate systems respectively Variable, then the transformation relation for being tied to the new coordinate systems of ab-bc-ca from a-b-c coordinates is:
u a b u b c u c a = 1 - 1 0 0 1 - 1 - 1 0 1 u a u b u c - - - ( 1 ) .
3. a kind of multi-electrical level inverter SVPWM control method according to claim 1, it is characterised in that described step b In primary Calculation and the nearest even number redundant vectors of reference voltage vector vertex distance coordinate, computing formula is as follows:
Cab=floor (uab+0.5)
Cbc=floor (ubc+0.5)
Cca=floor (uca+0.5) (2);
Wherein, Cab、Cbc、CcaIt is through the even number redundancy arrow nearest with reference voltage vector vertex distance obtained by primary Calculation Measure the coordinate components in ab, bc, ca axle;Floor () represents downward bracket function.
4. a kind of multi-electrical level inverter SVPWM control method according to claim 1, it is characterised in that described step d In decomposition that reference voltage vector is carried out obtain the equivalent two level reference voltages vector W under new coordinate systemi, decomposition method For:
Wi=ui-Ci(7);
Wherein, i=ab, bc, ca;CiExist for the nearest even number redundant vectors of corrected rear and reference voltage vector vertex distance Coordinate under new coordinate system ab-bc-ca.
5. a kind of multi-electrical level inverter SVPWM control method according to claim 1, it is characterised in that described step e In polarity judge and vector action time calculates that concrete grammar is as follows:
Polarity judges:
P i = 1 , W i > 0 ; - 1 , W i ≤ 0. - - - ( 8 ) ;
Wherein, i=ab, bc, ca;
Vector action time calculates:
t x = - ( P c a · W a b + P a b · W b c + P b c · W c a ) · T s / 2 t y = - ( P b c · W a b + P c a · W b c + P a b · W c a ) · T s / 2 t z = T s - t x - t y - - - ( 9 ) ;
Wherein, tx、tyTo synthesize equivalent two level reference voltages vector WiTwo non-zero ux、uyDuring corresponding effect Between, tzIt is the equivalent two level reference voltages vector W of synthesisiTwo equivalent zero vector uz1、uz2Action time sum;TsTo adopt The sample time.
6. a kind of multi-electrical level inverter SVPWM control method according to claim 1, it is characterised in that described step f In calculating threephase switch state and generate inverter driving moving pulse, such as following formula:
Two equivalent zero vector on off states:
S z 1 a = max ( 0 , C a b , - C c a ) S z 1 b = max ( 0 , C b c , - C c b ) S z 1 c = max ( 0 , C c a , - C b c ) - - - ( 10 ) ;
S z 2 a = S z 1 a + 1 S z 2 b = S z 1 b + 1 S z 2 c = S z 1 c + 1 - - - ( 11 ) ;
Non-zero on off state:
S x a = S z 1 a ; i f &lsqb; ( P a b > 0 ) a n d ( P c a < 0 ) &rsqb; S x a = S x a + 1 S x b = S z 1 b ; i f &lsqb; ( P b c > 0 ) a n d ( P a b < 0 ) &rsqb; S x b = S x b + 1 S x c = S z 1 c ; i f &lsqb; ( P c a > 0 ) a n d ( P b c < 0 ) &rsqb; S x c = S x c + 1 - - - ( 12 ) ;
S y a = S z 1 a ; i f &lsqb; ( P a b > 0 ) o r ( P c a < 0 ) &rsqb; S y a = S y a + 1 S y b = S z 1 b ; i f &lsqb; ( P b c > 0 ) o r ( P a b < 0 ) &rsqb; S y b = S y b + 1 S y c = S z 1 c ; i f &lsqb; ( P c a > 0 ) o r ( P b c < 0 ) &rsqb; S y c = S y c + 1 - - - ( 13 ) ;
Generate inverter driving moving pulse:
According to uz1-ux-uy-uz2-uy-ux-uz1Be sequentially generated symmetrical seven segmentations modulated inverter driving pulse, to reduce inversion Device harmonic wave of output voltage and common-mode voltage, wherein:uz1、uz2Represent the equivalent null vector of the equivalent two level reference voltages vector of synthesis Amount, ux、uyRepresent two non-zeros of the equivalent two level reference voltages vector of synthesis.
CN201310694777.8A 2013-12-17 2013-12-17 A kind of multi-electrical level inverter SVPWM control method Expired - Fee Related CN103684013B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201310694777.8A CN103684013B (en) 2013-12-17 2013-12-17 A kind of multi-electrical level inverter SVPWM control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201310694777.8A CN103684013B (en) 2013-12-17 2013-12-17 A kind of multi-electrical level inverter SVPWM control method

Publications (2)

Publication Number Publication Date
CN103684013A CN103684013A (en) 2014-03-26
CN103684013B true CN103684013B (en) 2017-04-05

Family

ID=50320570

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201310694777.8A Expired - Fee Related CN103684013B (en) 2013-12-17 2013-12-17 A kind of multi-electrical level inverter SVPWM control method

Country Status (1)

Country Link
CN (1) CN103684013B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104883087B (en) * 2015-05-04 2017-09-22 长安大学 A kind of multi-electrical level inverter universal pulse width modulating method
CN109149983B (en) * 2018-09-06 2020-03-17 西南交通大学 Three-dimensional coordinate system-based rapid three-phase space vector modulation method
CN112803809B (en) * 2021-01-29 2022-03-29 南昌工程学院 Multi-level converter SVM method for rapidly determining basis vector based on S-K

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103248304A (en) * 2013-04-23 2013-08-14 河南科技大学 Tri-level inversion indirect vector control system based on simplified SVPWM (space vector pulse width modulation)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7821224B2 (en) * 2008-04-10 2010-10-26 Tesla Motors, Inc. Voltage estimation feedback of overmodulated signal for an electrical vehicle

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103248304A (en) * 2013-04-23 2013-08-14 河南科技大学 Tri-level inversion indirect vector control system based on simplified SVPWM (space vector pulse width modulation)

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
基于FPGA的模块化多电平变换器控制策略研究;李小强等;《电气传动》;20121231;第42卷(第11期);第66页 *
基于线电压坐标系的ANPC-5L逆变器SVPWM算法的研究;谭国俊等;《中国电机工程学报》;20131025;第33卷(第30期);第28-33页 *

Also Published As

Publication number Publication date
CN103684013A (en) 2014-03-26

Similar Documents

Publication Publication Date Title
CN107465359B (en) Circulating current restraining method and device of modular multilevel converter
CN101394089B (en) Control method for three phase active electric power filter to output current wave
CN104811119B (en) A kind of frequency converter dead area compensation voltage self-learning method
JP2015154532A (en) Control device for ac motor
JP2014018015A (en) Control device and control method of voltage type power conversion apparatus
Nathenas et al. A new approach for SVPWM of a three-level inverter-induction motor fed-neutral point balancing algorithm
CN104883087B (en) A kind of multi-electrical level inverter universal pulse width modulating method
CN104270062A (en) Three-phase H-bridge driving system for open type winding induction motor
CN106546851B (en) Stability control method and device for MMC converter valve operation test circuit
CN104253556B (en) A kind of segmentation SVPWM method of five-electrical level inverter seven
CN103684013B (en) A kind of multi-electrical level inverter SVPWM control method
CN109039133A (en) A kind of pulse-width modulation method and device based on equivalent zero vector
CN104320013A (en) Double-inverter common-mode voltage restraining method based on 60-degree coordinate system
CN102723877A (en) Space vector modulation method of four-leg converter based on classification algorithm and apparatus thereof
CN104660082A (en) Method for analyzing output voltage harmonics of three-level converter
CN104716856B (en) Modular multi-level converter model predictive control method
CN106787805A (en) The bridge arm dual stage matrix converter Carrier-based PWM control strategy of five phase six under unbalanced load
CN104660135B (en) SVPWM method based on 120 ° of AB coordinate systems
Lopatkin Voltage source multilevel inverter voltage quality comparison under multicarrier sinusoidal PWM and space vector PWM of two delta voltages
Saribulut et al. Vector-based reference location estimating for space vector modulation technique
CN103715926B (en) A kind of space vector pulse width modulation method based on mapping principle
CN104410255A (en) Construction method of Fourier equation for three-level selected harmonic elimination pulse width modulation
CN103888008B (en) Eliminate based on particular harmonic and the multi-electrical level inverter modulator approach of addition of waveforms
CN106329967A (en) PWM rectifier model prediction method and device based on fixed vector synthesis
CN115459621A (en) Space vector modulation method and system of asymmetric quasi-Z-source three-level inverter

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
CB02 Change of applicant information

Address after: 221116 Research Institute of China University of Mining and Technology,, Jiangsu

Applicant after: China University of Mining & Technology

Address before: The southern suburbs of Jiangsu city in Xuzhou province 221000 Zhaishan

Applicant before: China University of Mining & Technology

CB02 Change of applicant information
GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20170405

Termination date: 20171217

CF01 Termination of patent right due to non-payment of annual fee