CN103682175B - Form method and the semiconductor structure including there is the structure of the OLED display of semiconductor drive circuit - Google Patents
Form method and the semiconductor structure including there is the structure of the OLED display of semiconductor drive circuit Download PDFInfo
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- CN103682175B CN103682175B CN201310435444.3A CN201310435444A CN103682175B CN 103682175 B CN103682175 B CN 103682175B CN 201310435444 A CN201310435444 A CN 201310435444A CN 103682175 B CN103682175 B CN 103682175B
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/1201—Manufacture or treatment
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10K71/80—Manufacture or treatment specially adapted for the organic devices covered by this subclass using temporary substrates
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- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Electroluminescent Light Sources (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The present invention relates to be formed method and the semiconductor structure of the structure of the OLED display including having semiconductor drive circuit.Peeling is used to produce single-crystal semiconductor layer.In single crystal semiconductor substrate, complementary metal oxide semiconductors (CMOS) (CMOS) logic and memory part was formed before peeling off.Organic Light Emitting Diode (OLED) drive circuit, solar battery cell, sensor, battery etc. can be formed before or after peeling off.The single-crystal semiconductor layer peeled off can be transferred to substrate.OLED display can be formed in the single-crystal semiconductor layer of peeling, to realize such structure: this structure includes the OLED display with semiconductor drive circuit and other function element being integrated on described single-crystal semiconductor layer.
Description
Technical field
It relates to the method forming semiconductor structure, partly lead more particularly, to formation is such
The method of body structure: this semiconductor structure includes that being integrated in having in same single crystal semiconductor substrate has
The OLED display of machine light emitting diode (OLED) drive circuit, logic and memory part and
Other function element.The disclosure further relates to the semiconductor structure using disclosed method to be formed.
Background technology
In recent years, notebook and the mobile message of PDA(Personal Digital Assistant) and telecommunications are such as calculated
Device experienced by quickly development.This device is just becoming lighter and more efficient.Recently, FPD
Device just becoming increasingly prevalent for these devices.Currently, liquid crystal display (LCD) is used as
Flat-panel monitor, but LCD has some shortcomings, such as, need background illumination and wired regarding
Angle.
Except liquid crystal, Organic Light Emitting Diode so-called " organic LED " or " OLED " are also
Can be used in flat-panel monitor.Have compared with this OLED with LCD higher luminous efficiency with
And the visual angle increased.The essential characteristic of OLED is the electroluminescent of specific organic material.Described specific
Organic material determines the color of the light launched by corresponding OLED, i.e. wavelength with first approximation.
Typical OLED includes the substrate being generally made up of glass or similar transparent material.Anode layer
It is positioned on substrate.Anode layer can be made up and for visible ray of the material with relatively high work function
It it is substantially transparent.Typical material for anode layer is indium tin oxide (ITO).Electroluminescent
Material layer is positioned on anode layer, as the emission layer of organic OLED.For forming the common of emission layer
Material is the most such as p-phenylene vinylene (PPV) and picture three (8-hydroxyquinoline) aluminium (Alq3) such
Molecule.In the case of molecule, if emission layer typically comprises dried layer molecule.There is relatively low work function
The cathode layer of material (such as aluminium (Al), calcium (Ca) or magnesium (Mg)) be positioned on emission layer.
During the operation of OLED, cathode layer and anode layer are connected to power supply.
The general principle of electroluminescent general principle and therefore OLED is as follows: anode layer and negative electrode
Layer injects electric charge carrier, i.e. electronics and hole in emission layer.In emission layer, electric charge carrier
It is transported and the electric charge carrier of opposite charge forms so-called exciton, i.e. excited state.Exciton leads to
Cross generation light and radiative decay is to ground state.The most produced light is passed through by such as ITO by OLED
The anode layer made of transparent material launch.The color of produced light depends on the material for organic layer
Material.
Furthermore it is known that so-called multilayer OLED.Multilayer OLED includes multiple cathode layer and/or many
Individual organic layer and/or multiple anode layer.By use multiple organic layers, the efficiency of OLED with include list
The organic LED of individual organic layer compares increase.Interface between two organic layers of multiple organic layers for
At least one charge carrier type can serve as reducing the obstacle of the electric current flowing through diode
(barrier).Therefore, at least one charge carrier type described described interface assemble and
Therefore the probability of recombination in electronics and hole increases, and obtains the OLED of higher efficiency.
Summary of the invention
Provide a kind of cost-effective method, the method by the most such as logic (logic), deposit
The various electronic function devices (function) of reservoir, solar battery cell, battery and/or sensor
While being integrated on monolithic semiconductor material with OLED display, improve OLED and drive electricity
The performance on road.Especially, the disclosure utilize peel off (spalling) with produce peel off comprise for
The semi-conducting material of the drive circuit of OLED display, the most integrated include such as logic, memory,
A lot of function elements of sensor, battery and/or solar battery cell.The driving of OLED display
Circuit is improved, and has bigger driving electric current and longer life-span.Therefore by using the disclosure
Method so that the single-chip integration of logic, memory and other device is possibly realized.
Specifically, peeling is used to produce single-crystal semiconductor layer.Served as a contrast at single crystal semiconductor before peeling off
Complementary metal oxide semiconductors (CMOS) (CMOS) logic and memory part is formed at the end.Can peel off
Before or after form OLED drive, solar battery cell, sensor, battery etc..Stripping
The single-crystal semiconductor layer fallen can be transferred to substrate.OLED display can be formed at the list of peeling
To realize such structure in polycrystal semiconductor layer: this structure includes being integrated on described single-crystal semiconductor layer
The OLED display with semiconductor drive circuit and other function element.
In an aspect of this disclosure, it is provided that a kind of formation includes having semiconductor drive circuit
The method of the structure of OLED display.Disclosed method includes providing single crystal semiconductor substrate, should
Single crystal semiconductor substrate has at least logic sum on the exposed surface being formed at this single crystal semiconductor substrate
Memory device.The described single crystal semiconductor of at least logic and memory part described in being then formed on
Sealer is formed on the exposed surface of substrate.Then above described sealer, form stress
Active layer and perform peeling afterwards.This peeling provides the single-crystal semiconductor layer peeled off, the monocrystalline of this peeling
Semiconductor layer has the described at least logic and memory part being positioned on its surface.Substrate is formed at institute
State peeling single-crystal semiconductor layer with have be positioned at thereon described in the table of at least logic and memory part
On the surface that face is contrary.It follows that on the single-crystal semiconductor layer of described peeling and with described at least
Logic and memory part is adjacent to form Organic Light Emitting Diode (OLED) display.
Other side in the disclosure, it is provided that a kind of semiconductor structure.This semiconductor structure includes list
Polycrystal semiconductor layer, described single-crystal semiconductor layer has in the part being positioned at this single-crystal semiconductor layer
OLED display and the CMOS logic that is positioned on another part of this single-crystal semiconductor layer and deposit
Memory device, described OLED display has (underlying) OLED drive underlied.
Accompanying drawing explanation
Fig. 1 is the list that (passing through viewgraph of cross-section) exemplifies the first method embodiment according to the disclosure
The diagram of brilliant Semiconductor substrate, this single crystal semiconductor substrate at least includes that the OLED manufactured thereon drives
Dynamic circuit and logic and memory part.
Fig. 2 is that (passing through viewgraph of cross-section) exemplifies shape on the exposed surface of single crystal semiconductor substrate
Become after sealer and above sealer, form the structure of Fig. 1 after stressor layer
Diagram.
Fig. 3 is that (passing through viewgraph of cross-section) exemplifies formation process substrate above stressor layer
The diagram of the structure of the Fig. 2 after (handle substrate) and after peeling off.
Fig. 4 is that (passing through viewgraph of cross-section) exemplifies the bottommost table at the single-crystal semiconductor layer peeled off
The diagram of the structure of Fig. 3 after substrate is formed on face.
Fig. 5 is that (passing through viewgraph of cross-section) exemplifies described from the single-crystal semiconductor layer removal peeled off
The diagram of the structure of the Fig. 4 after process substrate, stressor layer and sealer.
Fig. 6 is the diagram of the structure exemplified by Fig. 5, it is shown that along and into and stretch out the plane of paper
The OLED drive irised out in region.
Fig. 7 A be according to the disclosure wherein provide have bottom-emitting OLED display embodiment,
Exposed portion at the single-crystal semiconductor layer of the etching described peeling between adjacent OLED drive
The diagram of the structure exemplified by Fig. 6 after/.
Fig. 7 B is the diagram in the structure formed exemplified by Fig. 7 A after bottom transparent electrodes.
Fig. 7 C is being formed with the knot exemplified by Fig. 7 B after electroluminescent material and top electrodes
The diagram of structure.
Fig. 8 is the enforcement wherein providing the OLED display with top-emission according to the disclosure
Shown in example, Fig. 6 after deposited bottom electrode, electroluminescent organic material and top transparent electrode
The diagram of the structure of example.
Fig. 9 is the list that (passing through viewgraph of cross-section) exemplifies the second method embodiment according to the disclosure
The diagram of brilliant Semiconductor substrate, this single crystal semiconductor substrate includes the logic and memory manufactured thereon
Part.
Figure 10 is that (passing through viewgraph of cross-section) exemplifies shape on the exposed surface of single crystal semiconductor substrate
Become after sealer and above described sealer, form Fig. 9's after stressor layer
The diagram of structure.
Figure 11 is that (passing through viewgraph of cross-section) exemplifies above stressor layer after formation processes substrate
And the diagram of the structure of the Figure 10 after peeling off.
Figure 12 is that (passing through viewgraph of cross-section) exemplifies the bottommost table at the single-crystal semiconductor layer peeled off
The diagram of the structure of Figure 11 after substrate is formed on face.
Figure 13 is that (passing through viewgraph of cross-section) exemplifies described from the single-crystal semiconductor layer removal peeled off
The diagram of the structure of the Figure 12 after process substrate, stressor layer and sealer.
Figure 14 is that (passing through viewgraph of cross-section) exemplifies after forming other function element optional also
And the diagram of the structure at the Figure 13 formed after OLED drive.
Figure 15 is the diagram that (passing through top-down view) exemplifies the semiconductor structure according to the disclosure,
What this semiconductor structure included being integrated on same single-crystal semiconductor layer has OLED drive
OLED display, CMOS logic and memory device and other function element.
Detailed description of the invention
It is more fully described referring now to the accompanying drawing of discussed below and the application and provides for being formed
The disclosure of the method for semiconductor structure, has OLED drive in described semiconductor structure
OLED display, CMOS logic and memory device and other function element are integrated in same
In single crystal semiconductor substrate.Noting, the accompanying drawing of the application has been merely the purpose of example and provides,
Therefore they not drawn on scale.In accompanying drawing and description below, similar material Like
Mark refers to.For following description, word " on ", D score, " right ", " left ", " vertically ", " water
Flat ", " top ", " bottom " and derivative thereof should relate to being orientated in the drawing of the present application parts,
Layer and/or material.
In the following description, elaborate substantial amounts of specific detail, the most concrete structure, parts,
Material, size, process step and technology, in order to the understanding thoroughly to the present invention is provided.But,
It will be appreciated by the skilled addressee that the disclosure can in the case of there is no these specific detail with
Feasible alternative process option is implemented.In other cases, known structure or place are not described in detail
Reason step, in order to avoid making the various embodiments of the disclosure smudgy.
The such as electronic module of display, logic, memory, battery, sensor etc. is usually spaced apart by system
Make and connect together to realize electronic system.This it is configured with shortcoming.Such as, OLED shows
Device is driven by thin film transistor (TFT) based on non-crystalline silicon or polysilicon (TFT).But, these technology have
(the driving electric current of non-crystalline silicon is little and the life-span is short for shortcoming；Polysilicon needs accurate technology controlling and process and phase
Treatment temperature to high) and can improve with the monocrystalline silicon drive circuit increasing cost.Equally, patrol
Volume and memory be formed on silicon single crystal wafer and can not be with display and other function element monolithic collection
Become.This mixed method makes system be less than efficient and add packaging cost.Additionally,
Along with touch-screen display becomes more and more important in an electronic as man-machine interface, need cost
Effective manner improve OLED drive performance and by various electronic function devices with
OLED display is integrated on monolithic semiconductor material.
With reference first to Fig. 1, the single crystal semiconductor illustrating the first method embodiment according to the disclosure serves as a contrast
The end 10, this single crystal semiconductor substrate 10 at least includes the OLED drive 12 manufactured thereon
And logic and memory part 14.Single crystal semiconductor substrate 10 can also include being also formed in thereon
Other function element, such as sensor, battery and/or solar battery cell.In FIG, element
15 represent these other function elements that can manufacture in single crystal semiconductor substrate 10.
Note, although figure shows OLED drive 12, logic and memory part 14 and
Other function element 15 is positioned at substrate 10, it will be appreciated, however, by one skilled in the art that OLED drives
Dynamic circuit 12, logic and memory part 14 and other function element can be located at single crystal semiconductor substrate
On the surface of 10 and/or interior.The figure of the disclosure merely provides these function elements and is likely to be present in monocrystalline
The expression of the position in Semiconductor substrate 10.
The term " monocrystalline " being used in combination with term single crystal semiconductor substrate 10 represents the most whole sample
Lattice until the edge of sample is continuous print and unbroken, without crystal boundary.Can be at this
The single crystal semiconductor substrate 10 used in Gong Kai includes its fracture toughness less than the stress riser described subsequently
The semi-conducting material of the fracture toughness of material.Fracture toughness is to describe the Resisting fractre of the material comprising crackle
The characteristic of ability.Fracture toughness is labeled as KIc.Subscript Ic represents that the normal direction being perpendicular to crackle is opened
The I mode-Ⅲ crack opened under stress, and c means that it is critical value.I type fracture toughness is typically
Most important value, this is because the fracture of peeling type usually occurs in II type stress (shearing) in substrate
It is the position of zero, and generally the most there is not type III stress (tear).Fracture
Toughness be express when there is crackle material for the quantitative manner of the resistance of brittle fracture.
The semi-conducting material of single crystal semiconductor substrate 10 can include, but are not limited to Si, Ge, SiGe,
SiGeC, SiC, Ge alloy, GaSb, GaP, GaAs, InAs, InP and all other
III-V or II-VI compound semiconductor.Typically, single crystal semiconductor substrate 10 is made up of silicon.?
In some embodiments, single crystal semiconductor substrate 10 is semiconductor material body.In other embodiments, single
Brilliant Semiconductor substrate 10 can include stacked semiconductor material, the most such as semiconductor-on-insulator or poly-
Compound substrate semiconductor-on-insulator.Can act as the semiconductor-on-insulator substrate of single crystal semiconductor substrate 10
Illustrative example includes silicon-on-insulator and sige-on-insulator.
Single crystal semiconductor substrate 10 can be doping, unadulterated or comprise doped region and undoped p
Region.
OLED drive 12, logic and memory part 14 and the most such as sensor, battery
And/or other function element 15 of solar battery cell can use and well known to a person skilled in the art
Technology is formed.Disclosed method can be utilized will to include OLED drive 12, logic and storage
The top of the substrate 10 of device 14 and other function element 15 is from single crystal semiconductor substrate 10
Remainder is removed.
Running through the disclosure uses term " OLED drive " to represent and utilize such as thin film transistor (TFT)
(TFT) element deposition and by photoetching and etching routine techniques that these elements are patterned
The network of the TFT formed, i.e. array.The application does not provides the tool about OLED drive
Body details, in order to avoid it is unclear to make disclosed method thicken.
Run through the disclosure to use term " logical device " to represent can to utilize the heavy of such as transistor unit
The CMOS that routine techniques that is long-pending and that be patterned these elements by photoetching and etching is manufactured is brilliant
The array of body pipe.The application does not provides the detail about logical device, in order to avoid making the disclosure
Method thicken unclear.
Running through the disclosure uses term " memory device " to represent the CMOS crystal that can store information
Pipe and the array of capacitor.Can utilize and well known to a person skilled in the art and deposit described in routine techniques manufacture
Memory device.The application does not provides the detail about memory device, in order to avoid making the side of the disclosure
Method thickens unclear.
Note, although this embodiment of the disclosure describes at this point of the disclosure and illustrates and be present in list
OLED drive 12, logic and memory part 14 and other merit in brilliant Semiconductor substrate 10
Energy device 15, but the disclosure and method are not limited to the most this embodiment.Other embodiments is possible
, as long as putting at least logic and memory part 14 at this of the disclosure to be formed at single crystal semiconductor substrate
On 10.
With reference to Fig. 2, illustrate formation sealer on the exposed surface of single crystal semiconductor substrate 10
18 structures afterwards and forming the Fig. 1 after stressor layer 20 above described sealer 18.
The sealer 18 used in the disclosure includes the stressor layer that can serve as subsequently forming
Any material of the etching stopping layer of 20.In an embodiment of the disclosure, sealer 18
Ti/W, Ti, Cr, Ni or their any combination can be included, but are not limited to.Generally, and
When Ni is used as the material of stressor layer 20, sealer 18 comprises Ti.Sealer
18 can include single layer or its can include the sandwich construction of the layer different containing at least two.
Sealer 18 can be at room temperature (15 DEG C-40 DEG C, i.e. 288K to 313K) or higher
At a temperature of formed.In one embodiment, sealer 18 can be 20 DEG C (293K) to 180 DEG C
(353K) formed at a temperature of.In another embodiment, sealer 18 can be at 20 DEG C
(293K) formed at a temperature of 60 DEG C (333K).
Can utilize and well known to a person skilled in the art that deposition technique forms sealer 18.Such as,
Can pass through sputtering, chemical gaseous phase deposition, plasma enhanced chemical vapor deposition, chemical solution sink
Long-pending, physical vapour deposition (PVD) and plating (plating), form sealer 18.When using sputtering
During deposition, sputter deposition craft may further include in-situ sputtering cleaning procedure before the deposition.
In one embodiment, sealer 18 typically has the thickness of 5nm to 200nm,
Wherein the thickness of 100nm to 150nm is more typical.Can also use in the disclosure at above-mentioned thickness
Below scope and/or other thickness of above sealer 18.
In certain embodiments, and before forming stressor layer 20, can be at sealer
Optional plating seed layer (not shown) is formed on 18.Typically in the stressor material being subsequently formed
It is that the embodiment of metal uses described optional plating seed layer, and uses plating to be formed to comprise gold
The stressor material belonged to.Optional plating seed layer be used for selectively promoting be pre-selected comprise metal
The plating subsequently of stressor material.Optional plating seed layer can include such as individual layer Ni or such as
Bottom Al()/Ti/Ni(top) the stepped construction of two or more metals.
The thickness of this optional plating seed layer can be according to (one or more) of this optional plating seed layer
Material and form its technology used and change.Typically, the thickness of this optional plating seed layer
For 2nm to 400nm.Described optional plating seed layer can be formed by Conventional deposition processes, described
Depositing operation includes such as: chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition
(PECVD), ald (ALD) and can include evaporation and/or sputtering physics
Vapour deposition (PVD) technology.
Do not leading according to the disclosure, sealer 18 and optional plating seed layer (if employing)
Cause to occur to be formed at a temperature of spontaneous peeling in single crystal semiconductor substrate 10.The meaning of " spontaneous " is to send out
The raw thin-material layers removal from single crystal semiconductor substrate 10 and without using any artificial means to cause
For making thin-material layers be formed from the crackle that single crystal semiconductor substrate 10 disconnects and propagate.The meaning of " manually "
Think of is that crackle is formed and propagation is obviously served in and makes thin-material layers disconnect from single crystal semiconductor substrate 10.
The stressor layer 20 used in the disclosure includes when being positioned at single crystal semiconductor lining under exfoliation temperature
By any material of tensile stress when top, the end 10 is upper.Therefore, stressor material may be otherwise referred to as
Stress-induced material.According to the disclosure, stressor layer 20 has and causes in single crystal semiconductor substrate 10
The critical thickness of interior generation peeling type fracture and stress value." fracture of peeling type " refers to that crackle is formed at list
Crack track is maintained at stress riser/substrate interface by interior and load forces the combination of brilliant Semiconductor substrate 10
The degree of depth of lower section.The meaning of " critical condition " is to serve as a contrast for given stressor material and single crystal semiconductor
Bottom material combines, and the one-tenth-value thickness 1/10 of stressor layer 20 and stress source value are chosen to the fracture of peeling type and are
Possible (can produce the K more than substrateICKIValue).
The thickness of stressor layer 20 is selected as in single crystal semiconductor substrate 10 providing desired (one
Individual or multiple) fracture depth.Such as, if stressor layer 20 is chosen as Ni, then fracture will be
Below stressor layer 20, the depth of the Ni thickness of about 2 to 3 times occurs.The stress of stressor layer 20
Value is selected as meeting the critical condition of peeling type fracture.This can by convert by
t*=[(2.5x106)(KIC 3/2)]/σ2The empirical equation be given is estimated, wherein t*It is limit stress active layer thickness
(in units of micron), KICIt is that the fracture toughness of single crystal semiconductor substrate 10 is (with MPa m1/2
For unit), and σ is the stress value (in units of Mpa or megapascal (MPa)) of stressor layer 20.
Above-mentioned expression formula is to instruct, in practice, it is possible to less than the value predicted by above-mentioned expression formula at most
Peel off under the stress of 20% or one-tenth-value thickness 1/10.
When being in when single crystal semiconductor substrate 10 is applied above under tensile stress and therefore can serve as
The illustrative example of the material of stressor layer 20 includes but not limited to that metal, such as peeling cause band
(tape) polymer of layer or its any combination.Stressor layer 20 can include a kind of stress riser material
Material, or the multilayer stressor structure of the stressor material including that at least two-layer is different can be used.
In one embodiment, stressor layer 20 is metal.In another embodiment, stressor layer
20 is to peel off to cause band.In yet another embodiment, stressor layer 20 can include having bottom and
Top two parts (two-part) stressor layer.The top of described two parts stressor layer can be by shelling
Fall and cause belt to constitute.
When using metal as stressor layer 20, described metal can include such as Ni, Cr, Fe
Or W.The alloy of these metals can also be used.In one embodiment, stressor layer 20 includes
At least one layer being made up of Ni.
When using polymer as stressor layer 20, described polymer is to be made up of constitutional repeating unit
Big macromolecule.These subelements are bonded typically via covalent chemical.Can act as stress riser
The illustrative example of the polymer of layer includes but not limited to polyimides, polyester, polyolefin, polypropylene
Acid esters, polyurethane, polyvinyl acetate and polyvinyl chloride.
When by peeling cause belt be used as stressor layer 20 time, peel off cause belt include any for
But at a temperature of forming the first of this band it is flexible, soft and unstressed use during peeling off
Second at a temperature of be firm, ductile and tensile Pressure Sensitive Tape." Pressure Sensitive Tape " refers to
Apply toughness in the case of pressure without the adhesive tape of solvent, heat or the water being used for activation.
Tensile stress in the most described band has relatively low mainly due to single crystal semiconductor substrate 10(
Thermal coefficient of expansion) and described band (there is higher thermal coefficient of expansion) between thermal expansion mismatch draw
Rise.
Typically, the Pressure Sensitive Tape being used as stressor layer 20 in the disclosure at least includes adhesion coating and matrix
Layer.Include with and without suitable plasticizer for the adhesion coating of this Pressure Sensitive Tape and the material of base layer
The most such as acrylics, polyester, alkene and the polymeric material of vinyl (vinyl).
Plasticizer is the additive of the plasticity that can increase the polymeric material that they are added to.
Stressor layer 20 can utilize any known depositing operation to be formed.Generally, by dip coated,
Spin coating, brush, sputter, chemical gaseous phase deposition, plasma enhanced chemical vapor deposition, chemical solution
Any one of liquid deposition, physical vapour deposition (PVD) and plating complete to deposit and include metal or poly-to be formed
Compound is as the stressor layer 20 of stressor material.In certain embodiments, when stressor layer 20 it is
During band, can with hand or with mechanical device apply stressor layer 20.
Stressor layer 20 can be formed at a temperature of being in the first of room temperature (15 DEG C-40 DEG C).Separately
In one embodiment, when have employed belt, belt can be from first temperature of 15 DEG C to 60 DEG C
Lower formation.
If stressor layer 20 has metalline, then it typically has from 3 μm to 50 μm
In the range of thickness, wherein the thickness in the range of 4 μm to 7 μm is more typical.In the disclosure
In can also use below above-mentioned thickness range and/or more than other thickness of stressor layer 20.
If stressor layer 20 has polymer property, then it typically has from 10 μm to 200 μm
In the range of thickness, wherein the thickness in the range of 50 μm to 100 μm is more typical.At this
Can also use in Gong Kai below above-mentioned thickness range and/or more than other of stressor layer 20 thick
Degree.
With reference to Fig. 3, illustrate after formation processes substrate 22 above stressor layer 20 and shelling
The structure of the Fig. 2 after falling.In some embodiments of the disclosure, it is convenient to omit process substrate 22.
Therefore, the selectable unit (SU) that substrate is the disclosure is processed.The process substrate 22 used in the disclosure includes appointing
What has the flexible material of minimum profile curvature radius of typically less than 30cm.Can act as processing substrate
The illustrative example of the flexible material of 22 includes metal forming or polyimide foil.
Process substrate 22 may be used for process peeled-off portion i.e., below stressor layer 20 and
During the part of the single crystal semiconductor substrate 10 above the break surface of single crystal semiconductor substrate 10
More preferable Fracture Control and more flexible are provided.Can be used for during peeling off additionally, process substrate 22
Guide crack propagation.The process substrate 22 of the disclosure typically but is not necessarily being in room temperature (15 DEG C
-40 DEG C) first at a temperature of formed.
Process substrate 22 can utilize and well known to a person skilled in the art that deposition technique is formed, described deposition
Technology include such as dip coated, spin coating, brush, sputter, chemical gaseous phase deposition, plasma increase
Extensive chemical vapour deposition, chemical solution deposition, physical vapour deposition (PVD) and plating.In certain embodiments,
Process substrate 22 and can be applied in stressor layer 20 top manually or by mechanical device.
Processing substrate 22 typically to have from 1 μm to the thickness of several mm, wherein 70 μm are to 120 μm
Thickness be more typical.Can also use in the disclosure below above-mentioned thickness range and/or more than
Process substrate 22 other thickness.
Can at room temperature or at a temperature below the room temperature start to peel off.In one embodiment,
Peel off under room temperature (that is, 20 DEG C to 40 DEG C).In another embodiment, less than 20 DEG C
At a temperature of peel off.In yet another embodiment, generation is peeled off in 77K or lower temperature.
In a further embodiment, generation is peeled off in the temperature less than 206K.In yet another embodiment,
Peel off and the temperature at 175K to 130K occurs.
When being used below the temperature of room temperature, can be by utilizing any cooling device by cold for described structure
But drop to below room temperature and realize the exfoliation process less than room temperature.For example, it is possible to by by described knot
Structure is placed on liquid nitrogen bath, bath of liquid helium, ice bath, the dry ice bath, supercritical fluid bath or any low temperature environment
Liquid or gas realize cooling.
When peeling off at a temperature below the room temperature, by the structure that permission is peeled off at room temperature
And allow the structure peeled off the warmest to room temperature, make the structure of peeling return to room temperature.Or, can
To utilize any heater that the structure of peeling is heated to room temperature.
As it is shown on figure 3, peel off by single crystal semiconductor substrate 10 do not comprise OLED drive 12,
The part of logic and memory part 14 and other function element 15 is from the bag of single crystal semiconductor substrate 10
Another portion containing OLED drive 12, logic and memory part 14 and other function element 15
Divide and remove.In the drawings, element 10A refers to that the OLED that do not comprises of single crystal semiconductor substrate 10 drives electricity
Road 12, logic and memory part 14 and the part of other function element 15, and element 10B refers to
Single crystal semiconductor substrate 10 comprise OLED drive 12, logic and memory part 14 and its
The part of its function element 15.
The most also element 10B is referred to as the single-crystal semiconductor layer (or in short, exfoliation layer) peeled off,
And element 10A is properly termed as non-exfoliation layer herein.As it can be seen, comprise single crystal semiconductor substrate 10
Comprise OLED drive 12, logic and memory part 14 and the portion of other function element 15
Exfoliation layer 10B divided still comprises sealer 18, stressor layer 20 and processes substrate 22.
In an embodiment of the disclosure, exfoliation layer 10B has the thickness less than 100 microns.?
In another embodiment of the disclosure, exfoliation layer 10B has the thickness less than 50 microns.In these public affairs
In another embodiment opened, exfoliation layer 10B has the thickness of 25 microns to 40 microns.
With reference now to Fig. 4, illustrate exfoliation layer 10B with comprise OLED drive 12, patrol
Collect and form lining on the bottommost surface contrary with the surface of memory device 14 and other function element 15
The structure of the Fig. 3 at the end 24.Substrate 24 can be rigidity or flexibility, and can include
Such as semi-conducting material, glass, pottery, band or plastics.Typically, substrate 24 is by glass or plastics
Constitute.Substrate 24 can be formed on the bottommost surface of exfoliation layer 10B by engaging.Can
With room temperature until about 300 DEG C at a temperature of realize engage.
Can be at presence or absence sealer 18, stressor layer 20 and the bar processing substrate 22
Under part, substrate 24 is applied to exfoliation layer 10B.In the embodiment exemplified by Fig. 4, there is surface
Under conditions of protective layer 18, stressor layer 20 and process substrate 22, substrate 24 is formed at peeling
On layer 10B.
With reference to Fig. 5, illustrate and processing substrate 22, stressor layer 20 and from the removal of exfoliation layer 10B
The structure of the Fig. 4 after sealer 18.Can utilize and well known to a person skilled in the art conventional skill
Art processes substrate 22, stressor layer 20 and sealer 18 from the removal of exfoliation layer 10B.
Such as, in one embodiment, it is possible to use chloroazotic acid (HNO3/ HCl) remove process lining
The end 22, stressor layer 20, optional plating seed layer and sealer 18.In another embodiment
In, it is possible to use process substrate 22 is removed in UV or heat treatment, is removed by chemical etching afterwards
Stressor layer 20, removes optional plating seed layer and surface protection by different chemical etchings afterwards
Layer 18.
With reference now to Fig. 6, illustrate the structure shown in Fig. 5, it is shown that along and into and stretch out paper
The OLED drive irised out in region of plane.Specifically, Fig. 6 show include substrate 24,
The array of exfoliation layer 10B and OLED drive 12 (that is, is present in exfoliation layer 10B interior and upper
TFT) structure.
With reference now to Fig. 7 A, illustrate the basis according to the OLED display wherein providing bottom emission
Disclosed embodiment, at the expose portion of etching exfoliation layer 10B between adjacent films transistor
The structure shown in Fig. 6 afterwards.Utilize and be etched selectively to semiconductor relative to OLED drive
The selective etch technique of material, carries out the erosion of expose portion to the single-crystal semiconductor layer 10B peeled off
Carve, the top of this upper space being etched in substrate 24 stops.This etching provides from the top to the bottom
Including OLED drive 12 and the material of the remainder of the single-crystal semiconductor layer 10B of peeling
Lamination 25.
In an embodiment of the disclosure, selective etch technique can include that etching mask is (generally
Oxide skin(coating)) deposition and utilize the most such as TMAH (TMAH) or KOH
The wet chemical etch of etching or include the silicon etching that the dry etching of such as fluorine based chemistry material carries out.
Block mask (not shown) can be formed, in order to protection includes in the other parts of exfoliation layer 10B
Logic and memory part 14 and the region of other function element 15.
With reference now to Fig. 7 B, illustrate the structure at Fig. 7 A formed after bottom transparent electrodes 26.
Bottom transparent electrodes 26 is formed on the upper space of material laminate 25 and is positioned at adjacent materials lamination
On the upper space of the exposure of the substrate 24 between 25.Bottom transparent electrodes can include electrically conducting transparent
Oxide, described transparent conductive oxide is such as but not limited to the tin-oxide (SnO of fluorine doped2: F),
Mix the zinc oxide (ZnO:Al) of aluminium, tin-oxide (SnO) and indium tin oxide (InSnO2
Or in short, ITO).The multilayer laminated as bottom of this transparent conductive oxide can also be used
Electrode 26.
The thickness of bottom transparent electrodes 26 can be according to the type of the transparent conductive material used and use
Change in the technology forming transparent conductive material.Typically, and in one embodiment, bottom
The thickness of transparency electrode 26 is in the range of from 20nm to 500nm.Other thickness can also be used,
Including less than 20nm and/or the thickness more than 500nm.For minimizing the reflection on the surface from Si
The optimum thickness of bottom transparent electrodes 26 in the range of 70nm to 110nm.
Bottom transparent electrodes 26 typically uses the depositing operation of such as sputtering or CVD to be formed.It is suitable for
In the example of CVD technique forming bottom transparent electrodes material include but not limited to APCVD,
LPCVD, PECVD, MOCVD and combinations thereof.Sputtering example include but not limited to RF and
DC magnetron sputtering.In certain embodiments, can laggard in the deposition of bottom transparent electrodes material
Row patterning processes.
With reference now to Fig. 7 C, illustrate and be formed with electroluminescent material 28 and top electrodes 30
The structure of Fig. 7 B afterwards.As it can be seen, electroluminescent organic material 28 and top electrodes 30
Upper on the exposed surface being positioned at substrate 24 of bottom transparent electrodes 26.
The electroluminescent organic material 28 used in the disclosure includes launching light in response to electric current
Any organic material or organic material multilayer laminated, described organic material includes such as organic metal chela
Compound, conducting polymer, fluorescent dye, phosphorescent coloring and conjugated dendritic big molecule (conjugated
Dendrimer).The example of the organic material that can serve as electroluminescent organic material 28 include but not
It is limited to p-phenylene vinylene (PPV), poly-naphthalene acetylene (PNV), three (2-phenylpyridine) iridium (Ir (ppy)3)
And three (8-hydroxyquinoline) aluminium (Alq3).
Electroluminescent organic material 28 can be formed by routine techniques, and described routine techniques includes such as
Spin coating, dip coated, submergence and chemical gaseous phase deposition.Typically, and in one embodiment,
The thickness of electroluminescent organic material 28 is in the range of several nm to hundreds of nm.Can also use
Including more than aforementioned range and/or other thickness of following thickness.
In certain embodiments, top battery 30 can include having less than bottom transparent electrodes 26
The material of work function or material multilayer laminated.Such as, top electrodes 30 can be by aluminium (Al), calcium
(Ca) and/or magnesium (Mg) constitute.In another embodiment, top electrodes 30 can include
One of transparent conductive oxide that face is mentioned.Top electrodes 30 can utilize any depositing operation to be formed,
Described depositing operation includes such as by sputtering and the heat evaporation of shadowing mask.Typically, and one
In individual embodiment, the thickness of top electrodes 30 is in the range of from 20nm to 100nm.Can also
Use other thickness including more than aforementioned range and/or following thickness.
In the bottom-emitting OLED display part of this embodiment of the disclosure, organic electroluminescence material
Material 28 and top electrodes 30 can have sidewall surfaces the most consistent with each other.
With reference now to Fig. 8, Fig. 8, it is according to wherein providing the OLED display with top-emission
Embodiment of the disclosure, in deposited bottom electrode 32, electroluminescent organic material 28 and top transparent
The expression of the structure exemplified by Fig. 6 after electrode 34.In this embodiment of the disclosure, bottom electricity
Pole 32 includes one of above-mentioned material for top electrodes 30, and top transparent electrode 34
Including one of above-mentioned material for bottom transparent electrodes 26.Real in the bottom emission of the disclosure
Execute in example, bottom electrode 32, electroluminescent organic material 28 and top can be formed as described above
Transparency electrode 34.
In the top-emitting OLED display device of this embodiment of the disclosure, bottom electrode 32, have
Electroluminescent material 28 and top transparent electrode 24 can have sidewall table the most consistent with each other
Face.
With reference now to Fig. 9, the single crystal semiconductor illustrating the second method embodiment according to the disclosure serves as a contrast
The end 10, this single crystal semiconductor substrate 10 includes CMOS logic and the memory device 14 manufactured thereon.
Especially, this embodiment utilizes the structure being similar to exemplified by Fig. 1, but OLED drive 12
Have not yet been formed in single crystal semiconductor substrate 10 with other function element.
With reference now to Figure 10, illustrate formation surface on the exposed surface of single crystal semiconductor substrate 10
The Fig. 9 after stressor layer 20 is formed after protective layer 18 and above described sealer 18
Structure.Sealer 18 and stressor layer 20 with during structure shown in Fig. 2 formed as discussed above
Sealer 18 is identical with stressor layer 20.
With reference now to Figure 11, illustrate above stressor layer 20 after formation processes substrate 22 and
The structure of the Figure 10 after peeling off.In certain embodiments, it is convenient to omit process substrate 22.Place
Reason substrate 22 and formation device thereof are identical with during structure shown in Fig. 3 formed as discussed above.In the disclosure
This embodiment in the exfoliation process used and the exfoliation process mentioned in the previous embodiment of the disclosure
Identical.In this embodiment, exfoliation layer 10B only includes being positioned at CMOS logic thereon and storage
Device 14.
With reference now to Figure 12, illustrate on the bottommost surface of exfoliation layer 10B formed substrate 24 it
After the structure of Figure 11.The substrate 24 used in this embodiment is included in formation knot shown in Fig. 4
One of substrate mentioned above during structure.Equally, joining technique mentioned hereinabove can be herein
For forming the structure shown in Figure 12.
With reference now to Figure 13, illustrate and processing substrate 22, stressor layer from the removal of exfoliation layer 10B
20 and sealer 18 after the structure of Figure 12.Process substrate 22, stressor layer 20 and table
The removal of face protective layer 18 is included in one of technology mentioned above when forming structure shown in Fig. 5.
In certain embodiments, substrate 24 can be formed at single crystal semiconductor substrate 10B of peeling
Before on bottommost surface, removal processes substrate 22, stressor layer 20 and sealer 18.
With reference now to Figure 14, illustrate after forming other function element 15 optional and in shape
Become the structure of OLED drive 12 Figure 13 afterwards.Other function element 15 and OLED optional
Device circuitry 12 is identical with what the Fig. 1 above in conjunction with the disclosure described.
After the structure shown in Figure 14 is provided, it is possible to use the technique used in Fig. 7 A-7C carries
For having the OLED display of bottom emission, or the technique in use Fig. 8 is formed and has top
The OLED display launched.
No matter use in above-described embodiment which or no matter provide there is bottom emission or top
The OLED display launched, disclosed method all provides the most such as partly leading shown in Figure 15
Body structure, this semiconductor structure includes being integrated on same single-crystal semiconductor layer (i.e. exfoliation layer 10B)
OLED display 100, CMOS logic and memory device 102 and other function element 104.
OLED drive is positioned at below OLED display 100.OLED display can include multiple
Top-emitting OLED devices or multiple bottom emitting OLED device.
Although the disclosure have been particularly shown and described about preferred embodiment of the present disclosure, but this area
Skilled artisan will appreciate that, in the case of without departing from the spirit and scope of the disclosure, can make aforementioned
With the change in other form and details.Therefore, the disclosure is intended to be not limited to described and example really
Cut form and details, but fall within the scope of the appended claims.
Claims (38)
1. formation includes a method with the structure of the OLED display of semiconductor drive circuit,
Described method includes:
Thering is provided single crystal semiconductor substrate, described single crystal semiconductor substrate has and is formed at this single crystal semiconductor
At least logic and memory part on the exposed surface of substrate；
Described single crystal semiconductor substrate described of at least logic and memory part described in being formed on
Sealer is formed on exposed surface；
Forming stressor layer above described sealer, described stressor layer has and causes at monocrystalline
Critical thickness and the stress value of the fracture of peeling type is there is in Semiconductor substrate；
Peel off described single crystal semiconductor substrate, to provide the single-crystal semiconductor layer peeled off, described peeling
Single-crystal semiconductor layer has the described at least logic and memory part being positioned on its surface；
Substrate is formed at described peeling single-crystal semiconductor layer with have be positioned at thereon described at least
On the surface that the surface of logic and memory part is contrary；And
It is adjacent on the single-crystal semiconductor layer of described peeling and with described at least logic and memory part
Form Organic Light Emitting Diode (OLED) display.
Method the most according to claim 1, wherein said single crystal semiconductor substrate also includes being positioned at
On the described exposed surface of described single crystal semiconductor substrate and with described at least logic and memory part phase
Adjacent OLED drive, wherein said OLED drive is forming described sealer
Formed before.
Method the most according to claim 1, is additionally included in the described OLED of described formation and shows
In a part for the single-crystal semiconductor layer of described peeling, OLED drive is formed before device.
Method the most according to claim 1, wherein forms described sealer and includes: select
One in Ti/W, Ti, Cr or Ni is as surface protecting material；And deposit described surface protection
Material.
Method the most according to claim 1, the fracture toughness of wherein said single crystal semiconductor substrate
Fracture toughness less than described stressor layer.
Method the most according to claim 5, wherein said stressor layer includes metal, polymer
Or their any combination.
Method the most according to claim 6, wherein said stressor layer at least includes described polymerization
Thing, and described polymer be peel off cause belt.
Method the most according to claim 6, wherein said stressor layer includes described metal, and
And described metal is nickel.
Method the most according to claim 1, the most at room temperature carries out described peeling.
Method the most according to claim 1, carries out described the most at a temperature below the room temperature
Peel off.
11. methods according to claim 1, in described stressor layer before being additionally included in peeling
On top, formation processes substrate.
12. methods according to claim 1, remove institute after being additionally included in the described substrate of formation
State stressor layer.
13. methods according to claim 1, remove institute before being additionally included in the described substrate of formation
State stressor layer.
14. methods according to claim 1, wherein said substrate is glass or plastics, and
Be formed on by joint described peeling single-crystal semiconductor layer with have be positioned at thereon described in extremely
On the surface that the surface of logic and memory part is contrary less.
15. methods according to claim 1, wherein said OLED display is formed at OLED
On drive circuit.
16. methods according to claim 15, the described OLED display of wherein said formation
Including forming bottom emitting OLED device array, wherein said bottom emitting OLED device array
Each bottom emitting OLED device include bottom transparent electrodes, electroluminescent organic material and top
Electrode.
17. methods according to claim 16, described bottom emission OLED of wherein said formation
Device array includes: the monocrystalline of the etching described peeling between adjacent OLED drive is partly led
The expose portion of body layer；And form described bottom transparent electrodes, wherein said bottom transparent electrodes
A part directly contacts with the upper space of the substrate below the single-crystal semiconductor layer being positioned at described peeling.
18. methods according to claim 15, the described OLED display of wherein said formation
Including forming top-emitting OLED devices array, wherein said top-emitting OLED devices array
Each top-emitting OLED devices include bottom electrode, electroluminescent organic material and top transparent
Electrode.
19. 1 kinds of semiconductors formed according to the method as described in any one in claim 1-18
Structure, including:
Single-crystal semiconductor layer, described single-crystal semiconductor layer has the part being positioned at this single-crystal semiconductor layer
On Organic Light Emitting Diode (OLED) display and be positioned at another portion of this single-crystal semiconductor layer
CMOS logic on Fen and memory device, described OLED display has the OLED underlied and drives
Dynamic circuit.
20. semiconductor structures according to claim 19, wherein said single-crystal semiconductor layer includes
Selected from Si, Ge, SiGe, SiGeC, SiC, Ge alloy, GaSb, GaP, GaAs, InAs
Semi-conducting material with InP.
21. semiconductor structures according to claim 19, wherein said single-crystal semiconductor layer includes
Silicon.
22. semiconductor structures according to claim 19, wherein said OLED drive
Including multiple thin film transistor (TFT)s.
23. semiconductor structures according to claim 19, also include being positioned at described single crystal semiconductor
At least one in solar battery cell, battery or sensor in the another part of layer.
24. semiconductor structures according to claim 19, also include being positioned at described single crystal semiconductor
The glass substrate directly below of layer.
25. semiconductor structures according to claim 19, also include being positioned at described single crystal semiconductor
The plastic substrate directly below of layer.
26. semiconductor structures according to claim 19, wherein said single-crystal semiconductor layer has
Thickness less than 100 microns.
27. semiconductor structures according to claim 19, wherein said OLED display bag
Include bottom emitting OLED device array.
28. semiconductor structures according to claim 27, wherein said bottom emission OLED
Each bottom emitting OLED device of device array includes bottom transparent electrodes, organic electroluminescence material
Material and top electrodes.
29. semiconductor structures according to claim 27, a part for wherein said bottom electrode
Directly contact with the upper space of the substrate being positioned at below described single-crystal semiconductor layer.
30. semiconductor structures according to claim 19, wherein said OLED display bag
Include top-emitting OLED devices array.
31. semiconductor structures according to claim 30, wherein said top-emitting OLED
Each top-emitting OLED devices of device array include bottom electrode, electroluminescent organic material and
Top transparent electrode.
32. semiconductor structures according to claim 31, wherein said bottom electrode, described in have
Each in electroluminescent material and described top transparent electrode has side the most consistent with each other
Wall surface.
33. semiconductor structures according to claim 19, wherein said OLED display bag
Including OLED array, each OLED of described OLED array includes being positioned at the end
The conducting polymer as electroluminescent organic material between portion's electrode and top electrodes.
34. semiconductor structures according to claim 33, wherein said bottom electrode or described top
One of portion's electrode includes transparent conductive oxide.
35. semiconductor structures according to claim 34, wherein said transparent conductive oxide bag
Include the tin-oxide (SnO of fluorine doped2: F), mix the zinc oxide (ZnO:Al) of aluminium, tin-oxide (SnO)
Or indium tin oxide.
36. semiconductor structures according to claim 35, wherein said bottom electrode is by indium tin oxygen
Compound is constituted.
37. semiconductor structures according to claim 35, wherein said top electrodes is by indium tin oxygen
Compound is constituted.
38. semiconductor structures according to claim 33, wherein said conducting polymer includes gathering
To phenylacetylene.
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| US13/658,473 | 2012-10-23 | ||
| US13/658,473 US8946731B2 (en) | 2012-09-24 | 2012-10-23 | OLED display with spalled semiconductor driving circuitry and other integrated functions |
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| CN111799296A (en) * | 2019-08-16 | 2020-10-20 | 合肥维信诺科技有限公司 | Preparation method of display panel, display panel and display device |
| KR20210026529A (en) * | 2019-08-30 | 2021-03-10 | 에스케이하이닉스 주식회사 | Capacitor and method for manufacturing the same |
| CN113764463A (en) * | 2020-06-06 | 2021-12-07 | 张葳葳 | Active driving device and manufacturing method thereof |
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| CN1739129A (en) * | 2003-01-15 | 2006-02-22 | 株式会社半导体能源研究所 | Peeling method and method for manufacturing display device using the peeling method |
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| KR101073301B1 (en) * | 2009-07-15 | 2011-10-12 | 삼성모바일디스플레이주식회사 | Organic Light emitting Display device and fabrication method thereof |
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