CN103681589A - Semiconductor device, method for manufacturing semiconductor device, and electronic device - Google Patents
Semiconductor device, method for manufacturing semiconductor device, and electronic device Download PDFInfo
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- CN103681589A CN103681589A CN201310392313.1A CN201310392313A CN103681589A CN 103681589 A CN103681589 A CN 103681589A CN 201310392313 A CN201310392313 A CN 201310392313A CN 103681589 A CN103681589 A CN 103681589A
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- semiconductor chip
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- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
- H01L24/92—Specific sequence of method steps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19106—Disposition of discrete passive components in a mirrored arrangement on two different side of a common die mounting substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
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Abstract
Provided are a semiconductor device which can ensure excellent connectivity of a heat conduction material and a semiconductor chip and ensure excellent dissipation of heat produced in semiconductor chip production, a method for manufacturing semiconductor device, and an electronic device. The semiconductor device comprises a wiring board, the semiconductor chip, a heat dissipation component, sealed resin layer and the heat conduction material, wherein through holes for communicating with the heat conduction material are formed in the heat dissipation compoennet.
Description
The cross reference of related application
The present invention is contained in the formerly relevant theme of patent application JP2012-207434 of Japan that in September, 2012,20Xiang Japan Office submitted to, at this, full content of this Japanese patent application is incorporated to herein by reference.
Technical field
This technology relates to the manufacture method of semiconductor device, semiconductor device and the technical field of electronic equipment.Particularly, this technology relates in the thermal component that the heat by producing sheds, form that the through hole that is communicated with Heat Conduction Material is guaranteed the good bond of Heat Conduction Material and semiconductor chip and the technical field of the hot excellent radiating effect guaranteeing to produce in semiconductor chip in making semiconductor chip.
Background technology
In recent years, the semiconductor chips such as IC (integrated circuit) and LSI (large scale integrated circuit) that is used as microprocessor etc. in computer and mobile phone etc. become more and more high speed and multifunction.Ground related to this, the quantity of electrode (terminal) is tended to increase, and spacing between electrode is tended to reduce.Conventionally, on the bottom surface of semiconductor chip, with array format, a plurality of electrodes are set.
The portion of terminal distance of this semiconductor chip has large pitch difference being called as the splicing ear forming on the circuit substrate of mainboard.Therefore, be difficult to semiconductor chip to be arranged on mainboard.
Therefore, for semiconductor chip is connected on mainboard, formed the wiring substrate with a plurality of insulating barriers and a plurality of wiring layers, wiring substrate is installed to (connection) on mainboard, and semiconductor chip is arranged on wiring substrate, semiconductor chip is connected on mainboard via wiring substrate.Use wiring substrate and semiconductor chip etc., formed the tectosome that is called as semiconductor packages (semiconductor device).
In addition,, along with electronic equipment become miniaturization, multifunction and high speed, the semiconductor device that is equipped with semiconductor chip that these electronic equipments are used needs more miniaturization, more high speed and more densification.
Yet when semiconductor device miniaturization, high speed and densification, the heat that power consumption can increase and per unit volume produces tends to increase.Therefore, need further to improve radiating efficiency and the radiation stability of semiconductor device.
In the past, as the installation constitution of semiconductor chip, the surface that is wherein provided with the outer electrode of semiconductor chip is known towards the flip-chip installation constitution of below.
As a kind of technology that makes the semiconductor chip heat radiation that flip-chip is installed as mentioned above, there is a kind of technology shedding by the heat that above configuration thermal component produces in making semiconductor chip of the thermal interfacial material (TIM) as Heat Conduction Material, TIM is formed on the surperficial opposing face of the outer electrode that is provided with semiconductor chip (for example, with reference to JP2001-257288A Fig. 8).As Heat Conduction Material, can use such as aluminium oxide cream and silver paste etc.
Particularly, in semiconductor device, thermal component is configured to cover and be arranged on the semiconductor chip wiring substrate from top, and Heat Conduction Material is arranged between the lower surface of thermal component and the upper surface of semiconductor chip.Therefore, Heat Conduction Material joins the upper surface of semiconductor chip and the lower surface of thermal component to, and the heat producing in semiconductor chip is transmitted to thermal component by Heat Conduction Material and sheds from thermal component.
In addition, as a kind of, thermal component is fixed to the technology on semiconductor chip, thermal component and wiring substrate are known (for example, with reference to JP2007-184351A Fig. 1) by the fixing method of binder resin.
Particularly, on the peripheral part (that is, the outer circumferential side of semiconductor chip) of wiring substrate, sealing resin layer is set, the peripheral part of thermal component joins sealing resin layer to binder resin, and thermal component is fixed on wiring substrate.Therefore, semiconductor chip seals from outer circumferential side by sealing resin layer, and thermal component is also fixed on semiconductor chip.
In addition, bottom is set in the inner side of sealing resin layer and fills (underfill) resin material, and with the gap between bottom potting resin material seal semiconductor chip and wiring substrate.
By the way, in above-mentioned semiconductor device, although arrange below wiring substrate, be called as the soldered ball of spherical solder array (BGA) and by soldered ball, wiring substrate be connected with circuit substrate, may there is warpage in whole semiconductor device when the backflow of soldered ball etc.
This warpage is mainly caused by the difference of the thermal coefficient of expansion between semiconductor chip and wiring substrate or the difference of the thermal coefficient of expansion between semiconductor chip and bottom potting resin material.There is warpage in the thermal coefficient of expansion that particularly, is greater than semiconductor chip due to the thermal coefficient of expansion of wiring substrate or bottom potting resin material.
The state (with reference to Figure 17 and Figure 18) of the warpage below explanation being occurred when refluxing in semiconductor device.
Semiconductor device a has wiring substrate b, semiconductor chip c and thermal component d.
Below wiring substrate b, be provided for connecting soldered ball (BGA) e of unshowned circuit substrate, e ...
Semiconductor chip c is arranged on the upper surface of wiring substrate b, and potting resin material f sealing in bottom for the gap between wiring substrate b and semiconductor chip c.
Thermal component d joins semiconductor chip c to via Heat Conduction Material (TIM) g therebetween, and TIM g joins the upper surface of semiconductor chip c to.
Sealing resin layer h is arranged on the peripheral part of wiring substrate b, and thermal component d is fixed on sealing resin layer h.Therefore, semiconductor chip c seals from outer circumferential side with sealing resin layer h.
Figure 17 is the view that is illustrated schematically in the state of the warpage of (at high temperature) in the reflux course of semiconductor device a.
In reflux course, by the difference of the thermal coefficient of expansion between semiconductor chip c and wiring substrate b or the difference of the thermal coefficient of expansion between semiconductor chip c and bottom potting resin material f etc., cause and make wiring substrate b convexly curved warpage downwards.Now, in semiconductor device a, at semiconductor chip c and Heat Conduction Material g direction (draw direction) separated from one another, apply power A.
On the other hand, Figure 18 is the view that is illustrated schematically in the backflow of the semiconductor device a state of the warpage of (at room temperature) when cooling.
When backflow is cooling, by the difference of the thermal coefficient of expansion between semiconductor chip c and wiring substrate b or the difference of the thermal coefficient of expansion between semiconductor chip c and bottom potting resin material f etc., cause the warpage that makes wiring substrate b bending protruding upward.Now, in semiconductor device a, the direction (compression direction) of pushing each other at semiconductor chip c and Heat Conduction Material g applies power B.
When there is arbitrarily above-mentioned warpage in semiconductor device a, the Heat Conduction Material g that connects thermal component d and semiconductor chip c may be separated with semiconductor chip c.When Heat Conduction Material g is separated with semiconductor chip c, the heat producing in semiconductor chip c can not be transmitted to thermal component d fully, and the reliability of the operation of heat dispersion reduction and semiconductor device a is reduced.
Summary of the invention
Therefore, according to the manufacture method of the semiconductor device of this implementer case, semiconductor device and electronic equipment, wish to overcome at least one in the problems referred to above, to guarantee the good bond of Heat Conduction Material and semiconductor chip, and guarantee the hot excellent radiating effect that produces in semiconductor chip.
First, for at least one in addressing the above problem, a kind of semiconductor device is provided, described semiconductor device comprises: wiring substrate, described wiring substrate has a plurality of insulating barriers and a plurality of wiring layer of interaction cascading, and described wiring layer is via being connected to each other by plug; Semiconductor chip, described semiconductor chip is arranged on described wiring substrate; Thermal component, described thermal component is configured on the opposite side of described wiring substrate, described semiconductor chip is clipped between described wiring substrate and described thermal component, and the heat producing in described semiconductor chip is shed; Sealing resin layer, described sealing resin layer joins described wiring substrate and described thermal component between described wiring substrate and described thermal component, and seals described semiconductor chip from outer circumferential side; And Heat Conduction Material, described Heat Conduction Material is in described sealing resin layer inner side and between described semiconductor chip and described thermal component, join described semiconductor chip and described thermal component to, and the heat producing in described semiconductor chip is transmitted to described thermal component.In described thermal component, form the through hole that is communicated with described Heat Conduction Material.
Secondly, in above-mentioned semiconductor device, wish that the end at described Heat Conduction Material opposition side of described through hole forms the tapered portion that wherein becomes larger along with the described end described Heat Conduction Material of distance diameter far away.
The tapered portion that makes the end at Heat Conduction Material opposition side along with through hole become larger apart from Heat Conduction Material diameter far away by formation, Heat Conduction Material can easily be injected into through hole.
The 3rd, in above-mentioned semiconductor device, wish that the end in described Heat Conduction Material side of described through hole forms the tapered portion that wherein becomes larger along with the nearlyer diameter of the described end described Heat Conduction Material of distance.
The tapered portion that makes the end in Heat Conduction Material side along with through hole become larger apart from the nearlyer diameter of Heat Conduction Material by formation, can improve the bond strength of Heat Conduction Material and thermal component.
The 4th, in above-mentioned semiconductor device, wish to check whether described Heat Conduction Material occurs separated with described semiconductor chip.
Separated by checking whether Heat Conduction Material and semiconductor chip occur, can judge reliably whether Heat Conduction Material occurs separated with semiconductor chip.
For at least one in addressing the above problem, a kind of manufacture method of semiconductor device is provided, described method comprises: form wiring substrate, described wiring substrate has a plurality of insulating barriers and a plurality of wiring layer of interaction cascading, and described wiring layer is via being connected to each other by plug; Mounting semiconductor chip on described wiring substrate; Form sealing resin layer, described sealing resin layer joins described wiring substrate to and seals described semiconductor chip from outer circumferential side; Thermal component is installed on described semiconductor chip, and described thermal component has communicative engagement to the through hole of the Heat Conduction Material of described semiconductor chip; And check whether described Heat Conduction Material occurs separated with described semiconductor chip.
Therefore, in the manufacture method of semiconductor device, can be from the through hole filling heat-conductive material of thermal component.
For at least one in addressing the above problem, a kind of electronic equipment is provided, comprising: circuit substrate, described circuit substrate is configured in the inside of shell; And semiconductor device, described semiconductor device is connected to the predetermining circuit in described circuit substrate.Wherein said semiconductor device comprises: wiring substrate, and described wiring substrate has a plurality of insulating barriers and a plurality of wiring layer of interaction cascading, and described wiring layer is via being connected to each other by plug; Semiconductor chip, described semiconductor chip is arranged on described wiring substrate; Thermal component, described thermal component is configured on the opposite side of described wiring substrate, described semiconductor chip is clipped between described wiring substrate and described thermal component, and the heat producing in described semiconductor chip is shed; Sealing resin layer, described sealing resin layer joins described wiring substrate and described thermal component between described wiring substrate and described thermal component, and seals described semiconductor chip from outer circumferential side; And Heat Conduction Material, described Heat Conduction Material is in described sealing resin layer inner side and between described semiconductor chip and described thermal component, join described semiconductor chip and described thermal component to, and the heat producing in described semiconductor chip is transmitted to described thermal component.In described thermal component, form the through hole that is communicated with described Heat Conduction Material.
Therefore, in electronic equipment, can be from the through hole filling heat-conductive material of thermal component.
According to the embodiment of this technology, a kind of semiconductor device is provided, comprising: wiring substrate, described wiring substrate has a plurality of insulating barriers and a plurality of wiring layer of interaction cascading, and described wiring layer is via being connected to each other by plug; Semiconductor chip, described semiconductor chip is arranged on described wiring substrate; Thermal component, described thermal component is configured on the opposite side of described wiring substrate, described semiconductor chip is clipped between described wiring substrate and described thermal component, and the heat producing in described semiconductor chip is shed; Sealing resin layer, described sealing resin layer joins described wiring substrate and described thermal component between described wiring substrate and described thermal component, and seals described semiconductor chip from outer circumferential side; And Heat Conduction Material, described Heat Conduction Material is in described sealing resin layer inner side and between described semiconductor chip and described thermal component, join described semiconductor chip and described thermal component to, and the heat producing in described semiconductor chip is transmitted to described thermal component.In described thermal component, form the through hole that is communicated with described Heat Conduction Material.
Therefore, when warpage and Heat Conduction Material occurring in semiconductor device when separated with semiconductor chip, can be separated by repairing from through hole filling heat-conductive material, to guarantee the good bond of Heat Conduction Material and semiconductor chip, and guarantee the hot excellent radiating effect that produces in semiconductor chip.
According to another embodiment of this technology, the end at described Heat Conduction Material opposition side of described through hole forms the tapered portion that wherein becomes larger along with the described end described Heat Conduction Material of distance diameter far away.
Therefore, Heat Conduction Material can easily be injected into through hole, and can improve injection efficiency.
According to another embodiment of this technology, the end in described Heat Conduction Material side of described through hole forms the tapered portion that wherein becomes larger along with the nearlyer diameter of the described end described Heat Conduction Material of distance.
Therefore, can improve the bond strength of Heat Conduction Material and thermal component, to guarantee the thermal conductive resin from Heat Conduction Material to thermal component, and improve heat dispersion.
According to another embodiment of this technology, check whether described Heat Conduction Material occurs separated with described semiconductor chip.
Therefore, can judge reliably whether Heat Conduction Material and semiconductor chip occur separated, and by only where necessary from through hole filling heat-conductive material, can improve the manufacture efficiency of semiconductor device.
According to another embodiment of this technology, a kind of manufacture method of semiconductor device is provided, described method comprises: form wiring substrate, described wiring substrate has a plurality of insulating barriers and a plurality of wiring layer of interaction cascading, and described wiring layer is via being connected to each other by plug; Mounting semiconductor chip on described wiring substrate; Form sealing resin layer, described sealing resin layer joins described wiring substrate to and seals described semiconductor chip from outer circumferential side; Thermal component is installed on described semiconductor chip, and described thermal component has communicative engagement to the through hole of the Heat Conduction Material of described semiconductor chip; And check whether described Heat Conduction Material occurs separated with described semiconductor chip.
Therefore, when judging that in inspection Heat Conduction Material and semiconductor chip occur when separated, can be separated by repairing from through hole filling heat-conductive material, to guarantee the good bond of Heat Conduction Material and semiconductor chip, and guarantee the hot excellent radiating effect that produces in semiconductor chip.
Another embodiment according to this technology, provides a kind of electronic equipment, comprising: circuit substrate, and described circuit substrate is configured in the inside of shell; And semiconductor device, described semiconductor device is connected to the predetermining circuit in described circuit substrate.Described semiconductor device comprises: wiring substrate, and described wiring substrate has a plurality of insulating barriers and a plurality of wiring layer of interaction cascading, and described wiring layer is via being connected to each other by plug; Semiconductor chip, described semiconductor chip is arranged on described wiring substrate; Thermal component, described thermal component is configured on the opposite side of described wiring substrate, described semiconductor chip is clipped between described wiring substrate and described thermal component, and the heat producing in described semiconductor chip is shed; Sealing resin layer, described sealing resin layer joins described wiring substrate and described thermal component between described wiring substrate and described thermal component, and seals described semiconductor chip from outer circumferential side; And Heat Conduction Material, described Heat Conduction Material is in described sealing resin layer inner side and between described semiconductor chip and described thermal component, join described semiconductor chip and described thermal component to, and the heat producing in described semiconductor chip is transmitted to described thermal component.In described thermal component, form the through hole that is communicated with described Heat Conduction Material.
Therefore, when there is warpage and Heat Conduction Material and semiconductor chip in semiconductor device, occur when separated, can be separated by repairing from through hole filling heat-conductive material, to guarantee the good bond of Heat Conduction Material and semiconductor chip, and guarantee the hot excellent radiating effect that produces in semiconductor chip.
Accompanying drawing explanation
Mono-of Fig. 1 and Fig. 2~Figure 16 show according to the best mode of the manufacture method of the semiconductor device of this implementer case, semiconductor device and electronic equipment, and Fig. 1 is the stereogram of electronic equipment;
Fig. 2 is the block diagram that the circuit structure of electronic equipment is shown;
Fig. 3 is the stereogram of semiconductor device;
Fig. 4 is the sectional drawing of semiconductor device;
Fig. 5 is the schematic amplification profile diagram of wiring substrate;
Fig. 6 is the amplification profile diagram that a part for thermal component and Heat Conduction Material is shown;
Fig. 7 is the flow chart of summary that the manufacture method of semiconductor device is shown;
Fig. 8 shows the manufacture method of semiconductor device together with Fig. 9~Figure 16, and Fig. 8 is illustrated in the sectional drawing that the state of semiconductor chip is installed on wiring substrate;
Fig. 9 is illustrated in the sectional drawing that gap-fill between wiring substrate and semiconductor chip has the state of bottom potting resin material;
Figure 10 is the sectional drawing that inserts and configure wiring substrate in recess and insert the state of release film for configuration that is illustrated in lower mould;
Figure 11 is dark mouthful (pot) the middle sectional drawing that drops into the state of resin sheet illustrating to lower mould;
Figure 12 illustrates operation aspirating mechanism, from SS, discharges the sectional drawing that air and release film are attached to the state the forming face of upper die;
Figure 13 illustrates upper die and lower mould is fitted to each other and carry out the sectional drawing of the state of mold cramping;
Figure 14 illustrates operated piston and molten resin to the sectional drawing of the state of Cavity Flow;
Figure 15 illustrates the sectional drawing that the molten resin of cavity filling solidifies and forms the state of sealing resin layer in the surrounding of semiconductor chip;
Figure 16 is the sectional drawing that upper die and the state that lower mould is separated from one another and wiring substrate takes out from molding die are shown;
Figure 17 shows the state of the warpage occurring in semiconductor device together with Figure 18, and Figure 17 illustrates the wiring substrate sectional drawing of convexly curved state downwards; And
Figure 18 is the sectional drawing that the state of wiring substrate bending protruding upward is shown.
Embodiment
Below, describe with reference to the accompanying drawings the preferred embodiments of the invention in detail.It should be noted that in this specification and accompanying drawing, with identical Reference numeral, represent to have the structural element of substantially the same function and structure, and omitted the repeat specification to these structural elements.
Below, explanation is implemented according to the best mode of the manufacture method of the semiconductor device of this implementer case, semiconductor device and electronic equipment with reference to the accompanying drawings.
The semiconductor device of the following stated is the tectosome of the so-called semiconductor packages that wherein wiring substrate, semiconductor chip and thermal component configure in turn on thickness direction.As wiring substrate, for example, use the wiring substrate that is called as coreless substrate without sandwich layer (core substrate).
In the following description, by always represent front and back, upper and lower and left and right directions using the configuration direction (thickness direction) of wiring substrate, semiconductor chip and thermal component as upper and lower.
It should be noted that the front and back of the following stated, upper and lower and left and right directions are for convenient explanation, and the enforcement of this technology is not limited to these directions.
[schematic configuration of electronic equipment]
First, by the schematic configuration (with reference to Fig. 1) of explanation electronic equipment 100.
On the front surface of shell 101, the central portion on left and right directions arranges display floater 102, on the left side and the right of display floater 102, separates in a circumferential direction configuration operation key 103,103 ... with operation keys 104,104 ...In addition, at the bottom setting operation key 105,105 of the front surface of shell 101 ...
Operation keys 103,103 ..., operation keys 104,104 ..., and operation keys 105,105 ... play the effect for the directionkeys such as being chosen on display floater 102 menu item showing or playing etc. or decision key etc.
On the upper surface of shell 101, arrange and connect the splicing ear 106 that external equipment is used, electric power is supplied with the feeding terminal 107,107 of use, and carries out the light-receiving window 108 etc. of infrared communication with external equipment.
[circuit structure of electronic equipment]
Secondly, by the circuit structure (with reference to Fig. 2) of explanation electronic equipment 100.
In addition, electronic equipment 100 has the set information maintaining parts 130 such as memory such as the various information that keep user to set.
[structure of semiconductor device]
Then, by the structure (with reference to Fig. 3~Fig. 6) of explanation semiconductor device 1.
For example, wiring substrate 2 is the coreless substrates without sandwich layer, and has a plurality of insulating barriers 5,5 of interaction cascading ... with a plurality of wiring layers 6,6 ... (with reference to Fig. 5).The example of the material of insulating barrier 5 use comprises epoxy resin, and the example of the material of wiring layer 4 use comprises copper, silver and nickel etc.Wiring layer 6,6 ... from upper strata to lower floor via by plug (via-plug) 7,7 ... with predefined paths, connect.
Upper surface (that is, the upper surface of the insulating barrier 5 of the superiors) at wiring substrate 2 is upper, and form and connect pad 8,8 ... Connect pad 8,8 ... be connected with the portion of terminal of semiconductor chip 3. Connect pad 8,8 ... for example by electronickelling, lead, gold or its alloy, with array format, form.
Lower surface (that is, the lower surface of undermost insulating barrier 5) at wiring substrate 2 is upper, forms terminal pad 10,10 ...At the terminal pad 10,10 that is positioned at the center side of wiring substrate 2 ... upper, with tin, silver, copper or its alloy, form electrode pad 11,11 ... Terminal pad 10,10 ... by the soldered ball 12,12 arranging with array format ... be connected with the splicing ear of unshowned circuit substrate (mainboard), and electrode pad 11,11 ... with capacitor 13,13 ... connect (with reference to Fig. 4).
By by capacitor 13,13 ... so be connected with the lower surface of wiring substrate 2 under semiconductor chip 3, shortened from semiconductor chip 3 to capacitor 13,13 ... wiring path, and can reduce wiring resistance.
It should be noted that capacitor 13,13 ... position be not limited to the lower surface of the wiring substrate 2 under semiconductor chip 3, for example, can be the lower surface of the wiring substrate 2 under semiconductor chip 3 is non-, as long as wiring path shortens fully.In addition, for example, capacitor 13,13 ... can be connected with the upper surface of wiring substrate 2 and be sealed by sealing resin layer described later, as long as wiring path shortens fully.
On the lower surface of undermost insulating barrier 5, do not forming terminal pad 10,10 ... part in form solder resist 14 (with reference to Fig. 5).
As mentioned above, wiring substrate 2 forms the coreless substrate without sandwich layer, and for example can be thinned to by six layers of structure the degree of approximately 300 μ m.By reducing the thickness of wiring substrate 2, can reduce the length of distribution, therefore can improve the service speed of semiconductor device 1.
Fill with bottom potting resin material 15 in gap between wiring substrate 2 and semiconductor chip 3.Gap-fill bottom potting resin material 15 by between wiring substrate 2 and semiconductor chip 3, is dispersed in the stress in solder bump, therefore, has improved the reliability of semiconductor device 1.
The thickness of thermal component 4 is for example 0.5mm~2.0mm, and the diameter of through hole 16 is for example about 0.3mm.
In through hole 16, upper end forms wherein along with upper end the first tapered portion 16a that more up diameter becomes larger, and bottom forms wherein along with bottom the second tapered portion 16b (with reference to Fig. 6) that more down diameter becomes larger.
At the peripheral part of wiring substrate 2, that is, at the outer circumferential side of semiconductor chip 3, sealing resin layer 18 is set, the peripheral part of thermal component 4 engages with sealing resin layer 18 with binder resin 19, and thermal component 4 is fixed on wiring substrate 2.Therefore, semiconductor chip 3 use sealing resin layers 18 seal from outer circumferential side.
It should be noted that at the soldered ball 12,12 arranging with array format ... in, wish that sealing resin layer 18 is arranged on outermost soldered ball 12,12 ... outside.
By sealing resin layer 18 being arranged on to outermost soldered ball 12,12 ... outside, by sealing resin layer 18, improved the intensity of wiring substrate 2, therefore, can suppress the warpage of wiring substrate 2.By this way, due to sealing resin layer 18, play the effect of the supporting material of wiring substrate 2; Therefore,, even when wiring substrate 2 is thinner, also can guarantee the high strength of semiconductor device 1.
As binder resin 19, can use such as epoxy is the various adhesives such as adhesive and acrylic ester adhesive, the cream such as the heat conductor such as TIM or silicon grease and various materials such as indium or gold.Can consider the material of sealing resin layer 18 and thermal component 4 and select aptly binder resin 19.
It should be noted that and can on the upper surface of thermal component 4, configure fin.When configuration fin, the heat producing in semiconductor chip 3 is transmitted to Heat Conduction Material 17 and sheds from thermal component 4 and fin.
[summary of the manufacture method of semiconductor device]
Then, by the summary (with reference to Fig. 7) of the manufacture method of explanation semiconductor device 1.
(S1) start the manufacture of semiconductor device 1, form and there are a plurality of insulating barriers 5,5 that comprise interaction cascading ... with a plurality of wiring layers 6,6 ... the wiring substrate 2 (substrate formation step) of multilayered wiring structure.
(S2) then, mounting semiconductor chip 3 (chip installation steps) on wiring substrate 2.Particularly, using the C4 projection 9,9 of the solder bump of the outer electrode as semiconductor chip 3 and wiring substrate 2 ... pass through solder bonds.
(S3) on the wiring substrate 2 of the surrounding of semiconductor chip 3, form sealing resin layer 18 (resin bed formation step) thereafter.
(S4) then, on the upper surface of semiconductor chip 3, engage Heat Conduction Material 17 and also coat binding resin 19 on sealing resin layer 18, and thermal component 4 (parts installation steps) is installed.The central portion of thermal component 4 is engaged with Heat Conduction Material 17, and with sealing resin layer 18 from outer circumferential side sealing semiconductor chips 3.
(S5) then, on the lower surface of wiring substrate 2, form soldered ball 12,12 ..., capacitor 13,13 ... Deng, and wiring substrate 2 is connected to (substrate installation steps) with circuit substrate by refluxing.
(S6) then, by ultrasonic waves tomoscanning device (SAT), check whether Heat Conduction Material (TIM) 17, with the upper surface of semiconductor chip 3, separated (inspection step) occurs.When check result judges that the upper surface of Heat Conduction Material 17 and semiconductor chip 3 is separated, process and shift to NG side (S7).On the other hand, when check result judges that Heat Conduction Material 17 is not separated with the upper surface of semiconductor chip 3, process and shift to OK side, and manufacture process finishes.
(S7) from the through hole 16,16 of thermal component 4 ... filling heat-conductive material 17.By from through hole 16,16 ... filling heat-conductive material 17, Heat Conduction Material 17 engages again with the upper surface of semiconductor chip 3, and repairs upper surface separated of Heat Conduction Material 17 and semiconductor chip 3.
[detailed description of the manufacture method of semiconductor device]
Then, in detail the manufacture method (with reference to Fig. 8~Figure 16) of semiconductor device 1 will be described.
First, there are wherein a plurality of insulating barriers 5,5 ... with a plurality of wiring layers 6,6 ... the wiring substrate 2 of the multilayered wiring structure of interaction cascading forms in step and forms at substrate.
Then, wiring substrate 2 semiconductor-on-insulator chips 3 with towards below state flip-chip (with reference to Fig. 8) is installed.Particularly, using the C4 projection 9,9 of the solder bump of the outer electrode as semiconductor chip 3 and wiring substrate 2 ... pass through solder bonds.
Then, (with reference to Fig. 9) filled with bottom potting resin material 15 in the gap between wiring substrate 2 and semiconductor chip 3.By the gap-fill bottom potting resin material 15 between wiring substrate 2 and semiconductor chip 3, with the dispersed state of the stress mounting semiconductor chip 3 on wiring substrate 2 producing from bonding part due to scolder reason.
In the following manner form sealing resin layer 18 (with reference to Figure 10~Figure 16) thereafter.
Sealing resin layer 18 is by using shaping dies 200 to form, and shaping dies 200 has upper die 201 and lower mould 202 (with reference to Figure 10).In upper die 201, formation will become the runner 201a of the stream of molten resin.Runner 201a is the stream that arrives the cavity 203 of formation when upper die 201 and lower mould 202 are fitted to each other.
In upper die 201, form the SS 201b being communicated with such as aspirating mechanisms such as pumps, 201b ...
In above-mentioned shaping dies 200, first, in the configuration of lower mould 202 with inserting and configure the wiring substrate 2 (with reference to Figure 10) that semiconductor chip 3 is installed on it in recess 202b.
Then, between upper die 201 and lower mould 202, insert release film 20.Release film 20 inserts in the position that covers whole wiring substrate 2.
Then, in dark mouthful of 202a of lower mould 202, drop into hard resin sheet 18A (with reference to Figure 11).Resin sheet 18A is to be used to form the material of sealing resin layer 18 and is the material that heating can become liquid.
Thereafter, operation aspirating mechanism, from SS 201b, 201b ... the air of discharge between upper die 201 and release film 20, and release film 20 is attached to the forming face 201c upper (with reference to Figure 12) of upper die 201.By this way, by using release film 20, can between aftermentioned molten resin that afterwards will cavity filling 203 and forming face 201c, in discontiguous situation, form sealing resin layer 18.Therefore, needn't clear up upper die 201, and can improve productivity and reduce manufacturing cost.
Then, upper die 201 and lower mould 202 are fitted to each other, and carry out mold cramping (with reference to Figure 13).By carrying out mold cramping, form cavity 203 and also release film 20 be attached on the upper surface of semiconductor chip 3.
Then, at resin sheet 18A, be heated under the state with melting, operated piston 204, so that resin sheet 18A flow to cavity 203 (with reference to Figure 14) from runner 201a.Now, resin sheet 18A becomes the liquid as molten resin 18B by heating, and molten resin 18B is filled in the cavity 203 of surrounding's formation of semiconductor chip 3.
, by carry out the heat treated of certain hour, be solidificated in molten resin 18B in cavity 203 thereafter, and at surrounding's formation sealing resin layer 18 (with reference to Figure 15) of semiconductor chip 3.
Finally, by upper die 201 and lower mould 202 release (with reference to Figure 16), and the wiring substrate 2 that is formed with sealing resin layer 18 on it is taken out from shaping dies 200.
[conclusion]
As mentioned above, in electronic equipment 100 and semiconductor device 1, in the thermal component 4 that the heat producing sheds, form the through hole 16,16 that is communicated with Heat Conduction Material 17 in making semiconductor chip 3 ...
Therefore, when warpage and Heat Conduction Material 17 occurring in semiconductor device 1 when separated with semiconductor chip 3, can pass through from through hole 16,16, filling heat-conductive material 17 is repaired separated to guarantee the good bond of Heat Conduction Material 17 and semiconductor chip 3, and the hot excellent radiating effect of guaranteeing generation in semiconductor chip 3.
In addition, because the end at Heat Conduction Material 17 opposition sides of through hole 16 forms the first tapered portion 16a that wherein becomes larger along with end apart from Heat Conduction Material 17 diameter far away, so Heat Conduction Material 17 can easily be injected into through hole 16, and can improve injection efficiency.
In addition, owing to forming the first tapered portion 16a in through hole 16, so while configuring fin on the upper surface at thermal component 4, improved the bond strength of Heat Conduction Material 17 with fin, the thermal conductive resin from Heat Conduction Material 17 to fin can be guaranteed, and thermal diffusivity can be improved.
In addition, because the end in Heat Conduction Material 17 sides of through hole 16 forms the second tapered portion 16b that wherein becomes larger along with end apart from the nearlyer diameter of Heat Conduction Material 17, so improved the bond strength of Heat Conduction Material 17 with thermal component 4, the thermal conductive resin from Heat Conduction Material 17 to thermal component 4 can be guaranteed, and thermal diffusivity can be improved.
In addition, in the manufacture process of semiconductor device 1, owing to checking whether Heat Conduction Material 17 occurs separated with semiconductor chip 3, so judge reliably whether Heat Conduction Material 17 occurs separated with semiconductor chip 3, and only pass through from through hole 16 where necessary, 16 ... filling heat-conductive material 17, can improve the manufacture efficiency of semiconductor device 1.
[this technology]
In addition, this technology can also have following formation.
(1) semiconductor device, comprising:
Wiring substrate, described wiring substrate has a plurality of insulating barriers and a plurality of wiring layer of interaction cascading, and described wiring layer is via being connected to each other by plug;
Semiconductor chip, described semiconductor chip is arranged on described wiring substrate;
Thermal component, described thermal component is configured on the opposite side of described wiring substrate, described semiconductor chip is clipped between described wiring substrate and described thermal component, and the heat producing in described semiconductor chip is shed;
Sealing resin layer, described sealing resin layer joins described wiring substrate and described thermal component between described wiring substrate and described thermal component, and seals described semiconductor chip from outer circumferential side; And
Heat Conduction Material, described Heat Conduction Material is in described sealing resin layer inner side and between described semiconductor chip and described thermal component, join described semiconductor chip and described thermal component to, and the heat producing in described semiconductor chip is transmitted to described thermal component
Wherein in described thermal component, form the through hole that is communicated with described Heat Conduction Material.
(2), according to the semiconductor device (1) described, the end at described Heat Conduction Material opposition side of wherein said through hole forms the tapered portion that wherein becomes larger along with the described end described Heat Conduction Material of distance diameter far away.
(3), according to the semiconductor device (1) described, the end in described Heat Conduction Material side of wherein said through hole forms the tapered portion that wherein becomes larger along with the nearlyer diameter of the described end described Heat Conduction Material of distance.
(4) according to the semiconductor device described in any one in (1)~(3), wherein check whether described Heat Conduction Material occurs separated with described semiconductor chip.
(5) manufacture method for semiconductor device, described method comprises:
Form wiring substrate, described wiring substrate has a plurality of insulating barriers and a plurality of wiring layer of interaction cascading, and described wiring layer is via being connected to each other by plug;
Mounting semiconductor chip on described wiring substrate;
Form sealing resin layer, described sealing resin layer joins described wiring substrate to and seals described semiconductor chip from outer circumferential side;
Thermal component is installed on described semiconductor chip, and described thermal component has communicative engagement to the through hole of the Heat Conduction Material of described semiconductor chip; And
Check whether described Heat Conduction Material occurs separated with described semiconductor chip.
(6) electronic equipment, comprising:
Circuit substrate, described circuit substrate is configured in the inside of shell; And
Semiconductor device, described semiconductor device is connected to the predetermining circuit in described circuit substrate,
Wherein said semiconductor device comprises
Wiring substrate, described wiring substrate has a plurality of insulating barriers and a plurality of wiring layer of interaction cascading, and described wiring layer is via being connected to each other by plug;
Semiconductor chip, described semiconductor chip is arranged on described wiring substrate;
Thermal component, described thermal component is configured on the opposite side of described wiring substrate, described semiconductor chip is clipped between described wiring substrate and described thermal component, and the heat producing in described semiconductor chip is shed;
Sealing resin layer, described sealing resin layer joins described wiring substrate and described thermal component between described wiring substrate and described thermal component, and seals described semiconductor chip from outer circumferential side; And
Heat Conduction Material, described Heat Conduction Material is in described sealing resin layer inner side and between described semiconductor chip and described thermal component, join described semiconductor chip and described thermal component to, and the heat producing in described semiconductor chip is transmitted to described thermal component
Wherein in described thermal component, form the through hole that is communicated with described Heat Conduction Material.
It will be appreciated by those skilled in the art that according to designing requirement and other factors, can in the scope of appending claims of the present invention or its equivalent, carry out various modifications, combination, inferior combination and change.
Claims (6)
1. a semiconductor device, comprising:
Wiring substrate, described wiring substrate has a plurality of insulating barriers and a plurality of wiring layer of interaction cascading, and described wiring layer is via being connected to each other by plug;
Semiconductor chip, described semiconductor chip is arranged on described wiring substrate;
Thermal component, described thermal component is configured on the opposite side of described wiring substrate, described semiconductor chip is clipped between described wiring substrate and described thermal component, and the heat producing in described semiconductor chip is shed;
Sealing resin layer, described sealing resin layer joins described wiring substrate and described thermal component between described wiring substrate and described thermal component, and seals described semiconductor chip from outer circumferential side; And
Heat Conduction Material, described Heat Conduction Material is in described sealing resin layer inner side and between described semiconductor chip and described thermal component, join described semiconductor chip and described thermal component to, and the heat producing in described semiconductor chip is transmitted to described thermal component
Wherein in described thermal component, form the through hole that is communicated with described Heat Conduction Material.
2. semiconductor device according to claim 1, the end at described Heat Conduction Material opposition side of wherein said through hole forms the tapered portion that wherein becomes larger along with the described end described Heat Conduction Material of distance diameter far away.
3. semiconductor device according to claim 1, the end in described Heat Conduction Material side of wherein said through hole forms the tapered portion that wherein becomes larger along with the nearlyer diameter of the described end described Heat Conduction Material of distance.
4. semiconductor device according to claim 1, wherein checks whether described Heat Conduction Material occurs separated with described semiconductor chip.
5. a manufacture method for semiconductor device, described method comprises:
Form wiring substrate, described wiring substrate has a plurality of insulating barriers and a plurality of wiring layer of interaction cascading, and described wiring layer is via being connected to each other by plug;
Mounting semiconductor chip on described wiring substrate;
Form sealing resin layer, described sealing resin layer joins described wiring substrate to and seals described semiconductor chip from outer circumferential side;
Thermal component is installed on described semiconductor chip, and described thermal component has communicative engagement to the through hole of the Heat Conduction Material of described semiconductor chip; And
Check whether described Heat Conduction Material occurs separated with described semiconductor chip.
6. an electronic equipment, comprising:
Circuit substrate, described circuit substrate is configured in the inside of shell; And
Semiconductor device, described semiconductor device is connected to the predetermining circuit in described circuit substrate,
Wherein said semiconductor device comprises
Wiring substrate, described wiring substrate has a plurality of insulating barriers and a plurality of wiring layer of interaction cascading, and described wiring layer is via being connected to each other by plug;
Semiconductor chip, described semiconductor chip is arranged on described wiring substrate;
Thermal component, described thermal component is configured on the opposite side of described wiring substrate, described semiconductor chip is clipped between described wiring substrate and described thermal component, and the heat producing in described semiconductor chip is shed;
Sealing resin layer, described sealing resin layer joins described wiring substrate and described thermal component between described wiring substrate and described thermal component, and seals described semiconductor chip from outer circumferential side; And
Heat Conduction Material, described Heat Conduction Material is in described sealing resin layer inner side and between described semiconductor chip and described thermal component, join described semiconductor chip and described thermal component to, and the heat producing in described semiconductor chip is transmitted to described thermal component
Wherein in described thermal component, form the through hole that is communicated with described Heat Conduction Material.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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JP2012-207434 | 2012-09-20 | ||
JP2012207434A JP2014063844A (en) | 2012-09-20 | 2012-09-20 | Semiconductor device, semiconductor device manufacturing method and electronic apparatus |
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CN103681589A true CN103681589A (en) | 2014-03-26 |
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CN201310392313.1A Pending CN103681589A (en) | 2012-09-20 | 2013-09-02 | Semiconductor device, method for manufacturing semiconductor device, and electronic device |
Country Status (3)
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US (1) | US20140077350A1 (en) |
JP (1) | JP2014063844A (en) |
CN (1) | CN103681589A (en) |
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Publication number | Priority date | Publication date | Assignee | Title |
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EP3128540B1 (en) * | 2014-04-04 | 2019-06-12 | KYOCERA Corporation | Thermosetting resin composition, semiconductor device and electrical/electronic component |
JP6327140B2 (en) * | 2014-12-15 | 2018-05-23 | 株式会社デンソー | Electronic equipment |
WO2018168591A1 (en) * | 2017-03-13 | 2018-09-20 | 株式会社村田製作所 | Module |
JP7088224B2 (en) * | 2019-03-19 | 2022-06-21 | 株式会社デンソー | Semiconductor modules and semiconductor devices used for them |
WO2021261001A1 (en) | 2020-06-25 | 2021-12-30 | 日立Astemo株式会社 | Processing device |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
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JP3815239B2 (en) * | 2001-03-13 | 2006-08-30 | 日本電気株式会社 | Semiconductor device mounting structure and printed wiring board |
US6455924B1 (en) * | 2001-03-22 | 2002-09-24 | International Business Machines Corporation | Stress-relieving heatsink structure and method of attachment to an electronic package |
US7015072B2 (en) * | 2001-07-11 | 2006-03-21 | Asat Limited | Method of manufacturing an enhanced thermal dissipation integrated circuit package |
US20030131476A1 (en) * | 2001-09-28 | 2003-07-17 | Vlad Ocher | Heat conduits and terminal radiator for microcircuit packaging and manufacturing process |
TW200428623A (en) * | 2003-06-11 | 2004-12-16 | Siliconware Precision Industries Co Ltd | Semiconductor package with heat sink |
JP2010103244A (en) * | 2008-10-22 | 2010-05-06 | Sony Corp | Semiconductor device, and method of manufacturing the same |
JP5210839B2 (en) * | 2008-12-10 | 2013-06-12 | 新光電気工業株式会社 | Wiring board and manufacturing method thereof |
JP2011222555A (en) * | 2010-04-02 | 2011-11-04 | Denso Corp | Method for manufacturing wiring board with built-in semiconductor chip |
JP5079059B2 (en) * | 2010-08-02 | 2012-11-21 | 日本特殊陶業株式会社 | Multilayer wiring board |
-
2012
- 2012-09-20 JP JP2012207434A patent/JP2014063844A/en active Pending
-
2013
- 2013-09-02 CN CN201310392313.1A patent/CN103681589A/en active Pending
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US20140077350A1 (en) | 2014-03-20 |
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Application publication date: 20140326 |