CN103673864B - Silicon germanium heterojunction nano-wire array takes into account preparation method as the strain of sensitive element - Google Patents

Abstract

The invention discloses a strain gauge with a silicon-germanium heterojunction nanowire array as a sensitive element. The strain gauge comprises a silicon-on-insulator wafer and an oxide layer covering the silicon-on-insulator wafer. A deep groove, and the side wall and bottom surface of the deep groove are provided with an oxide layer, and a window for growing nanowires is respectively provided on the two opposite side walls of the deep groove, and a tin nanoparticle catalyst layer is provided on the window. A silicon-germanium heterojunction nanowire array is grown on the particle catalyst layer, and two opposite windows are connected through the silicon-germanium heterojunction nanowire array. The strain gauge adopts a silicon-germanium heterojunction nanowire array as a sensitive element to improve the sensitivity of a sensitive source. At the same time, a preparation method of the strain gauge is disclosed. The preparation method is simple and compatible with the existing integrated circuit technology.

Description

Strain gauge and preparation method of silicon germanium heterojunction nanowire array as sensitive element

technical field

The invention relates to a nano-electro-mechanical system (abbreviation: NEMS) sensor sensitive element, in particular to a strain gauge with a silicon-germanium heterojunction nanowire array as a sensitive element and a preparation method thereof.

Background technique

Nanowires, especially nanowires of semiconductor materials, have attracted the attention of scientists due to the importance of silicon and germanium materials in today's integrated circuit field, and the compatibility of preparation processes with mature microelectronics processes. At present, nanowires of various materials have huge application space in different fields, such as light-emitting diodes (LEDs), solar energy, sensors and other fields. At the same time, the development of nanoelectromechanical systems (NEMS) technology has greatly reduced the size of pressure sensors. At the same time, due to the confinement effect at the nanoscale, nanomaterials as sensitive sources have excellent properties that are not available at the micron scale, thus greatly improving the sensitivity. The sensitivity of the source provides material support for the next generation of pressure sensors. Moreover, with the widespread attention of silicon-germanium heterojunction nanowires, their excellent properties have been gradually discovered.

Although single-component semiconductor nanomaterials also have a larger piezoresistive effect than bulk materials, the surface is usually passivated during the fabrication process, which makes the key factor that causes the giant piezoresistive effect at the nanometer scale - the significant difference in the surface state. Reduced, thus greatly reducing the piezoresistive effect. Usually in the application process, multiple groups of nanowires are used as the sensitive source at the same time to improve the sensitivity of the strain gauge. Silicon-germanium heterojunction nanowires often exhibit excellent performance due to the lattice mismatch of silicon-germanium and the quantum confinement effect. Due to the compatibility with today's mainstream integrated circuit technology in technology, the use of nanowires as sensitive elements of strain gauges is easier to integrate than other optical or magnetomotive materials, so it is an ideal material for strain gauges.

Contents of the invention

Technical problem: The technical problem to be solved by the present invention is to provide a strain gauge with a silicon-germanium heterojunction nanowire array as a sensitive element, which uses a silicon-germanium heterojunction nanowire array as a sensitive element to improve the sensitivity of the sensitive source and at the same time, a preparation method of the strain gauge is also provided, the preparation method is simple and compatible with the existing integrated circuit technology.

Technical solution: In order to solve the above-mentioned technical problems, the present invention adopts the following technical solutions:

A silicon-germanium heterojunction nanowire array as a strain gauge for sensitive elements, the strain gauge includes a silicon-on-insulator wafer and an oxide layer covering the silicon-on-insulator wafer, deep grooves are opened on the silicon-on-insulator wafer, and The side wall and the bottom surface of the deep groove are provided with an oxide layer, and a window for growing nanowires is respectively arranged on the two opposite side walls of the deep groove, a tin nanoparticle catalyst layer is arranged on the window, and a tin nanoparticle catalyst layer is arranged on the window. A silicon-germanium heterojunction nanowire array is grown, and two growing nanowires and opposite windows are connected through the silicon-germanium heterojunction nanowire array.

Further: the array density of the silicon-germanium heterojunction nanowire array is 20-70 per square micron, and the radius of the silicon-germanium heterojunction nanowire in the silicon-germanium heterojunction nanowire array is 20-80 nanometers.

A preparation method of the above-mentioned silicon-germanium heterojunction nanowire array as a strain gauge of a sensitive element, the preparation method comprises the following steps:

The first step is to form a protective oxide layer on the upper surface of the silicon-on-insulator wafer by thermal oxidation method, and make a silicon-on-insulator wafer with an oxide layer;

The second step is to open deep grooves: through photolithography and reactive ion etching methods, deep grooves are opened on the silicon-on-insulator wafer with an oxide layer prepared in the first step;

The third step is to open the window for growing nanowires: use photolithographic positioning technology to remove the oxide layer on the windows for growing nanowires on the two side walls of the deep groove to form windows for growing nanowires; The walls, except for the windows, are covered with an oxide layer;

The fourth step is to use the electrodeposition method to obtain a tin nanoparticle catalyst layer on the surface of the window where the nanowire is grown;

The fifth step is to use the solution gas phase method to synchronously grow silicon-germanium heterojunction nanowires at the abrupt interface on the surface of the tin nanoparticle catalyst layer to form a silicon-germanium heterojunction nanowire array, so that the growth nanowires on the two side walls of the deep groove The windows of the wires are connected through silicon-germanium heterojunction nanowire arrays.

Further, the preparation method of the silicon-germanium heterojunction nanowire in the fifth step includes the following steps:

Step 501) thermally decomposing stupid silane at 450-470°C to generate silane gas, which is used as a precursor gas, and using the precursor gas to grow silicon nano-segments on the surface of the tin nanoparticle catalyst layer;

Step 502) Lower the temperature to 420-440°C to stop the growth of silicon nano-segments, and at the same time, inject triphenylgermane liquid into the flask, and thermally decompose to generate germane gas, which is used as the precursor gas of germanium nano-segments. Growth of germanium nano-segments;

Step 503) Step 501) and Step 502) are periodically repeated to form silicon-germanium heterojunction nanowires with abrupt interface until the silicon-germanium heterojunction nanowires are connected to the windows for growing nanowires on the two side walls of the deep groove.

Further, the second step includes the following process: Step 201) using a reactive ion etching process to etch and form deep grooves on the silicon-on-insulator wafer (1), so that the silicon in the silicon-on-insulator wafer (1) The remaining layer is 300-500 nanometers thick, step 202) using thermal oxidation process to cover the entire silicon wafer (1) on the insulator with an oxide layer, step 203) using reactive ion etching process, using hydrofluoric acid solution to remove deep Oxide layer at the bottom of the groove, step 204) Reactive ion etching is performed on the bottom of the deep groove to remove part of the silicon in the silicon layer of the silicon-on-insulator wafer (1) located below the deep groove, so that the two sides of the bottom of the deep groove are left Silicon with a thickness of 200-400 nanometers, step 205) Forming an oxide layer with a thickness of 30-60 nanometers on the bottom and sidewalls of the deep trench by using a thermal oxidation process.

Further, in the fourth step, the silicon-on-insulator wafer is immersed in a microemulsion composed of a mixed aqueous solution and a surfactant solution at a volume ratio of 1:6-15, wherein the mixed aqueous solution has a molar concentration of 0.01 -0.05mol/L tin salt solution and hydrofluoric acid solution with a molar concentration of 0.2-0.4mol/L, and the surfactant solution is composed of diisooctyl maleate sulfonate and n-heptane solution , to form a surfactant solution with a molar concentration of 0.2-0.4mol/L; at room temperature, ultrasonically treat the microemulsion for 20-40 minutes to form a tin nanoparticle catalyst layer with a radius of 5-10 nm and a density of 500-1200 per square micron.

Beneficial effects: compared with the prior art, the present invention has the following beneficial effects:

1. The sensitivity and anti-noise ability are improved. In the field of NEMS technology, photolithography and reactive ion etching technology can be used to open deep grooves on silicon SOI wafers, and position nanowire growth windows on the side walls, and then use electrodeposition methods to deposit high-density tin nanoparticles. Silicon-germanium heterojunction nanowires were grown using the SVG method. Due to the different temperatures used when growing the silicon germanium segment, the nanowires obtained in this way have high silicon germanium interface mutations, which are larger than silicon nanowires and silicon/silicon germanium heterojunction nanostructure piezoresistive coefficients. At the same time, the obtained The nanowire array has a high density. This effectively improves the sensitivity of the strain gauge, the ability to resist noise, and reduces the resistance.

2. The substrate for growing silicon-germanium heterojunction nanometers in the present invention is a (110) SOI wafer, which has a highly doped P-type Si (110) device layer with a resistivity of less than 0.1Ω*cm. Using photolithography and subsequent reactive ion etching to open grooves, the orientation between the walls on both sides is the <111> direction, and the width of the deep groove can well control the length of the nanowire. The width between the sidewalls is the length of the nanowires, which can well ensure the consistency of the nanowire array.

3. Low cost. In the present invention, tin (Sn) is used as the catalyst, the cost is low, and the requirements for growing silicon and germanium nano-segments can be efficiently met at the same time. More critically, the proportion of silicon and germanium in the alloy formed during the reaction is less than 1%.

4. The present invention uses photolithography to position and open the growth area of nanowires, and uses electrodeposited metal catalyst to ensure that the catalyst is only deposited in the specified area and does not appear in the oxide layer area.

Description of drawings

Fig. 1 is a schematic structural view of the strain gauge of the present invention.

Fig. 2 is a schematic diagram of the positional relationship between the window and the SiGe heterojunction nanowire array in the present invention.

Fig. 3 is a schematic diagram of the growth of the SiGe heterojunction nanowire array in the present invention.

Fig. 4 is a schematic structural diagram of the second step (step 201) in the preparation method of the present invention.

Fig. 5 is a schematic structural diagram of the second step (step 202) in the preparation method of the present invention.

Fig. 6 is a schematic structural diagram of the second step (step 203) in the preparation method of the present invention.

Fig. 7 is a schematic structural diagram of the second step (step 204) in the preparation method of the present invention.

Fig. 8 is a schematic structural diagram of the second step (step 205) in the preparation method of the present invention.

In the figure are: silicon-on-insulator wafer 1, window 2, first side wall 3, second side wall 4, silicon-germanium heterojunction nanowire array 5, tin nanoparticle catalyst layer 6, silicon nano-segment 7, germanium nano Segment 8, oxide layer 9.

detailed description

The technical solution of the present invention will be described in detail below in conjunction with the accompanying drawings.

As shown in Figure 1 and Figure 2, the silicon-germanium heterojunction nanowire array of the present invention is used as a strain gauge for sensitive elements, including a silicon-on-insulator wafer 1 (silicon on insulator, Silicon on Insulator, abbreviated as: SOI in the text), and covered in The oxide layer 9 on the silicon-on-insulator wafer 1 is provided with deep grooves on the silicon-on-insulator wafer 1, and the side walls and bottom surfaces of the deep grooves are provided with oxide layers. There is a window 2 for growing nanowires, the window 2 is provided with a tin nanoparticle catalyst layer 6, a silicon germanium heterojunction nanowire array 5 is grown on the tin nanoparticle catalyst layer 6, two opposite windows 2 for growing nanowires The silicon germanium heterojunction nanowire array 5 is connected.

Further: the array density of the silicon-germanium heterojunction nanowire array 5 is 20-70 per square micron, and the radius of the silicon-germanium heterojunction nanowire in the silicon-germanium heterojunction nanowire array 5 is 20-80 nanometers.

The above-mentioned silicon germanium heterojunction nanowire array is used as a method for preparing a strain gauge of a sensitive element, comprising the following steps:

In the first step, a protective oxide layer is formed on the upper surface of the silicon-on-insulator wafer 1 by a thermal oxidation method, and a silicon-on-insulator wafer with an oxide layer is manufactured;

The second step is to open deep grooves: through photolithography and reactive ion etching methods, deep grooves are opened on the silicon-on-insulator wafer with an oxide layer prepared in the first step.

The second step specifically includes the following process: Step 201), as shown in FIG. 4, adopts reactive ion etching process to etch and form deep grooves on the silicon-on-insulator wafer 1, so that the silicon layer in the silicon-on-insulator wafer 1 The remaining thickness is 300-500 nanometers; step 202), as shown in Figure 5, using a thermal oxidation process to cover the entire silicon-on-insulator wafer 1 with an oxide layer; step 203), as shown in Figure 6, using reactive ion etching Etching process, using hydrofluoric acid solution to remove the oxide layer at the bottom of the deep groove; step 204), as shown in Figure 7, perform a reactive ion etching on the bottom of the deep groove to remove the silicon-on-insulator wafer 1 located below the deep groove part of the silicon in the silicon layer, leaving silicon with a thickness of 200-400 nanometers on both sides of the bottom of the deep groove; step 205), as shown in Figure 8, using a thermal oxidation process, on the bottom and side walls of the deep groove, An oxide layer with a thickness of 30-60 nanometers is formed.

The third step is to open the window 2 for growing nanowires: use the photolithographic positioning process to remove the oxide layer on the window for growing nanowires on the two side walls of the deep groove to form the window 2 for growing nanowires; deep groove On both side walls, other positions except the window 2 are covered with an oxide layer.

The fourth step is to use the electrodeposition method to obtain a tin nanoparticle catalyst layer 6 on the surface of the window 2 where the nanowires grow.

In the above fourth step, the silicon-on-insulator wafer 1 is immersed in a microemulsion composed of a mixed aqueous solution and a surfactant solution at a volume ratio of 1:6-15, wherein the mixed aqueous solution has a molar concentration of 0.01-0.05mol /L tin salt solution and hydrofluoric acid solution with a molar concentration of 0.2-0.4mol/L, the surfactant solution is composed of diisooctyl maleate sulfonate and n-heptane solution to form a molar A surfactant solution with a concentration of 0.2-0.4mol/L; at room temperature, ultrasonically treat the microemulsion for 20-40 minutes to form a tin nanoparticle catalyst layer with a radius of 5-10 nanometers and a density of 500-1200 per square micron .

The fifth step is to use the solution gas phase method to synchronously grow silicon-germanium heterojunction nanowires at the abrupt interface on the surface of the tin nanoparticle catalyst layer 6 to form a silicon-germanium heterojunction nanowire array 5, so that the two sides of the deep groove The windows 2 for growing nanowires are connected through silicon germanium heterojunction nanowire arrays 5 .

As shown in Figure 3, in the fifth step above, the preparation method of silicon-germanium heterojunction nanowires includes the following steps:

Step 501) Thermally decomposing silane (PS) at 450-470°C to generate silane gas as a precursor gas, and using the precursor gas to grow silicon nano-segments 7 on the surface of the tin nanoparticle catalyst layer 6;

Step 502) Lower the temperature to 420-440°C, stop the growth of silicon nano-segments 7, and inject triphenylgermane liquid into the flask at the same time, thermally decompose to generate germane gas, which is used as the precursor gas of germanium nano-segments 8, growing germanium nano-segments 8 on the nano-segments 7;

Step 503) Step 501) and Step 502) are periodically repeated to form silicon-germanium heterojunction nanowires with abrupt interface until the silicon-germanium heterojunction nanowires are connected to the windows 2 for growing nanowires on the two side walls of the deep groove.

Example

Utilize above-mentioned preparation method to prepare strain gauge:

1) Prepare SOI substrate: select P-type heavily doped device layer SOI substrate, in which the thickness of the device layer is 1.6 microns, the resistivity is less than 0.1Ω*cm, and the buried oxide layer is 2.0 microns;

2) Thermal oxidation: obtain an oxide layer with a thickness of 600 nm on the surface of the SOI substrate;

3) Photolithography: remove the oxide layer between the first sidewall 3 and the second sidewall 4;

4) Reactive ion etching: deep grooves are opened on the SOI substrate. At this time, the device layer is still 400 nanometers thick; the first sidewall 3 and the second sidewall 4 on the SOI substrate are separated by deep grooves ;

5) The second thermal oxidation: an oxide layer with a thickness of 200 nanometers is obtained, and the thickness of the device layer is 300 nanometers;

6) Photolithography: remove the oxide layer on the residual device layer;

7) The second reactive ion etching: the device layer between the two side walls is completely etched away. At this time, the 300 nm thick area under the side wall is not covered with the oxide layer;

8) The third thermal oxidation: a 50nm thin oxide layer is formed locally on the exposed silicon area under the sidewall;

9) Photolithography: use hydrofluoric acid solution to remove the thin oxide layer of the window of the growing nanowire region;

10) Electrodeposition of tin nanoparticles: During the deposition process, the substrate is immersed in a microemulsion containing tin salt solution, hydrofluoric acid solution and surfactant, and ultrasonically treated for 30 minutes at room temperature to form particles with a radius of 5-10 nm. particles;

11) Growth of silicon-germanium heterojunction nanowire arrays by solution vapor phase method: first, grow silicon segment 7 at a temperature of 460°C, thermally decompose phenylsilane to generate a precursor gas for 5-20 minutes, then lower the temperature to 430°C, and then Inject triphenylsilane to grow germanium segments for 5-20 minutes, and then periodically grow silicon segments and germanium segments until the nanowires are successfully assembled with the opposite sidewall.

In the above technical solution, the preparation of the silicon germanium heterojunction nanowire array uses photolithography to assist in positioning the growth region, and utilizes the efficient solution vapor phase growth (SVG) method: etching a deep groove of a specific size on the SOI silicon wafer, And opening a silicon region not covered with an oxide layer in the region where the silicon germanium nanowire array is grown. In the third step of deoxidation, a buffered hydrofluoric acid (BHF) solution is used, and the etching time is well controlled, so that the oxide layer in the growing nanowire area is removed, and other areas are still covered by the oxide layer. Electrodeposition is used to plate tin nanoparticles as a catalyst for growing nanowires. During the deposition process, the substrate is immersed in a microemulsion containing tin salt solution, hydrofluoric acid solution and surfactant, and is ultrasonically treated for 30 minutes at room temperature to form Particles with a radius of 5-10 nm. In the fifth step, the temperature for growing silicon nanowire segments is 460°C, which is 300°C lower than the temperature for growing nanowires using gold as a catalyst in the conventional vapor-liquid-solid growth (VLS) method, and the precursor gas silane is in the growth device Produced by thermal decomposition of phenylsilane (PS). With the growth of the silicon fragments, the temperature was lowered to 430°C to stop the growth of the silicon nano-segments and prevent the residual silane from continuing to react to ensure the purity of the germanium nano-segments, so as to obtain a good abrupt interface. At the same time, triphenylgermane (English full name: triphenylgermane, abbreviation: TPG) is injected into the device, and TPG decomposes at 430°C to produce germane for growing germanium nanowires. The above process is repeated until the nanowire grows to the opposite side wall.

The strain gauge based on the silicon-germanium heterojunction nanowire array of the present invention comprises two parts: an SOI substrate and a silicon-germanium heterojunction nanowire array. There is a growing nanowire array area under the deep groove on the SOI substrate, and the nanowire array is a silicon germanium heterojunction nanowire array. A reliable connection is formed by self-assembly of the two parts. In the strain gauge, the silicon germanium nanowire array senses the change of the stress on the device, and the electrode output is reflected as the change of the electrical parameter, so as to realize the strain gauge with high sensitivity. The invention adopts the silicon-germanium heterojunction nanowire structure with abrupt interface, and the piezoresistive coefficient of the structure is larger than that of the silicon material, thereby improving the sensitivity. Adding the array structure improves the sensitivity to stress changes. Since the silicon-germanium heterojunction nanowire arrays are connected in parallel, the magnitude of the overall electrical parameter change is increased, thereby weakening the interference of noise.

The invention uses the silicon-germanium heterojunction nanowire array structure as the strain gauge of the sensitive element, so as to obtain high resistance coefficient, high anti-noise ability and high sensitivity.

Claims (6)

1. A silicon-germanium heterojunction nanowire array is used as a strain gauge of a sensitive element, characterized in that the strain gauge comprises a silicon-on-insulator wafer (1), and an oxide film covered on the silicon-on-insulator wafer (1) layer (9), a deep groove is opened on the silicon-on-insulator wafer (1), and the sidewall and bottom surface of the deep groove are provided with an oxide layer, and a growth nanowire is respectively arranged on the two opposite sidewalls of the deep groove. window (2), the window (2) is provided with a tin nanoparticle catalyst layer (6), and a silicon germanium heterojunction nanowire array (5) is grown on the tin nanoparticle catalyst layer (6), two growth nanowires And the opposite windows (2) are connected through the silicon-germanium heterojunction nanowire array (5). 2. The silicon-germanium heterojunction nanowire array according to claim 1 is used as the strain gauge of the sensitive element, characterized in that: the array density of the silicon-germanium heterojunction nanowire array (5) is 20-70 per The square micron, the radius of the silicon germanium heterojunction nanowires in the silicon germanium heterojunction nanowire array (5) is 20-80 nanometers. 3. a preparation method of the silicon germanium heterojunction nanowire array as claimed in claim 1 as the strain gauge of the sensitive element, it is characterized in that, the preparation method comprises the following steps: In the first step, a protective oxide layer is formed on the upper surface of the silicon-on-insulator wafer (1) by a thermal oxidation method, and a silicon-on-insulator wafer with an oxide layer is manufactured; The second step is to open deep grooves: through photolithography and reactive ion etching methods, deep grooves are opened on the silicon-on-insulator wafer with an oxide layer prepared in the first step; The third step is to open a window for growing nanowires (2): use a photolithography positioning process to remove the oxide layer on the windows for growing nanowires on the two side walls of the deep groove to form a window for growing nanowires (2). ); on the two side walls of the deep groove, the rest of the positions except the window (2) are covered with an oxide layer; The fourth step is to obtain a tin nanoparticle catalyst layer (6) on the surface of the window (2) where the nanowire grows by using an electrodeposition method; The fifth step is to use the solution gas phase method to synchronously grow silicon-germanium heterojunction nanowires at the abrupt interface on the surface of the tin nanoparticle catalyst layer (6) to form a silicon-germanium heterojunction nanowire array (5), so that the two deep grooves The windows (2) for growing nanowires on the side walls are connected through silicon germanium heterojunction nanowire arrays (5). 4. the silicon germanium heterojunction nanowire array according to claim 3 is as the preparation method of the strain gauge of sensitive element, it is characterized in that, the preparation method of the silicon germanium heterojunction nanowire in the described 5th step comprises The following steps: Step 501) Thermally decomposing stupid silane at 450-470°C to generate silane gas, which is used as a precursor gas, and using the precursor gas to grow silicon nano-segments (7) on the surface of the tin nanoparticle catalyst layer (6); Step 502) Lower the temperature to 420-440° C., stop the growth of the silicon nano-segment (7), and inject triphenylgermane liquid into the flask at the same time, thermally decompose to generate germane gas as the precursor of the germanium nano-segment (8) Gas, growing germanium nano-segment (8) on silicon nano-segment (7); Step 503) Step 501) and Step 502) are periodically repeated to form silicon-germanium heterojunction nanowires with abrupt interface until the silicon-germanium heterojunction nanowires are connected to the windows (2 ). 5. the silicon-germanium heterojunction nanowire array according to claim 3 is as the preparation method of the strain gauge of sensitive element, it is characterized in that, described second step comprises the following process: step 201) adopts reactive ion etching process , etch and form a deep groove on the silicon-on-insulator wafer (1), so that the silicon layer in the silicon-on-insulator wafer (1) is 300-500 nanometers thick, and step 202) utilizes a thermal oxidation process to make the entire silicon-on-insulator The wafer (1) is covered with an oxide layer, step 203) utilizes reactive ion etching process, adopts hydrofluoric acid solution, removes the oxide layer at the bottom of the deep groove, step 204) performs a reactive ion etching on the bottom of the deep groove to remove Part of the silicon in the silicon-on-insulator wafer (1) silicon layer located below the deep groove, so that the two sides of the bottom of the deep groove leave silicon with a thickness of 200-400 nanometers. Step 205) utilizes a thermal oxidation process. On the bottom and sidewalls, an oxide layer with a thickness of 30-60 nanometers is formed. 6. according to claim 3,4 or 5 described silicon-germanium heterojunction nanowire arrays as the preparation method of the strain gauge of sensitive element, it is characterized in that, in the described 4th step, silicon-on-insulator wafer ( 1) Submerged in a microemulsion consisting of a mixed aqueous solution and a surfactant solution at a volume ratio of 1:6-15, wherein the mixed aqueous solution is composed of a tin salt solution with a molar concentration of 0.01-0.05mol/L and a molar concentration of 0.2 -0.4mol/L hydrofluoric acid solution, the surfactant solution is composed of diisooctyl maleate sulfonate and n-heptane solution to form a surface active agent with a molar concentration of 0.2-0.4mol/L agent solution; at room temperature, ultrasonically treat the microemulsion for 20-40 minutes to form a tin nanoparticle catalyst layer with a radius of 5-10 nanometers and a density of 500-1200 per square micron.