CN103632965A - Method of preparing a groove grid-control power device - Google Patents
Method of preparing a groove grid-control power device Download PDFInfo
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- CN103632965A CN103632965A CN201210298920.7A CN201210298920A CN103632965A CN 103632965 A CN103632965 A CN 103632965A CN 201210298920 A CN201210298920 A CN 201210298920A CN 103632965 A CN103632965 A CN 103632965A
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- 238000000034 method Methods 0.000 title claims abstract description 30
- 229910052751 metal Inorganic materials 0.000 claims abstract description 38
- 239000002184 metal Substances 0.000 claims abstract description 38
- 239000002019 doping agent Substances 0.000 claims abstract description 25
- 238000000151 deposition Methods 0.000 claims abstract description 16
- 239000000758 substrate Substances 0.000 claims abstract description 8
- 238000000576 coating method Methods 0.000 claims description 13
- 238000001459 lithography Methods 0.000 claims description 13
- 239000011248 coating agent Substances 0.000 claims description 12
- 230000008021 deposition Effects 0.000 claims description 10
- 238000005260 corrosion Methods 0.000 claims description 9
- 230000007797 corrosion Effects 0.000 claims description 9
- 229920005591 polysilicon Polymers 0.000 claims description 9
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 8
- 238000009825 accumulation Methods 0.000 claims description 7
- 230000003647 oxidation Effects 0.000 claims description 7
- 238000007254 oxidation reaction Methods 0.000 claims description 7
- 238000004064 recycling Methods 0.000 claims description 5
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 4
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 4
- 239000010936 titanium Substances 0.000 claims description 4
- 229910052719 titanium Inorganic materials 0.000 claims description 4
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 4
- 229910052721 tungsten Inorganic materials 0.000 claims description 4
- 239000010937 tungsten Substances 0.000 claims description 4
- 238000005530 etching Methods 0.000 claims description 3
- 238000005498 polishing Methods 0.000 claims description 3
- 238000002360 preparation method Methods 0.000 abstract description 10
- 239000010410 layer Substances 0.000 abstract 6
- 230000003628 erosive effect Effects 0.000 abstract 4
- 239000011229 interlayer Substances 0.000 abstract 3
- 230000000873 masking effect Effects 0.000 abstract 2
- 230000004048 modification Effects 0.000 description 30
- 238000012986 modification Methods 0.000 description 30
- 238000010586 diagram Methods 0.000 description 11
- 230000015556 catabolic process Effects 0.000 description 8
- 238000004519 manufacturing process Methods 0.000 description 8
- 239000004065 semiconductor Substances 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 238000002347 injection Methods 0.000 description 3
- 239000007924 injection Substances 0.000 description 3
- 229910052698 phosphorus Inorganic materials 0.000 description 3
- 239000011574 phosphorus Substances 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- JRBRVDCKNXZZGH-UHFFFAOYSA-N alumane;copper Chemical compound [AlH3].[Cu] JRBRVDCKNXZZGH-UHFFFAOYSA-N 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
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- 229910044991 metal oxide Inorganic materials 0.000 description 1
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- 235000012239 silicon dioxide Nutrition 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66613—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
Abstract
The invention discloses a method of preparing a groove grid-control power device, the method comprising the steps of first eroding an epitaxial layer on a substrate by use of a groove mask to form a plurality of grooves; then, injecting a P-type dopant and an N-type dopant into the epitaxial layer to form a P-type base region and an N-type source region respectively, then depositing an interlayer dielectric on the surface of the epitaxial layer, eroding the interlayer dielectric by use of a contact hole mask to form an opening in the interlayer dielectric, eroding the surface of the epitaxial layer later to form a contact hole groove and carrying out metal plugging filling on the contact hole groove; and finally, depositing a metal layer on the surface of a device, and carrying out metal eroding by use of a metal mask to form a metal cushion layer and connection wires. By adopting the method of preparing the groove grid-control power device, preparation procedures of base region masking and source region masking are eliminated, and the preparation cost of the device is greatly reduced.
Description
Technical field
The present invention relates to semiconductor power discrete device technical field, specifically, relate to a kind of preparation method of grooved semiconductor power discrete device.
Background technology
At present, power MOSFET (Metal Oxide Semiconductor Field Effect Transistor, mos field effect transistor) each electron-like, communication product have been widely used in, computer, consumer appliances, automobiles etc., meanwhile, it also has a multiple application industrial.
The power semiconductor of power MOSFET representative, because conducting resistance is low and can speed-sensitive switch, so it can control the large electric current of high frequency effectively.Meanwhile, power MOSFET is just being utilized power unit switch, the power circuit at for example power amplifier, power converter, low noise amplifier and some personal computers widely as mini power conversion element, is characterized in that low-power consumption, speed are fast.
Groove type power MOS FET, because it has advantages of structural efficient and on-resistance characteristics is low, it is controlled and is widely used with electronic device as power supply, the flourish power circuit that requires of industry has higher efficiency and less power consumption, require low price simultaneously, force manufacturer that cost of manufacture is reduced.
In the Design and manufacture field of existing groove type power MOS FET, the base of MOSFET and source region are all to need separately base mask and active region mask step to introduce, in order to reduce manufacturing cost, before some, propose, as one piece of article (Japanese Journal of Applied Physics Vol 47 of the Japanese applied physics magazine disclosing, No.3, 2008, pp.1507-1511), or american documentation literature US20110233667, US20090085074, US20110233666, US077996427 etc., attempt to omit the manufacture method of base or active region mask step, its step is comparatively complicated, be difficult for generating, or its terminal (termination) structure is bad, so that the puncture voltage of the semiconductor device producing is relative with reliability poor.
Summary of the invention
The present invention has overcome shortcoming of the prior art, a kind of method of preparing groove grid-control power device is provided, it is few compared with previous groove type power discrete device manufacture method step, omitted base and active region mask step or only omitted base masks, reduced the manufacturing cost of groove type power discrete device, and do not affect the electric property of groove type power discrete device, q&r, and then improved the ratio of performance to price of semiconductor device.
In order to solve the problems of the technologies described above, the present invention is achieved through the following technical solutions and omits base and active region mask step:
A method of preparing groove grid-control power device, comprises the following steps:
(1) utilize trench mask to corroding on the epitaxial loayer 200 on substrate 10, to form a plurality of grooves (300);
(2) then, epitaxial loayer is injected to P type dopant and N-type dopant, form respectively P type base (201) and N-type source region (204);
(3) at epitaxial loayer surface deposition inter-level dielectric 401, recycling contact hole mask, corrodes inter-level dielectric, forms perforate in inter-level dielectric, afterwards epi-layer surface is corroded and forms contact hole groove, and contact hole groove is carried out to metal plug filling;
(4) at the upper surface depositing metal layers 404 of device, utilize metal mask to carry out metal attack, form source region metal bed course (405) and gate trace (406) and termination environment field plate (407).
Further, described step (1) comprises the following steps:
A, on epitaxial loayer, form oxide layer, accumulation lithography coating 1000 in oxide layer, by trench mask, expose partial oxidation layer again, the partial oxidation layer exposing is carried out to dry corrosion, until expose epitaxial loayer, be formed on a plurality of trench mask perforates in oxide layer, then dispose lithography coating;
B, by epitaxial loayer etching is formed to groove 300, this groove extends in epitaxial loayer, to the oxidation of groove sacrifice property, then disposes all oxide layers;
C, the sidewall exposing at groove and bottom, and the upper surface of epitaxial loayer forms grid oxic horizon 301, then in groove, deposit the polysilicon 302 of N-type high dopant, with filling groove and cover end face;
D, to carrying out plane corrosion treatment or chemico-mechanical polishing at the lip-deep polysilicon layer of epitaxial loayer.
Further, described step (1) comprises the following steps in a kind of modification of the present invention (embodiment): in step b, the width of described groove 300 is not all the same, place, termination environment has at least a groove 303A continuously active area to be fenced up, wherein the groove width scope in active area is 0.15um to 1.5um, and the groove width of termination environment and the groove width of active area are different; The groove width of termination environment is narrower than the groove width of active area, if the groove width of active area is 0.2um, the groove width of termination environment is 0.15um, this can make the puncture voltage of active area force down than the breakdown potential of termination environment, puncturing of device first occurred in active area, thereby the puncture voltage of device is more stable, with reference to Figure 14.
Further, described step (1) comprises the following steps in a kind of modification of the present invention (embodiment): in step b, the degree of depth of described groove 300 is not all the same, place, termination environment has at least a groove 303A continuously active area to be fenced up, wherein the gash depth scope in active area is 0.8um to 5.0um, and the gash depth of termination environment and the gash depth of active area are different; The gash depth of termination environment is more shallow than the gash depth of active area, if the gash depth of active area is 1.0um, the gash depth of termination environment is 0.8um, this can make the puncture voltage of active area force down than the breakdown potential of termination environment, puncturing of device first occurred in active area, thereby the puncture voltage of device is more stable, with reference to Figure 14 with reference to Figure 17.
Further, described step (1) comprises the following steps in a kind of modification of the present invention (embodiment): in step b, the width of described groove 300 is not all the same, place, termination environment has at least a groove 303A continuously active area to be fenced up, wherein the groove width scope in active area is 0.15um to 1.5um, the groove width of termination environment is wider than the groove width of active area, if the groove width of active area is 0.2um, the groove width of termination environment is 0.8um, this can make the puncture voltage of active area force down than the breakdown potential of termination environment, puncturing of device first occurred in active area, thereby the puncture voltage of device is more stable, with reference to Figure 15.
Further, described step (1) comprises the following steps in a kind of modification of the present invention (embodiment): in step b, the width of described groove 300 is not all the same, place, termination environment has at least two groove 303A and 303B continuously active area to be fenced up, at the groove of active area and the distance range of groove, be wherein 0.8um to 3.0um, the groove of termination environment is narrow with the distance of groove than the distance of the groove of active area and groove, if the distance of the groove of active area and groove is 1.0um, the groove of termination environment and the distance of groove are 0.18um, this can make the puncture voltage of active area force down than the breakdown potential of termination environment, puncturing of device first occurred in active area, thereby the puncture voltage of device is more stable, with reference to Figure 13, Figure 14, Figure 15 and Figure 16.
Further, described step (2) comprises the following steps:
A, on surface, inject P type dopant, and by a High temperature diffusion operation, P type dopant is advanced to be diffused into and in epitaxial loayer, form P type base 201;
B, on surface, inject N-type dopant, and by secondary high-temperature, spread operation the propelling of N-type dopant is diffused in P type base and forms N-type source region 204;
Further, described step (3) comprises the following steps:
A, at topsheet surface deposition inter-level dielectric;
B, at inter-level dielectric surface accumulation lithography coating, utilize contact hole mask to expose part inter-level dielectric, then the part inter-level dielectric exposing is carried out to dry corrosion, until expose epitaxial loayer, in inter-level dielectric, form a plurality of contact hole mask perforates, then dispose lithography coating;
C, by inter-level dielectric perforate, epi-layer surface is corroded, form contact hole groove, contact hole groove enters into P type base through N-type source region, afterwards contact hole groove is injected to P type high dopant;
D, on contact hole trenched side-wall, bottom and inter-level dielectric surface, deposit successively one deck titanium layer and one deck titanium nitride layer, then contact hole groove is carried out to tungsten filling to form contact hole trench metal connector.
Further, described step (3) is characterised in that, in step a, in topsheet surface, deposits successively undoped silicon and boro-phosphorus glass forms inter-level dielectric.
Further, described step (3) comprises the following steps in a kind of modification of the present invention (embodiment):
In step b, contact hole mask does not have contact hole at place, termination environment except gate trench, and in termination environment, place does not form contact hole groove except gate trench, puncturing of device first occurred in active area, thereby the puncture voltage of device is more stable, with reference to Figure 14, Figure 15 and Figure 16.
Further, described step (3) comprises the following steps in a kind of modification of the present invention (embodiment):
In step b, contact hole mask has a contact hole at least at place, termination environment except gate trench, in termination environment, place forms and has a contact hole groove at least except gate trench, puncturing of device first occurred in active area, thereby the puncture voltage of device is more stable, with reference to Figure 17, Figure 18, Figure 19 and Figure 20.
Further, described step (3) comprises the following steps in a kind of modification of the present invention (embodiment):
In step b, contact hole mask has contact hole that the N district of groove both sides is removed at place, termination environment, and the width of this contact hole that the N district of groove both sides is removed is that 0.2um to 10.0um is with reference to Figure 18.
Further, described step (3) comprises the following steps in a kind of modification of the present invention (embodiment):
In step b, contact hole mask has contact hole that the N district of groove both sides is removed at place, termination environment, together with groove top, remove, the width of this contact hole that groove top is also removed is together 0.6um to 10.0um, puncturing of device first occurred in active area, thereby the puncture voltage of device is more stable, with reference to Figure 21.
Preparation method of the present invention also can be used for only having omitted base mask and source region needs active region mask step to introduce, and its preparation method comprises the following steps:
(1) utilize trench mask to corroding on the epitaxial loayer 200 on substrate 10, to form a plurality of grooves (300);
(2) epitaxial loayer is injected to P type dopant and form P type base (201);
(3) utilize active region mask step to form source region (204);
(4) at epitaxial loayer surface deposition inter-level dielectric 401, recycling contact hole mask, corrodes inter-level dielectric, forms perforate in inter-level dielectric, afterwards epi-layer surface is corroded and forms contact hole groove, and contact hole groove is carried out to metal plug filling;
(5) at the upper surface depositing metal layers 404 of device, utilize metal mask to carry out metal attack, form source region metal bed course (405) and gate trace (406) and termination environment field plate (407).
Further, described step (1) comprises the following steps in a kind of modification of the present invention (embodiment): in step (1), the width of described groove 300 is not all the same, place, termination environment has at least a groove 303A continuously active area to be fenced up, wherein the groove width scope in active area is 0.15um to 1.5um, and the groove width of termination environment and the groove width of active area are different; The groove width of termination environment is narrower than the groove width of active area, if the groove width of active area is 0.2um, the groove width of termination environment is 0.15um, this can make the puncture voltage of active area force down than the breakdown potential of termination environment, puncturing of device first occurred in active area, thereby the puncture voltage of device is more stable, with reference to Figure 22.
Further, described step (1) comprises the following steps in a kind of modification of the present invention (embodiment): in step (1), the degree of depth of described groove 300 is not all the same, place, termination environment has at least a groove 303A continuously active area to be fenced up, wherein the gash depth scope in active area is 0.8um to 5.0um, and the gash depth of termination environment and the gash depth of active area are different; The gash depth of termination environment is more shallow than the gash depth of active area, if the gash depth of active area is 1.0um, the gash depth of termination environment is 0.8um, this can make the puncture voltage of active area force down than the breakdown potential of termination environment, puncturing of device first occurred in active area, thereby the puncture voltage of device is more stable, with reference to Figure 22.
Further, described step (1) comprises the following steps in a kind of modification of the present invention (embodiment): in step (1), the width of described groove 300 is not all the same, place, termination environment has at least a groove 303A continuously active area to be fenced up, wherein the groove width scope in active area is 0.15um to 1.5um, the groove width of termination environment is wider than the groove width of active area, if the groove width of active area is 0.2um, the groove width of termination environment is 0.8um, this can make the puncture voltage of active area force down than the breakdown potential of termination environment, puncturing of device first occurred in active area, thereby the puncture voltage of device is more stable, with reference to Figure 23.
Further, described step (1) comprises the following steps in a kind of modification of the present invention (embodiment): in step (1), the width of described groove 300 is not all the same, place, termination environment has at least two groove 303A and 303B continuously active area to be fenced up, at the groove of active area and the distance range of groove, be wherein 0.8um to 3.0um, the groove of termination environment is narrower than the distance of the groove of active area and groove with the distance of groove, if the distance of the groove of active area and groove is 1.0um, the groove of termination environment and the distance of groove are 0.18um, this can make the puncture voltage of active area force down than the breakdown potential of termination environment, puncturing of device first occurred in active area, thereby the puncture voltage of device is more stable, with reference to Figure 22, Figure 23 and Figure 24.
Further, described step (4) comprises the following steps in a kind of modification of the present invention (embodiment):
In step (4), contact hole mask does not have contact hole at place, termination environment except gate trench, and in termination environment, place does not form contact hole groove except gate trench, with reference to Figure 22 and Figure 23.
Further, described step (4) comprises the following steps in a kind of modification of the present invention (embodiment):
In step (4), contact hole mask has a contact hole at least at place, termination environment except gate trench, at place, termination environment, except gate trench, form a rare contact hole groove, puncturing of device first occurred in active area, thereby the puncture voltage of device is more stable, with reference to Figure 24, Figure 25, Figure 26 and Figure 27.
Compared with prior art, the invention has the beneficial effects as follows:
Adopt preparation method of the present invention, omitted the preparation section of base mask and active region mask or only omitted the preparation section of base mask,, make the manufacturing cost of device obtain larger reduction; Can not affect the original electrical characteristic of device, thereby increase the ratio of performance to price of device, and do not affect the q&r of groove type power discrete device simultaneously.
Accompanying drawing explanation
Accompanying drawing is used to provide a further understanding of the present invention, for explaining the present invention, is not construed as limiting the invention together with embodiments of the present invention, in the accompanying drawings:
Fig. 1 is exposure oxide layer 400 schematic diagrames of the embodiment of the present invention 1;
Fig. 2 is the exposure epitaxial loayer schematic diagram of the embodiment of the present invention 1;
Fig. 3 is groove 300 schematic diagrames of the embodiment of the present invention 1;
Fig. 4 is all sacrifice oxide layers of disposing of the embodiment of the present invention 1 schematic diagram;
Fig. 5 is grid oxic horizon 301 schematic diagrames of the embodiment of the present invention 1;
Fig. 6 is the highly doped polysilicon of the deposition of the embodiment of the present invention 1 302 schematic diagrames;
Fig. 7 is the injection P type dopant schematic diagram of the embodiment of the present invention 1;
Fig. 8 is P type base 201 schematic diagrames of the embodiment of the present invention 1;
Fig. 9 is N-type source region 204 schematic diagrames of the embodiment of the present invention 1;
Figure 10 is inter-level dielectric 401 schematic diagrames of the embodiment of the present invention 1;
Figure 11 is that the contact hole groove of the embodiment of the present invention 1 shows 500 intentions;
Figure 12 is albronze layer 404 schematic diagram of the embodiment of the present invention 1;
Figure 13 is the cross sectional representation of the device of the embodiment of the present invention 1;
Figure 14 is the cross sectional representation of the device of the embodiment of the present invention 1 (a kind of modification of the present invention);
Figure 15 is the cross sectional representation of the device of the embodiment of the present invention 1 (a kind of modification of the present invention);
Figure 16 is the cross sectional representation of the device of the embodiment of the present invention 1 (a kind of modification of the present invention);
Figure 17 is the cross sectional representation of the device of the embodiment of the present invention 1 (a kind of modification of the present invention);
Figure 18 is the cross sectional representation of the device of the embodiment of the present invention 1 (a kind of modification of the present invention);
Figure 19 is the cross sectional representation of the device of the embodiment of the present invention 1 (a kind of modification of the present invention);
Figure 20 is the cross sectional representation of the device of the embodiment of the present invention 1 (a kind of modification of the present invention);
Figure 21 is the cross sectional representation of the device of the embodiment of the present invention 1 (a kind of modification of the present invention);
Figure 22 is the cross sectional representation of the device of the embodiment of the present invention 2 (a kind of modification of the present invention);
Figure 23 is the cross sectional representation of the device of the embodiment of the present invention 2 (a kind of modification of the present invention);
Figure 24 is the cross sectional representation of the device of the embodiment of the present invention 2 (a kind of modification of the present invention);
Figure 25 is the cross sectional representation of the device of the embodiment of the present invention 2 (a kind of modification of the present invention);
Figure 26 is the cross sectional representation of the device of the embodiment of the present invention 2 (a kind of modification of the present invention);
Figure 27 is the cross sectional representation of the device of the embodiment of the present invention 2 (a kind of modification of embodiment).
Embodiment
Below in conjunction with accompanying drawing, the preferred embodiments of the present invention are described, should be appreciated that preferred embodiment described herein, only for description and interpretation the present invention, is not intended to limit the present invention.
A kind of method of preparing groove grid-control power device of the present invention, comprises the following steps: first utilize trench mask to corrode the epitaxial loayer on substrate and form a plurality of grooves; Then, epitaxial loayer is injected to P type dopant and N-type dopant, form respectively HeNXing source region, P type base, then at epitaxial loayer surface deposition inter-level dielectric, recycling contact hole mask, corrodes inter-level dielectric, forms perforate in inter-level dielectric, afterwards epi-layer surface is corroded and forms contact hole groove, and contact hole groove is carried out to metal plug filling; Finally, at the surface deposition metal level of device, utilize metal mask to carry out metal attack, form metal bed course and line, adopt this preparation method, omitted the preparation section of base mask and active region mask, make the manufacturing cost of device obtain larger reduction.
Embodiment 1:
As shown in Figure 1, epitaxial loayer 200 is placed in the top of substrate 10, first on epitaxial loayer, adopt accumulation or hot growth pattern to form oxide layer 400 (thickness is 0.3um to 1.5um oxide hard light shield), accumulation one deck lithography coating 1000 again in oxide layer, then forms by trench mask the some parts that pattern exposes oxide layer.
As shown in Figure 2, the oxide layer that trench mask formation pattern is exposed carries out, after dry corrosion, exposing epitaxial loayer, then disposes lithography coating.
As shown in Figure 3, by etching, form groove 300, this groove (degree of depth is 0.8um to 5.0um, and width is 0.12um to 1.5um) extends to N-type epitaxial loayer.
As shown in Figure 4, after forming groove, to groove sacrifice property oxidation (time is 10 minutes to 100 minutes, and temperature is 1000 ℃ to 1200 ℃), to eliminate the silicon layer being destroyed by plasma in grooving process, then dispose all oxide layers.
As shown in Figure 5, and the mode of growing by heat, the sidewall exposing at groove and bottom, and the upper surface of epitaxial loayer forms the thin grid oxic horizon 301 (thickness is 0.01um to 0.12um) of one deck.
As shown in Figure 6, deposit the polysilicon 302 of N-type high dopant in groove, polysilicon doping concentration is R
s=5 Ω/ to 100 Ω/ (sheet resistance), with filling groove and cover end face, then to carrying out plane corrosion treatment or chemico-mechanical polishing at the lip-deep polysilicon layer of epitaxial loayer.
As shown in Figure 7, (B11, dosage is 2e12/cm silicon chip surface to be injected to P type dopant
3to 2e14/cm
3).
As shown in Figure 8, the P type dopant of injection is pushed into be diffused into by a High temperature diffusion operation (time is 10 minutes to 1000 minutes, and temperature is 950 ℃ to 1200 ℃) and in epitaxial loayer, forms P type base 201.
(phosphorus or arsenic, dosage is 1e15/cm as shown in Figure 9, then to epitaxial loayer injection N-type dopant
3to 2e16/cm
3), on epitaxial loayer, form N-type district, by secondary high-temperature DIFFUSION TREATMENT, temperature is 950 to 1200 ℃, time is 10 minutes to 100 minutes, ShiNXing district pushes away Jin and is diffused into and on P type base, forms N-type source region 204 (N-type active area depth is 0.2um to 0.8um, and the P type base degree of depth is 0.5um to 4.5um).
As shown in figure 10, in epitaxial loayer most surface, first deposit undoped silicon dioxide layer (thickness is 0.1um to 0.5um), then deposit boro-phosphorus glass (thickness is 0.1um to 0.8um) and form inter-level dielectric 401.
As shown in figure 11, at inter-level dielectric surface accumulation lithography coating, utilize contact hole mask to expose part inter-level dielectric, then the part inter-level dielectric exposing is carried out to dry corrosion, until expose epitaxial loayer, in inter-level dielectric, form a plurality of contact hole mask perforates, then dispose lithography coating; Then the epitaxial loayer that contains dopant is carried out to etch, (degree of depth is 0.4um to 1.0um to make contact hole groove 500, width is 0.12um to 1.6um) through N-type source region, enter into P type base, afterwards contact hole groove is injected to P type high dopant 205, assorted agent concentration is 10
14to 5 * 10
15/ cm
3, to reduce the contact resistance between P type base and metal plug, this increases the safe handling district of device effectively.
As shown in figure 12, at contact hole trenched side-wall, bottom and epitaxial loayer upper surface deposition one deck titanium/titanium nitride layer 402, then contact hole groove is carried out to tungsten 403 fills to form metal plug, then at this, deposits one deck aluminium copper 404 above device (thickness is 0.8um to 10um).
As shown in figure 13, then by metal mask, carry out metal etch, form source region metal bed course (405) and gate trace (406) and termination environment field plate (407).
Embodiment 2:
For a kind of modification of the present invention (embodiment).
Step is identical by Fig. 1 to Fig. 8 with embodiment 1, then utilizes active region mask step to form N-type source region 204, and remaining step is identical by Figure 10 to Figure 13 with embodiment 1.
Finally it should be noted that: these are only the preferred embodiments of the present invention, be not limited to the present invention, embodiments of the invention are to make an explanation with N-type passage device, the present invention also can be used for P type passage device, although the present invention is had been described in detail with reference to embodiment, for a person skilled in the art, its technical scheme that still can record aforementioned each embodiment is modified, or part technical characterictic is wherein equal to replacement, but within the spirit and principles in the present invention all, any modification of doing, be equal to replacement, improve etc., all should be included in protection scope of the present invention it.
Reference symbol table:
10 substrates
200 epitaxial loayers
201 P type bases
204 N-type source regions
The P type high-doped zone of 205 contact hole channel bottoms
300 grooves
301 grid oxic horizons
302 highly doped polysilicons
The groove that 303A fences up active area continuously
The groove that 303B fences up active area continuously
400 oxide layers
401 inter-level dielectrics
402 titanium layers/titanium nitride layer
403 tungsten
404 aluminium coppers
405 source region metal bed courses
406 gate trace
407 petiolarea field plates
500 contact hole grooves
1000 lithography coatings.
Claims (18)
1. a method of preparing groove grid-control power device, is characterized in that, comprises the following steps:
(1) utilize trench mask to corroding on the epitaxial loayer 200 on substrate 10, to form a plurality of grooves;
(2) then, epitaxial loayer is injected to P type dopant and N-type dopant, form respectively P type base (201) and N-type source region (204);
(3) at epitaxial loayer surface deposition inter-level dielectric 401, recycling contact hole mask, corrodes inter-level dielectric, forms perforate in inter-level dielectric, afterwards epi-layer surface is corroded and forms contact hole groove, and contact hole groove is carried out to metal plug filling;
(4) at the upper surface depositing metal layers 404 of device, utilize metal mask to carry out metal attack, form source region metal bed course (405) and gate trace (406) and termination environment field plate (407).
2. a kind of method of preparing groove grid-control power device according to claim 1, is characterized in that, described step (1) comprises the following steps:
A, on epitaxial loayer, form oxide layer, accumulation lithography coating 1000 in oxide layer, by trench mask, expose partial oxidation layer again, the partial oxidation layer exposing is carried out to dry corrosion, until expose epitaxial loayer, be formed on a plurality of trench mask perforates in oxide layer, then dispose lithography coating;
B, by epitaxial loayer etching is formed to groove 300, this groove extends in epitaxial loayer, to the oxidation of groove sacrifice property, then disposes all oxide layers;
C, the sidewall exposing at groove and bottom, and the upper surface of epitaxial loayer forms grid oxic horizon 301, then in groove, deposit the polysilicon 302 of N-type high dopant, with filling groove and cover end face;
D, to carrying out plane corrosion treatment or chemico-mechanical polishing at the lip-deep polysilicon layer of epitaxial loayer.
3. a kind of method of preparing groove grid-control power device according to claim 2, it is characterized in that, in step b, the width of described groove 300 is not all the same, place, termination environment has at least a groove 303A continuously active area to be fenced up, wherein the groove width scope in active area is 0.15um to 1.5um, and the groove width of termination environment and the groove width of active area are different; The groove width of termination environment is narrower than the groove width of active area, and for example the groove width of active area is 0.2um, and the groove width of termination environment is 0.15um.
4. a kind of method of preparing groove grid-control power device according to claim 2, it is characterized in that, in step b, the degree of depth of described groove 300 is not all the same, place, termination environment has at least a groove 303A continuously active area to be fenced up, wherein the gash depth scope in active area is 0.8um to 5.0um, and the gash depth of termination environment and the gash depth of active area are different; The gash depth of termination environment is more shallow than the gash depth of active area, and for example the gash depth of active area is 1.0um, and the gash depth of termination environment is 0.8um.
5. a kind of method of preparing groove grid-control power device according to claim 2, it is characterized in that, in step b, the width of described groove 300 is not all the same, place, termination environment has at least a groove 303A continuously active area to be fenced up, and wherein the groove width scope in active area is 0.15um to 1.5um, and the groove width of termination environment is wider than the groove width of active area, for example the groove width of active area is 0.2um, and the groove width of termination environment is 0.8um.
6. a kind of method of preparing groove grid-control power device according to claim 2, it is characterized in that, in step b, the width of described groove 300 is not all the same, place, termination environment has at least two groove 303A and 303B continuously active area to be fenced up, wherein the distance range of the groove in active area and groove is 0.8um to 3.0um, the groove of termination environment is narrower than the distance of the groove of active area and groove with the distance of groove, for example the groove of active area and the distance of groove are 1.0um, and the groove of termination environment and the distance of groove are 0.18um.
7. a kind of method of preparing groove grid-control power device according to claim 1, is characterized in that, described step (3) comprises the following steps:
A, at topsheet surface deposition inter-level dielectric;
B, at inter-level dielectric surface accumulation lithography coating, utilize contact hole mask to expose part inter-level dielectric, then the part inter-level dielectric exposing is carried out to dry corrosion, until expose epitaxial loayer, in inter-level dielectric, form a plurality of contact hole mask perforates, then dispose lithography coating;
C, by inter-level dielectric perforate, epi-layer surface is corroded, form contact hole groove, contact hole groove enters into P type base through N-type source region, afterwards contact hole groove is injected to P type high dopant;
D, on contact hole trenched side-wall, bottom and inter-level dielectric surface, deposit successively one deck titanium layer and one deck titanium nitride layer, then contact hole groove is carried out to tungsten filling to form contact hole trench metal connector.
8. a kind of method of preparing groove grid-control power device according to claim 7, is characterized in that, in step b, contact hole mask does not have contact hole at place, termination environment, and in termination environment, place does not form contact hole groove.
9. a kind of method of preparing groove grid-control power device according to claim 7, is characterized in that, in step b, contact hole mask has a contact hole at least at place, termination environment, and in termination environment, place forms a rare contact hole groove.
10. a kind of method of preparing groove grid-control power device according to claim 7, it is characterized in that, in step b, contact hole mask has at least a contact hole that the N district of groove both sides is removed at place, termination environment, and the width of this contact hole that the N district of groove both sides is removed is 0.2um to 10.0um.
11. a kind of methods of preparing groove grid-control power device according to claim 7, it is characterized in that, in step b, contact hole mask is removed the N district of groove both sides at the contact hole at place, termination environment, together with groove top, also remove, the width of this contact hole that groove top is also removed is together 0.6um to 10.0um.
12. 1 kinds of methods of preparing groove grid-control power device have only been omitted base mask and source region needs active region mask step to introduce, and it is characterized in that, comprise the following steps:
(1) utilize trench mask to corroding on the epitaxial loayer 200 on substrate 10, to form a plurality of grooves (300);
(2) epitaxial loayer is injected to P type dopant and form P type base (201);
(3) utilize active region mask step to form source region (204);
(4) at epitaxial loayer surface deposition inter-level dielectric 401, recycling contact hole mask, corrodes inter-level dielectric, forms perforate in inter-level dielectric, afterwards epi-layer surface is corroded and forms contact hole groove, and contact hole groove is carried out to metal plug filling;
(5) at the upper surface depositing metal layers 404 of device, utilize metal mask to carry out metal attack, form source region metal bed course (405) and gate trace (406) and termination environment field plate (407).
13. a kind of methods of preparing groove grid-control power device according to claim 12, it is characterized in that, in step (1), the width of described groove 300 is not all the same, place, termination environment has at least a groove 303A continuously active area to be fenced up, wherein the groove width scope in active area is 0.15um to 1.5um, and the groove width of termination environment and the groove width of active area are different; The groove width of termination environment is narrower than the groove width of active area, and for example the groove width of active area is 0.2um, and the groove width of termination environment is 0.15um.
14. a kind of methods of preparing groove grid-control power device according to claim 12, it is characterized in that, in step (1), the degree of depth of described groove 300 is not all the same, place, termination environment has at least a groove 303A continuously active area to be fenced up, wherein the gash depth scope in active area is 0.8um to 5.0um, and the gash depth of termination environment and the gash depth of active area are different; The gash depth of termination environment is more shallow than the gash depth of active area, and for example the gash depth of active area is 1.0um, and the gash depth of termination environment is 0.8um.
15. a kind of methods of preparing groove grid-control power device according to claim 12, it is characterized in that, in step (1), the width of described groove 300 is not all the same, place, termination environment has at least a groove 303A continuously active area to be fenced up, and wherein the groove width scope in active area is 0.15um to 1.5um, and the groove width of termination environment is wider than the groove width of active area, for example the groove width of active area is 0.2um, and the groove width of termination environment is 0.8um.
16. a kind of methods of preparing groove grid-control power device according to claim 12, it is characterized in that, in step (1), the width of described groove 300 is not all the same, place, termination environment has at least two groove 303A and 303B continuously active area to be fenced up, at the groove of active area and the distance range of groove, be wherein 0.8um to 3.0um, the groove of termination environment is narrower than the distance of the groove of active area and groove with the distance of groove, for example the groove of active area and the distance of groove are 1.0um, and the groove of termination environment and the distance of groove are 0.18um.
17. a kind of methods of preparing groove grid-control power device according to claim 12, it is characterized in that, in step (4), contact hole mask does not have contact hole at place, termination environment except gate trench, and in termination environment, place does not form contact hole groove except gate trench.
18. a kind of methods of preparing groove grid-control power device according to claim 12, it is characterized in that, in step (4), contact hole mask has a contact hole at least at place, termination environment except gate trench, and in termination environment, place forms and has a contact hole groove at least except gate trench.
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| CN201210298920.7A CN103632965A (en) | 2012-08-21 | 2012-08-21 | Method of preparing a groove grid-control power device |
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| CN201210298920.7A CN103632965A (en) | 2012-08-21 | 2012-08-21 | Method of preparing a groove grid-control power device |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107408575A (en) * | 2015-09-17 | 2017-11-28 | 富士电机株式会社 | The manufacture method of semiconductor device and semiconductor device |
| CN107564964A (en) * | 2017-08-18 | 2018-01-09 | 中国科学院上海微系统与信息技术研究所 | Trench MOSFET power device and preparation method thereof |
| CN110190112A (en) * | 2019-05-07 | 2019-08-30 | 上海华虹宏力半导体制造有限公司 | Trench-gate semiconductor device and its manufacturing method |
-
2012
- 2012-08-21 CN CN201210298920.7A patent/CN103632965A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107408575A (en) * | 2015-09-17 | 2017-11-28 | 富士电机株式会社 | The manufacture method of semiconductor device and semiconductor device |
| CN107408575B (en) * | 2015-09-17 | 2020-09-08 | 富士电机株式会社 | Semiconductor device and method for manufacturing semiconductor device |
| CN107564964A (en) * | 2017-08-18 | 2018-01-09 | 中国科学院上海微系统与信息技术研究所 | Trench MOSFET power device and preparation method thereof |
| CN107564964B (en) * | 2017-08-18 | 2020-03-31 | 中国科学院上海微系统与信息技术研究所 | Groove type MOSFET power device and manufacturing method thereof |
| CN110190112A (en) * | 2019-05-07 | 2019-08-30 | 上海华虹宏力半导体制造有限公司 | Trench-gate semiconductor device and its manufacturing method |
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