CN103632433B - Contact-type image sensor multi-optical spectrum image collecting and disposal route - Google Patents
Contact-type image sensor multi-optical spectrum image collecting and disposal route Download PDFInfo
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Abstract
The invention belongs to financial machine and tool field, a kind of contact-type image sensor multi-optical spectrum image collecting and disposal route.The shortcoming of prior art is: have noise spot in the image collected; Overall brightness difference between the image sections gathered and section is large; The image under same bank note variety classes light source cannot be gathered simultaneously.The inventive method is as follows: arrange upper and lower two symmetrical multiple light courcess CIS imageing sensors and gather original image; The simulating signal collected deliver to afterwards after filtering two independently A/D sampling module be quantified as digital signal; Digital signal is given FPGA and is compensated, splices, compresses, stores by A/D sampling module; Signal is sent to main control chip by FPGA; Two-way information is put into buffer memory in external RAM two absolute address regions by main control chip; After whole pictures collection completes, DSP takes out picture and processes from external RAM.Advantage of the present invention is: the picture noise of collection is few; Gather the image of bank note under Different Light simultaneously; The image gathered out is more level and smooth, and picture quality is higher.
Description
Technical field
The invention belongs to financial machine and tool field, specifically a kind of contact-type image sensor multi-optical spectrum image collecting and disposal route.
Background technology
Contact-type image sensor, English name Contact Image Sensor, is abbreviated as CIS.Contact-type image sensor, by photosensitive unit close-packed arrays, is directly collected by the light information of scanning contribution reflection, have cheap, without the need to advantages such as lens combination, volume are little, easy for installation.Be used to the fields such as fax, scanning, bank note bank slip recognition in the past, also widespread use in present finance device cash inspecting machine, currency counting and detecting machine, ATM automatic teller machine, paper currency sorter.The application of contact-type image sensor in finance device, has the volume decreasing cash inspecting machine, currency counting and detecting machine, ATM automatic teller machine, paper currency sorter; Add the stability of image acquisition, improve the advantage of the image false distinguishing reliability of currency counting and detecting machine.But existing contact-type image sensor multi-optical spectrum image collecting and disposal route still have its own shortcomings.1. cannot remove the interference of other signals in circuit, make there is noise spot in collected image; 2. cannot overcome the difference of light-source brightness between contact-type image sensor every section, make the overall brightness difference between the image sections that collects and section large; 3. cannot gather the image under same bank note variety classes light source simultaneously.Due to the existence of above-mentioned shortcoming, finance device cash inspecting machine, currency counting and detecting machine, ATM automatic teller machine, paper currency sorter are differentiated, and the accuracy rate of counterfeit money reduces, and causes that some counterfeit moneys come into the market, bank and society, brings serious harm to national finance.
Because contact-type image sensor is widely used in existing finance device, act on important, so invent a kind of shortcoming overcoming prior art, the picture noise with collection is little; Image smoothing does not have intersegmental difference; The contact-type image sensor multi-optical spectrum image collecting and the disposal route that gather the advantages such as the image of same bank note under Different Light are very important simultaneously.
Prior art contact-type image sensor CIS is multistage, be spliced by organizing photo-sensitive cell more, multistage contact-type image sensor CIS manages every section of CIS element and there are differences, the present invention adopts standard scheme to CIS pipe, the pure white coloured paper of a standard must be gathered during standardization, main control chip calculates every section of adjusted value according to the image that every section of CIS collects, and this value is saved in flash, after powering on, this adjusted value is sent to FPGA, FPGA adjusts the bias voltage of A/D every section sampling accordingly according to this value at every turn.
The present invention is based on contact-type image sensor CIS multi-optical spectrum image collecting and the disposal route of on-site programmable gate array FPGA, to the sampling and processing of the tow sides information of the paper such as bank note, bill, comprise the following steps: whether detection hardware connects correct; The mode of operation of configuration contact-type image sensor CIS; Main control chip reads FLASH chip, and FPGA configures A/D conversion chip; Wait for user operation, eliminate contact-type image sensor every section light-source brightness difference; Adopt the image of the uniform white paper of a standard; The regulation coefficient of CIS every section in main control chip calculating chart, calculates A/D chip voltage adjusted value; Main control chip is preserved in this adjusted value write FLASH chip; This adjusted value is sent to FPGA by main control chip, and reconfigures A/D chip; Judge whether will start to adopt figure; FPGA requires according to main control chip the light source opening corresponding CIS; The simulating signal that CIS produces after filtering device removes burr, and then by A/D sample quantization, the digital signal after quantification is sent back to FPGA by A/D, and the continuous print signal that these data are spliced into two-way complete by FPGA compresses it; The signal compressed is cached in two random access memory rams by FPGA respectively; The information of buffer memory is sent to main control chip; Image acquisition is also sent.
From switching on power to system stability, after powering on, FPGA carries out initialization to modules, produces CIS control signal, clock signal and A/D clock signal; After bank note enters cash inspecting machine, main control chip notice FPGA starts to adopt figure, and which kind of light source to adopt figure with; After FPGA receives and adopts figure enable signal and light signal, open immediately or switch corresponding light source on CIS, enable A/D, CIS start to adopt figure simultaneously; The 2*N road simulating signal collected is sent into filtration module and is carried out filtering and remove burr by two CIS, then signal is sent into respectively two independently A/D sampling module carry out analog to digital conversion quantification; 2*N railway digital signal after quantification is sent into FPGA and is spliced into two ways of digital signals by A/D sampling module, and FPGA compresses this two paths of signals and is cached, after receiving the complete signal of a line, just give main control chip by the signal of this line; Main control chip is by the two paths of signals that receives respectively stored in random access memory ram, and after an image acquisition completed completes, the image under Different Light takes out and processes by main control chip again.Native system devises the standard scheme to CIS pipe, namely must gather the image of blank sheet of paper of a standard during standardization, calculate CIS and manage each section of difference, and then calculates the offset of sample-offset voltage of A/D, to use during start later.
After powering on, field programmable gate array FPGA carries out initialization to CIS and A/D, determines frequency of operation and the sampling resolution of CIS, determines that the mode of operation Bing Duige road bias voltage of A/D chip carries out adequate compensation.
The CIS enable signal when field programmable gate array FPGA produces, light signal and A/D module enable signal are controlled indirectly by main control chip.
After starting to adopt figure, main control chip can switch the light sources such as CIS red, green, blue, infrared external reflection, infrared transmission, ultraviolet according to the needs control FPGA of different patterns, gathers multispectral image.
As required according to regular hour ratio, the signal of main control chip timed sending toggle lights, and then the image extracting corresponding line according to this ratio out, disposablely can obtain the multiple image under Different Light.
The 2*N road simulating signal that two CIS collect first is sent into filtration module and is removed the interference produced in circuit, and then sample quantization is 2*N railway digital signal.
2*N railway digital signal after quantification is spliced into the complete digital signal in 2 roads in programming logic gate array FPGA at the scene, in field programmable gate array FPGA, compression module carries out compression process to this two paths of signals, then this two paths of signals is got up by ping-pong buffer in programming logic gate array FPGA at the scene respectively, buffer memory is the signal that a line is complete, and this row signal is sent to main control chip.This two paths of signals is deposited in RAM by main control chip respectively, after a sub-picture collection completes, (inaccurate according to the different time! ) ratio extract out Different Light (inaccurate! ) corresponding image carries out corresponding (inaccurate! ) process.
The inventive method can at a high speed, stable, reliably CIS image is gathered, can be used for the false distinguishing to bank note, sorting and crown word number extraction etc., and then the scientific management of reinforcement banking system fiduciary circulation.
Advantage of the present invention is:
1. can the interference of other signals in filtering circuit, the picture noise gathered out is few;
2. can adopt toggle lights in figure process, gather the image of bank note under Different Light simultaneously;
3. devise the scheme of brightness homogenization between contact-type image sensor section and section, the image that collection is gone out is more level and smooth, and picture quality is higher;
4., after having gathered a line image, in FPGA, compression process has been done to image information, greatly reduced data volume during image transmitting.
5. improve the accuracy rate of finance device cash inspecting machine, currency counting and detecting machine, ATM automatic teller machine, paper currency sorter discriminating counterfeit money.
Summary of the invention
The object of the present invention is to provide a kind of picture noise of collection little, image smoothing does not have intersegmental difference, can gather contact-type image sensor multi-optical spectrum image collecting and the disposal route of the advantages such as the image of same bank note under Different Light simultaneously.
The object of the present invention is achieved like this:
A kind of contact-type image sensor multi-optical spectrum image collecting and disposal route, step is as follows:
(1) upper and lower two symmetrical multiple light courcess CIS imageing sensors are set and gather original image;
(2) two simulating signals that CIS imageing sensor collects after filtering after deliver to simultaneously two independently A/D sampling module be quantified as digital signal;
(3) digital signal is given FPGA and is compensated, splices, compresses, stores by A/D sampling module;
(4), after FPGA receives a line signal, this signal is sent to main control chip;
(5) two-way information is put into buffer memory in external RAM two absolute address regions by main control chip;
(6), after whole pictures collection completes, main control chip takes out picture and processes from external RAM.
Devise CIS pipe multistage homogenization scheme in step (1), gather the blank sheet of paper image of a standard, calculate CIS and manage each section of difference, calculate the offset of the sample-offset voltage of A/D, use during standby start.
The 2*N road simulating signal that step (2) two CIS collect first is sent into filtration module and is removed the interference produced in circuit, and then sample quantization is 2*N railway digital signal.
After step (2) powers on, FPGA carries out initialization to CIS and A/D, determines frequency of operation and the sampling resolution of CIS, determines that the mode of operation Bing Duige road bias voltage of A/D chip compensates.
When adopting figure, main control chip control FPGA switches red, green, blue, infrared external reflection, infrared transmission, the ultraviolet source of CIS, gathers multispectral image.
2*N railway digital signal after quantification is spliced into the complete digital signal in 2 roads in FPGA, in FPGA, compression module carries out compression process to this two paths of signals, then this two paths of signals is buffered respectively in FPGA, after the signal that the complete a line of buffer memory is complete, this row signal is sent to main control chip.
Main points of the present invention are:
The present invention adopts field programmable gate array, english abbreviation is FPGA, control the sampling and processing of contact-type image sensor multispectral image, control contact-type image sensor at a high speed, stable, reliable, gather the picture under various light sources simultaneously, solve the problem that multisection type contact-type image sensor causes the image of collection each section of gray-scale value uneven due to every section of light source difference.
The present invention is applied in finance device cash inspecting machine, currency counting and detecting machine, ATM automatic teller machine, paper currency sorter, can at a high speed, stable, control contact-type image sensor CIS reliably and gather image, for the false distinguishing to bank note, sorting and crown word number extraction etc., realize the scientific management of banking system fiduciary circulation.
In order to control the contact-type image sensor CIS high-quality image of collection at a high speed, the technical solution used in the present invention is: native system comprises field programmable gate array, main control chip, Digital to Analog Converter A/D, contact-type image sensor CIS, active band-pass filter etc.Main control chip and on-site programmable gate array FPGA are bi-directionally connected, the input end of CIS is connected with on-site programmable gate array FPGA, the analog signal output of the CIS told is connected with filter input end, the input end of analog signal of A/D converter is connected with the output terminal of wave filter, the control signal input end of A/D converter is connected with on-site programmable gate array FPGA, and the sampled digital signal output terminal of A/D converter is connected with FPGA.
Accompanying drawing explanation
Fig. 1 is present system structural drawing.
Fig. 2 is field programmable gate array FPGA general module figure of the present invention.
Fig. 3 is the inventive method process flow diagram.
Embodiment
The invention provides a kind of the contact-type image sensor CIS multi-optical spectrum image collecting based on field programmable gate array FPGA and the disposal route that are applied in finance device.FPGA is field programmable gate array, English name: Field Programmable Gate Array, abbreviation FPGA, is one and contains the semiconductor equipment can editing element, for the logic gate array element of the on-the-spot sequencing of user.The principle of work of FPGA is: adopt logical cell array, inside comprises configurable logic blocks CLB(ConfigurableLogic Block), export load module IOB(Input Output Block) and interconnector (Interconnect) three parts.
The object of the invention is to overcome the deficiencies in the prior art, provide a kind of the CIS multi-optical spectrum image collecting based on FPGA control and the disposal route that are applied in financial field, native system is made up of FPGA, main control chip (single-chip microcomputer, dsp chip etc.), A/D converter, CIS, wave filter; FPGA configures the mode of operation of CIS and A/D converter, the work schedule of CIS and A/D converter is provided, CIS outputting analog signal is given A/D after filtering after filtering circuit noise and is gathered, convert digital signal to, the pre-service such as splicing compression are carried out by FPGA, and be cached in internal random storer (RAM), and with behavior unit, the signal that two CIS collect is sent to main control chip process.
Main control chip also control the process of whole image acquisition except receiving image information, process image, when its control FPGA starts to adopt figure, which kind of light source adopting figure with, main control chip also stores the adjusted value of each passage reference voltage of A/D converter between CIS section and section after light-intensity difference homogenization.
Feature of the present invention is: in order to control the contact-type image sensor CIS high-quality image of collection at a high speed, and the present invention adopts contact-type image sensor CIS multi-optical spectrum image collecting based on FPGA and disposal system.Native system comprises the main control chips such as FPGA, single-chip microcomputer or DSP, A/D converter, CIS pipe, wave filter etc.Main control chip and field programmable gate array FPGA are bi-directionally connected, the input end of CIS pipe is connected with FPGA, the analog signal output of contact-type image sensor CIS pipe is connected with filter input end, the input end of analog signal of A/D converter is connected with the output terminal of wave filter, the control signal input end of A/D converter is connected with FPGA, and the sampled digital signal output terminal of A/D converter is connected with FPGA.
Embodiment
Below in conjunction with accompanying drawing, by embodiment, the present invention will be further described.
As shown in Figure 1, a kind of CIS multi-optical spectrum image collecting based on FPGA and disposal system, native system comprises FPGA, main control chip, A/D converter, contact-type image sensor CIS pipe, wave filter etc. to principle of the present invention.The main control chip told and FPGA are bi-directionally connected, the input end of the CIS pipe told is connected with FPGA, the analog signal output of the contact-type image sensor CIS pipe told is connected with filter input end, the input end of analog signal of the A/D converter told is connected with the output terminal of wave filter, the control signal input end of the A/D converter told is connected with FPGA, and the sampled digital signal output terminal of the A/D converter told is connected with FPGA.
The functional block diagram of FPGA as shown in Figure 2, mainly comprise in FPGA system CIS time-sequence control module, A/D mode of operation configuration module, A/D sampling time sequence control module, pll clock module, A/D data splicing with compression module, random access memory ping-pong buffer module, UART serial communication modular, adopt figure start/end control module, image output module.
The implementation step of the inventive method is as shown in Figure 3:
Whether step 1. detection hardware connects correctly;
Step 2. configures the mode of operation of contact-type image sensor CIS, as frequency of operation, image scanning precision DPI etc.;
Step 3. main control chip reads long-life non-volatile memory chip FLASH chip, and FPGA configures A/D conversion chip;
Step 4. waits for user operation, the need of homogenization contact-type image sensor, namely eliminates contact-type image sensor every section light-source brightness difference, if then perform step 5, otherwise performs step 9;
Step 5. adopts the image of the uniform white paper of a standard;
Step 6. main control chip calculates the regulation coefficient of the middle CIS every section that publishes picture, and then calculates A/D chip every section of sample-offset voltage change accordingly;
Step 7. main control chip is preserved in this adjusted value write FLASH chip;
This adjusted value is sent to FPGA by step 8. main control chip, and reconfigures A/D chip;
Step 9. judges whether will start to adopt figure, is perform step 10, otherwise performs step 4;
Step 10.FPGA opens the light source of corresponding CIS according to the requirement of master control;
The simulating signal that step 11. contact-type image sensor CIS produces after filtering device removes burr, then by A/D sample quantization, digital signal after quantification is sent back to FPGA by A/D, and these data are spliced into the complete continuous print signal of two-way by FPGA, and to its compression;
The signal compressed is cached in two inner random access memory rams by step 12.FPGA respectively;
The information of buffer memory is sent to main control chip by step 13.FPGA;
If step 14. image acquisition also sends, perform step 4, then perform step 10 as not complete.
The model that the contact-type image sensor used in the present embodiment is produced for Hua Ling Photoelectric Co., Ltd. of Weihai in Shandong province is: the CIS of wide 183 millimeters of WHEC183, this CIS has 3 passages, structure is 3 sections and is spliced, variable sweep precision: 50DPI, 100DPI, 200DPI; Operating voltage is 3.3V; Light source voltage is 5V.First be configured it when powering on, the present embodiment is configured to 200DPI, and valid pixel is 1440.CIS frequency of operation is 8M, and each passage has an analog signal output mouth.CIS normal need of work pixel clock CLK and gating signal SI, a SI probably continue two CLK times, and CIS 65 CLK times after SI negative edge start to produce and outputting analog signal.
This CIS has five kinds of light sources such as red, green, blue, infrared external reflection, infrared transmission.Main control chip is as required at the complete rear timely toggle lights of CIS every a line signals collecting, i.e. another light source of next line, can allow CIS pipe time division multiplex like this, and the figure under the Different Light of extraction simultaneously, improves the work efficiency of system.
The wave filter that the present embodiment adopts is active band-pass filter, model LT1568, operating voltage is 3.3V, and centre frequency is configured to 8MHz, band width configuration is that 1MHz, CIS analog passband signal wave filter effectively can remove the interference such as the burr produced by circuit instability.
In order to select the special A/D conversion chip of high speed 16-bit CCD/CIS with the use of, the present embodiment with this CIS, model is: HT82V42, and operating voltage is 3.3V; This chip has 3 passages, can simultaneously to the three tunnel simulating signal samplings of CIS.Chip internal has two-phase and closes sample circuit CDS and programmable gain amplifier PGA can adjust the sampling on each road bias voltage with it, manage the different and difference that is gray-scale value between the image sections that causes and section of every section of part characteristic to compensate CIS, its parallel output high 8 can be made for data by configuration.Native system two CIS pipes and two panels A/D conversion chip.
The present embodiment adopts the FPGA of the Cyclone II series of Altear company, and model is: EP2C20F484B, and operating voltage is 3.3V, and there are 52 M4K memory resources inside.FPGA provides sequential for CIS pipe, and control A/D samples, the pre-service of view data and transmission, and externally interface (as host computers such as PC) forwards main control chip instruction or data.Valid pixel due to CIS pipe is 1440, a line original data bits 1440bit, is 960bit after compression process.Apply for the RAM of two 2K in native system, store the information of two CIS pipes respectively.For a CIS pipe, in the high 1K space that the information ping-pong buffer of continuous print successively two row is entered the RAM of a 2K and low 1K space, an interruption is produced immediately after one line access is complete, notice main control chip fetches data, the speed controlling to fetch data, higher than the speed of deposit data, just can make the RAM of this 2K to be used continuously, efficiently.
The design of FPGA part is the core of whole multi-optical spectrum image collecting system, its allomeric function module as shown in Figure 2, mainly comprises CIS time-sequence control module, A/D mode of operation configuration module, A/D sampling time sequence control module, pll clock module, the splicing of A/D data and compression module, RAM ping-pong buffer module, UART serial communication modular, adopts the initial control module of figure, image output module in FPGA system.
The main control chip that the present embodiment uses is the dsp chip that TI company produces, and model is: TMS320C6418, and operating voltage is 3.3V, frequency of operation 600MHz, and processing speed is 4800MIPS; Chip internal has the L2 CacheMemory of Cache Memory and 215Kbytes of L1P and L1D of 16KBytes; The data of each peripheral hardware of chip are sent to CPU process by EDMA; For data-interface aspect, the data-interface that this chip does not have serial ports, USB etc. general, when therefore whole system externally transmits data, needs the serial ports by simulating out in FPGA to forward.
The present invention is mainly used in finance device, and financial industry is stable to security of system, processing speed etc. requires higher, so present invention employs two CIS pipes, gathers the double-edged image of bank note or bill simultaneously, improves and adopt figure efficiency; In order to solve the impact on circuit such as voltage, temperature, between CIS pipe analog signal output and A/D sampling A/D chip, adding a wave filter get rid of burr; In order to solve CIS manage every section between the every intersegmental gray-scale value of image that causes of physical differences there are differences, native system devises a scheme to CIS homogenization, namely the blank sheet of paper image by gathering standard calculates the difference that CIS manages every section, then regulate A/D sampling A/D chip to the bias voltage of every section of sampling, the image sections collected to make CIS is more even with gray-scale value between section.
Above-described embodiment, is only the preferred embodiments of the present invention, does not represent the present invention, within the spirit and principles in the present invention all, and any change done, change, replacement, all within protection scope of the present invention.
Claims (6)
1. contact-type image sensor multi-optical spectrum image collecting and a disposal route, step is as follows:
(1) upper and lower two symmetrical multiple light courcess CIS imageing sensors are set and gather original image;
(2) two simulating signals that CIS imageing sensor collects after filtering after deliver to simultaneously two independently A/D sampling module be quantified as digital signal;
(3) digital signal is given FPGA and is compensated, splices, compresses, stores by A/D sampling module;
(4), after FPGA has accepted a line signal, this signal is sent to main control chip;
(5) two-way information is put into buffer memory in external RAM two absolute address regions by main control chip;
(6), after whole pictures collection completes, DSP takes out picture and processes from external RAM.
2. contact-type image sensor multi-optical spectrum image collecting according to claim 1 and disposal route, it is characterized in that: step (1) devises multistage homogenization scheme for CIS pipe, gather the blank sheet of paper image of a standard, calculate CIS and manage each section of difference, calculate the offset of the sample-offset voltage of A/D, use during standby start.
3. contact-type image sensor multi-optical spectrum image collecting according to claim 1 and disposal route, it is characterized in that: the 2*N road simulating signal that step (2) two CIS collect first is sent into filtration module and removed the interference produced in circuit, and then sample quantization is 2*N railway digital signal.
4. contact-type image sensor multi-optical spectrum image collecting according to claim 1 and disposal route, it is characterized in that: after step (2) powers on, FPGA carries out initialization to CIS and A/D, determine frequency of operation and the sampling resolution of CIS, determine that the mode of operation Bing Duige road bias voltage of A/D chip compensates.
5. contact-type image sensor multi-optical spectrum image collecting according to claim 1 and disposal route, it is characterized in that: when adopting figure, main control chip control FPGA switches red, green, blue, infrared external reflection, infrared transmission, the ultraviolet source of CIS, acquisition time multispectral image.
6. contact-type image sensor multi-optical spectrum image collecting according to claim 1 and disposal route, it is characterized in that: the 2*N railway digital signal after quantification is spliced into the complete digital signal in 2 roads in FPGA, in FPGA, compression module carries out compression process to this two paths of signals, then this two paths of signals is buffered respectively in FPGA, after the signal that the complete a line of buffer memory is complete, this row signal is sent to main control chip.
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