CN103630987B - CFP optical module - Google Patents
CFP optical module Download PDFInfo
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- CN103630987B CN103630987B CN201310589957.XA CN201310589957A CN103630987B CN 103630987 B CN103630987 B CN 103630987B CN 201310589957 A CN201310589957 A CN 201310589957A CN 103630987 B CN103630987 B CN 103630987B
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Abstract
The invention discloses a kind of CFP optical module and MDIO interface circuit thereof.Described MDIO interface circuit comprises CPLD module and MCU control circuit; Described CPLD module is used for being connected switch system plate by MDIO bus with management interface address wire, and described switch system plate carries out MDIO communication; Described CPLD module selects line by interruption control line, function, parallel data line connects described MCU control circuit; Described interruption control line responds MDIO communication for controlling described MCU control circuit; Described function selects line to judge read-write type or the address function type of MDIO communication for described MCU control circuit; Described parallel data line, for transmitting MDIO communication data between described CPLD module and MCU control circuit.Application technical solution of the present invention, can realize the MDIO communication between CFP optical module and switch.
Description
Technical field
The present invention relates to technical field of photo communication, particularly relate to the pluggable encapsulation of a kind of CFP(CentumFormFactorPluggable, 100G) optical module and MDIO(ManagementDataInput/output thereof, management data input and output) interface circuit.
Background technology
CFP optical module is a kind of speed is the transceiver module that 40G/100G carries out opto-electronic conversion, adopt the MAC(MediaAccessControl of MDIO interface and switch system plate, medium access control) layer communicates, for transmitting the control and management information of MAC layer to Physical layer (PHY).
At present, the control section of CFP optical module, generally by MCU(Micro-ControllerUnit, micro controller unit) realize.But in MCU chip, all there is no integrated MDIO interface, therefore, MCU cannot be used alone to realize the MDIO interface of CFP optical module.
Summary of the invention
Based on this, be necessary to provide a kind of MDIO interface circuit, a kind of CFP optical module, apply this interface circuit and CFP optical module, the MDIO communication between CFP optical module and switch can be realized.
A kind of MDIO interface circuit, comprises CPLD module and MCU control circuit; Described CPLD module is used for being connected switch system plate by MDIO bus with management interface address wire, and described switch system plate carries out MDIO communication; Described CPLD module selects line, interruption control line, parallel data line to connect described MCU control circuit by function; Described function selects line to judge read-write type or the address function type of MDIO communication for described MCU control circuit; Described interruption control line responds MDIO communication for controlling described MCU control circuit; Described parallel data line, for transmitting MDIO communication data between described CPLD module and MCU control circuit.
Wherein in an embodiment, described MCU control circuit comprises ADUC7027 control chip.
Wherein in an embodiment, described CPLD module comprises LC4064ZE chip;
Described CPLD module comprises level shifting circuit further, carries out level conversion for the MDIO bus to described CPLD module, management interface address wire.
Wherein in an embodiment, described level shifting circuit comprises MAX3378 level transferring chip.
A kind of CFP optical module, comprises MDIO interface circuit, switch system plate connectivity port and physical chip;
Described MDIO interface circuit is any one MDIO interface circuit aforementioned;
Described switch system plate connectivity port, for connecting switch system plate;
Described CPLD module, is connected described switch system plate connectivity port by MDIO bus with management interface address wire;
Described MCU control circuit, connects described switch system plate connectivity port by state control line;
Described physical chip connects described MCU control circuit by control line, and connects described switch system plate connectivity port by data line.
Wherein in an embodiment, described data line is single-mode fiber or multimode optical fiber.
Above-mentioned MDIO interface circuit, CFP optical module, adopt CPLD in conjunction with the mode of MCU, wherein CPLD module is connected switch system plate by MDIO bus with management interface address wire, CPLD selects line by function, interrupt control line, parallel data line connects MCU control circuit, when switch system plate and CPLD carry out MDIO communication, line is selected to inform MCU read-write type or address function type by function, prepare to carry out parallel data transmission with CPLD by MCU by interrupting control line, the transmission of MDIO data is carried out again by parallel data line, thus realize the MDIO communication of CFP optical module.
Accompanying drawing explanation
Fig. 1 is the structural representation of the MDIO interface circuit in an embodiment;
Fig. 2 is the structural representation of the CFP optical module in an embodiment.
Embodiment
In order to make object of the present invention, technical scheme and advantage clearly understand, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the present invention, be not intended to limit the present invention.
See Fig. 1, in one embodiment, provide a kind of MDIO interface circuit, comprise CPLD(ComplexProgrammableLogicDevice, CPLD) module 102 and MCU control circuit 104.CPLD module 102 is for being connected switch system plate by MDIO bus with management interface address wire, MDIO communication is carried out with switch system plate, wherein in the present embodiment, management interface address wire comprises ADDR0 to ADDR4 totally 5 address input lines, and MDIO bus comprises MDO clock signal line and MDIO serial input output data line (not shown).CPLD module 102 selects line (concrete, to comprise OP0 to OP3), interruption control line (INT), parallel data line (D0 to D15) to connect MCU control circuit 104 by function.Function is selected line to be used for MCU control circuit to judge the read-write type of MDIO communication or address function type (comprise register address that MCU acquisition MDIO communication will operate, add 1 operation to current register address).Interrupting control line to respond MDIO communication for controlling MCU control circuit, preparing reception or the transmission of parallel data.Parallel data line, for transmitting MDIO communication data between CPLD module 102 and MCU control circuit 104.
Further, in the present embodiment, MCU chip can select ADUC7027, and it mainly realizes read-write type and the address function type of MDIO communication, and reception or the transmission of data is carried out by parallel data line, carry out address assignment and data management based on CFPMSA agreement.When MDIO interface circuit is applied to CFP optical module, MCU connects physical chip, and the state that can obtain physical chip stores, and starts control information to physical chip.
In the present embodiment, CPLD can adopt LC4064ZE.CPLD and switch system plate carry out MDIO serial data communication, and are carry out parallel data communication between CPLD and MCU, and therefore CPLD inside achieves serioparallel exchange function, specifically can pass through verilogHDL programming realization.
In addition, in the present embodiment, pin operating voltage due to LC4064ZE is 3.3V, and the MDIO communication level that CFP agreement specifies adopts 1.2VLVCMOS specification, therefore in CPLD module, further comprises level shifting circuit, carry out level conversion to the MDIO bus on LC4064ZE chip, management interface address wire pin, level transferring chip can be, but not limited to use MAX3378 level transferring chip.
The MDIO interface circuit that the present embodiment provides, adopt CPLD in conjunction with the mode of MCU, wherein CPLD module is connected switch system plate by MDIO bus with management interface address wire, CPLD selects line by function, interrupt control line, parallel data line connects MCU control circuit, when switch system plate and CPLD carry out MDIO communication, line is selected to inform MCU read-write type or address function type by function, prepare to carry out parallel data transmission with CPLD by MCU by interrupting control line, the transmission of MDIO data is carried out again by parallel data line, can be applied in CFP optical module, realize MDIO communication.
See Fig. 2, in one embodiment, provide a kind of CFP optical module, comprise MDIO interface circuit, switch system plate connectivity port 206 and physical chip 208.
Wherein, MDIO interface circuit is the MDIO interface circuit in previous embodiment, comprise that CPLD module 202 and MCU control circuit 204, CPLD module are selected line (OP0-OP3) by function, interrupted control line (INT), parallel data line (D0-D15) connects MCU control circuit.
Switch system plate connectivity port 206, for connecting switch system plate 300.Switch system plate 300 carries out opto-electronic conversion, the state of physical chip 208 is read by MDIO interface circuit, and sent control information to physical chip by MDIO interface circuit, and by data line (Txn, Rxn, can be single-mode fiber or multimode optical fiber) and physical chip carry out up to 40G/s, the data receiver of 100G/s or transmission, such as n value can get 4 in one embodiment, the speed of data line Tx or Rx is 10G/s, the data transmission of 40G/s can be realized, if in like manner Tx or Rx transfer rate is 25G/s, the data communication of 100G/s can be realized.
CPLD module 202, is connected switch system plate connectivity port 206 by MDIO bus (comprising MDO clock signal line and MDIO serial input output data line) with management interface address wire (ADDR0-ADDR4).
MCU control circuit 204, connects switch system plate connectivity port 206 by state control line, makes switch system plate 300 can obtain the hardware state of MCU.
Physical chip 208 connects MCU control circuit 204 by control line, for sending physical chip status and receiving control information to MCU.Meanwhile, physical chip 208 connects switch system plate connectivity port 206, for realizing communication data transfer by data line.
Concrete, the MDIO interface circuit provided in conjunction with the mode of MCU with CPLD, when being applied in this CFP optical module, principle of work is as follows:
Switch system plate 300 provides clock by MDO clock signal line to CPLD module 202, and the data layout that MDIO serial input output data line transmits is as shown in table 1:
Table 1:MDIO serial data format
Wherein, when start bit (2bit) is for during continuous two low level time " 00 ", represent beginning MDIO communication, otherwise be MDIO communication idle condition, MDIO serial input output data line is high-impedance state.
Switch system plate 300 distributes CFP module MDIO interface unique address by ADDR0-ADDR4 address wire, CPLD is when receiving the data of above-mentioned MDIO serial data format, physical port address (5bit) and ADDR0-ADDR4 are contrasted, if unanimously just respond MDIO communication, otherwise MDIO serial input output data line is set to high-impedance state.
OP0 and OP1 correspond to read-write type or address function type.Concrete, when OP0, OP1 are " 00 ", represent and inform the register address that MCU will operate, in MDIO serial data, the address of 16 is the register address that will operate.When OP0, OP1 are " 01 ", represent and carry out data write operation, MCU writes MDIO communication data by the front register once obtaining address.When OP0, OP1 are " 11 ", represent and carry out data reading operation, MCU reads MDIO communication data by the front register once obtaining address.When OP0, OP1 are " 01 ", represent that carrying out address adds 1 operation, MCU will add 1 to current register address, to carry out data write or read next time.
In the present embodiment, type of device (5bit) acquiescence is " 00001 ".If in MDIO serial data, this 5 bit data is not inconsistent, and CPLD will be set to high-impedance state MDIO serial input output data line.
Thus, in the CFP optical module in the present embodiment, by the mode of CPLD in conjunction with MCU, achieve MDIO communication, switch system plate MAC layer can be enable to obtain the state of physical chip, and send control information to physical chip.
The above embodiment only have expressed several embodiment of the present invention, and it describes comparatively concrete and detailed, but therefore can not be interpreted as the restriction to the scope of the claims of the present invention.It should be pointed out that for the person of ordinary skill of the art, without departing from the inventive concept of the premise, can also make some distortion and improvement, these all belong to protection scope of the present invention.Therefore, the protection domain of patent of the present invention should be as the criterion with claims.
Claims (5)
1. a CFP optical module, is characterized in that, comprises MDIO interface circuit, switch system plate connectivity port and physical chip;
Described MDIO interface circuit comprises CPLD module and MCU control circuit, described CPLD module is used for being connected switch system plate by MDIO bus with management interface address wire, MDIO communication is carried out with described switch system plate, described CPLD module selects line by function, interrupt control line, parallel data line connects described MCU control circuit, described function selects line to judge read-write type or the address function type of MDIO communication for described MCU control circuit, described interruption control line responds MDIO communication for controlling described MCU control circuit, described parallel data line, for transmitting MDIO communication data between described CPLD module and MCU control circuit,
Described switch system plate connectivity port, for connecting switch system plate;
Described CPLD module, is connected described switch system plate connectivity port by MDIO bus with management interface address wire;
Described MCU control circuit, connects described switch system plate connectivity port by state control line;
Described physical chip connects described MCU control circuit by control line, and connects described switch system plate connectivity port by data line.
2. CFP optical module according to claim 1, is characterized in that, described data line is single-mode fiber or multimode optical fiber.
3. CFP optical module according to claim 1, is characterized in that, described MCU control circuit comprises ADUC7027 control chip.
4. CFP optical module according to claim 1, is characterized in that, described CPLD module comprises LC4064ZE chip;
Described CPLD module comprises level shifting circuit further, carries out level conversion for the MDIO bus to described CPLD module, management interface address wire.
5. CFP optical module according to claim 4, is characterized in that, described level shifting circuit comprises MAX3378 level transferring chip.
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| CN201310589957.XA CN103630987B (en) | 2013-11-20 | 2013-11-20 | CFP optical module |
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| CN201310589957.XA CN103630987B (en) | 2013-11-20 | 2013-11-20 | CFP optical module |
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| CN103630987B true CN103630987B (en) | 2015-11-18 |
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| CN105488004A (en) * | 2015-11-27 | 2016-04-13 | 山东超越数控电子有限公司 | I2C line multiplexing control logic method under startup and shutdown states of server |
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| CN201886466U (en) * | 2010-12-15 | 2011-06-29 | 武汉电信器件有限公司 | Seamless transition module from MDIO (management data input output) bus slave computer to SPI (serial peripheral interface) bus |
| CN102521189A (en) * | 2011-12-08 | 2012-06-27 | 北京华源格林科技有限公司 | Method for realizing MDIO (Management Data Input/Output) interface signal transformation through CPLD (Complex Programmable Logic Device) |
| CN102750253A (en) * | 2012-06-06 | 2012-10-24 | 武汉电信器件有限公司 | Centum form factor pluggable (CFP) optical module and management data input/output (MDIO) interface communication method thereof |
| CN103226533A (en) * | 2013-03-29 | 2013-07-31 | 福建星网锐捷通讯股份有限公司 | Device for extending MDIO (management data input/output) interface through parallel buses and realizing method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8412051B2 (en) * | 2006-10-13 | 2013-04-02 | Menara Networks, Inc. | 40G/100G optical transceivers with integrated framing and forward error correction |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201886466U (en) * | 2010-12-15 | 2011-06-29 | 武汉电信器件有限公司 | Seamless transition module from MDIO (management data input output) bus slave computer to SPI (serial peripheral interface) bus |
| CN102521189A (en) * | 2011-12-08 | 2012-06-27 | 北京华源格林科技有限公司 | Method for realizing MDIO (Management Data Input/Output) interface signal transformation through CPLD (Complex Programmable Logic Device) |
| CN102750253A (en) * | 2012-06-06 | 2012-10-24 | 武汉电信器件有限公司 | Centum form factor pluggable (CFP) optical module and management data input/output (MDIO) interface communication method thereof |
| CN103226533A (en) * | 2013-03-29 | 2013-07-31 | 福建星网锐捷通讯股份有限公司 | Device for extending MDIO (management data input/output) interface through parallel buses and realizing method thereof |
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