CN103618853B - Programmable simulation device and method for infrared focal plane device video output signal - Google Patents
Programmable simulation device and method for infrared focal plane device video output signal Download PDFInfo
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Abstract
The invention belongs to the technical field of signal simulation, and relates to a programmable simulation device and method for an infrared focal plane device video output signal. The device comprises a main control module, a CPCI bus interface circuit, a signal simulation unit and a signal test unit, wherein the main control module is connected with the CPCI bus interface circuit through a CPCI bus and the CPCI bus interface circuit is connected with the signal simulation unit and the signal test module through internal buses respectively. According to the programmable simulation device and method, conversion between an infrared video file and a data signal file can be achieved, reading, infrared characteristic processing, display and signal sending control of a video data file can be achieved, universality, portability and practicability of the simulation device can be achieved, the debugging method of a rear end video data collection module is optimized, and the debugging time is shortened.
Description
Technical field
The present invention relates to the exploitation debugging technique of infrared imaging system, more particularly, to a kind of infrared focal plane device video is defeated
Go out the programmable analog device and method of signal, belong to signal imitation technical field.
Background technology
At present, infrared imagery technique is widely used to the every field such as military affairs, industry, agricultural, medical treatment and scientific research.
Infrared imaging system mainly includes infrared optical system, infrared focal plane device and its data collecting system, and its mid-infrared is burnt flat
Face device is its core component, for receiving infrared radiation signal and being converted into the corresponding signal of telecommunication, if directly using infrared Jiao
Planar device carries out the development of Back end data acquisition system, test, correction etc., on the one hand due to the development of focal plane, buying etc.
Reason can affect the Development Schedule of data collecting system；On the other hand due to the test of system can not possibly disposably success complete
Become, need repeatedly to plug the performance that focal plane device carrys out test system, so can bring risk by focal plane device performance；Simultaneously
Due also to the uncertainty of front end light path system function, the uncertainty of rear end infrared collecting system debug can be led to.Therefore have
Necessity to simulate infrared focal plane device output signal using analog, and data collecting system is debugged, and verifies its electricity
Road design and the accuracy of hardware logic sequential.
Infrared armament systems just develop towards the direction of high accuracy, high accuracy, and the performance of infrared imaging system is shadow
Ring the key factor of infrared armament systems.In the research test and maintenance of the weapons such as infrared imaging guidance, need corresponding instrument
The electric system that device comes focal plane rear end is tested.Either infrared weapon development unit, infrared armament systems maintaining unit,
Or focal plane research institute, is required for a test instrunment, can simulate focal plane output signal, the electricity of focal plane rear end
System is tested.Focal plane input signal can also be tested simultaneously, detect whether it meets the requirement of input signal.
The design framework of existing detector simulation device is substantially similar, by the pci interface of computer by IR Scene image
It is injected in detector simulation device, detector simulation device enters to image after row cache and sequential arrange at according to infrared live signal
The demand output of platform.Existing infrared imaging detector Simulator design is all simple, simple for for infrared signal
Processing platform provides the consideration of image data source to design.This design implementation method still has in function and application scope
Significant limitation.First, the detector simulation being made to the method for internal Flash from downloaded image scene by serial ports
Device can only play default limited a few width scenes, when infrared imaging system processor needs complex dynamic scene
Demand just cannot be met, the information processing system of some closed loops just more cannot be achieved；Secondly, it only achieves to detection
The simulation of device interface, and in imaging process, the impact to infrared image does not account for detector, such as explorer response is non-
Linearly, noise of heterogeneity and superposition etc., or only there is still image analog functuion, or only have digital signal data
It is transferred to data processing platform (DPP) function, or only there is initial data function of injecting, and data can not be processed.
Accordingly, it is capable to no design a kind of new analog of infrared focal plane device video output signals and method with gram
Take drawbacks described above, becoming those skilled in the art has technical barrier to be solved.
Content of the invention
In view of the drawbacks described above of prior art, the present invention is intended to provide a kind of infrared focal plane device video output signals
Programmable analog device and method, be capable of the conversion of infrared video file and data signal file, and realize video counts
Process according to the reading of file, infrared characteristic, display is controlled with the transmission of signal.
The present invention is achieved in that the programmable analog device of this infrared focal plane device video output signals includes：
Main control module, cpci bus interface circuit, signal imitation unit and signal testing unit, wherein, main control module is total with CPCI
Interface circuit is connected by cpci bus, cpci bus interface circuit pass through internal bus respectively with signal imitation unit, letter
Number test cell connects.
In some technical schemes, signal imitation unit include DPLL clock occur and programmable clock distribute module, with
Step signal generator module, sync signal delay module, DAC module and memory module, cpci bus interface circuit passes through interior
Portion's bus is occurred and programmable clock distribute module, synchronizing signal generation module, sync signal delay mould with DPLL clock respectively
Block, DAC module and memory module connect；Signal testing unit includes analog channel, clock and trigger module data and adopts
Collection and memory module, cpci bus interface circuit pass through internal bus respectively with Data acquisition and storage module, clock and triggering
Module one end connects, and Data acquisition and storage module, clock are all connected with analog channel with the other end of trigger module；Its output
Waveform is one section of video of Serial output, and each clock represents a pixel of infrared focal plane array, high level representation signal,
Low level represents background, the ceiling voltage corresponding grey scale value 255 of waveform, the minimum voltage corresponding grey scale value 0 of waveform, waveform modelling
Pixel any one magnitude of voltage between high level and low level, is converted into corresponding gray value, by main control module
The output amplitude of the programming described output waveform of change, output array, output frequency, obtain the interface simulation of disposable type detector
Signal and digital signal output.
In some technical schemes, signal testing unit also includes output interface, and it is with sync signal delay module, DAC
Module is connected, and output rear-class video acquisition module inputs required interface analogue signal and digital signal.
In some technical schemes, main control module is single-chip microcomputer or FPGA, is programmed designing by VHDL language, right
DPLL clock occur and programmable clock distribute module, synchronizing signal generation module, sync signal delay module, DAC module with
And memory module is controlled, complete the conversion of image waveform, waveform shows and edits, arranges focal plane device scale, output
The frequency of signal, amplitude, frame line blanking time, the function of sync signal delay time；Cpci bus interface circuit is in Xilinx
Carry out under the ISE9.1 environment of company, complete the design of circuit with VHDL hardware description language, complete decoding, register configuration,
Access retries, even-odd check and state machine control function；DPLL clock occurs and programmable clock distribute module is with NBC12429
Chip is core design, produces high accuracy, the low-jitter clock signal of out of phase；Synchronizing signal generation module is in clock signal
In the presence of, according to the requirement of described main control module, export D/A control signal, frame, row, pixel, CDS synchronizing signal；Synchronous letter
Analogue signal is synchronized by number Postponement module with CDS synchronizing signal, eliminates the transmission delays affect of output analogue signal.
In some technical schemes, analog channel receipt signal test cell returns or the analogue signal of outside input or number
Word signal, is sent to Data acquisition and storage module and is analyzed processing；Clock and trigger module under the control of main control module,
Produce clock and trigger, be sent to Data acquisition and storage module；Data acquisition and storage module is according to clock and triggering
Signal, carries out data acquisition, storage and display to the analogue signal receiving or digital signal.
In some technical schemes, signal testing unit also includes an input interface, and it is connected with analog channel.
In some technical schemes, this device also includes panel button module and display module, respectively with main control module even
Connect, carry out man-machine interaction.
In some technical schemes, this device also includes interface control module, with main control module and cpci bus interface electricity
Road connects, and according to the instruction of main control module, EBI is controlled.
In some technical schemes, this device also includes low voltage difference high stable state power module.
The invention also discloses a kind of programmable analog method of infrared focal plane device video output signals, it include as
Lower step：
Step one, the waveform of the programmable analog device output of infrared focal plane device video output signals is Serial output
One section of video, each clock represents a pixel of infrared focal plane array, by man-machine interface and main control module to simulation
The output voltage data of pixel is edited, or Load Images and using image processing techniquess by image rapid translating be waveform number
It is stored in memory module according to, the output voltage data of editor or the Wave data of conversion；
Step 2, arranges focal plane device scale by man-machine interface and main control module；
Step 3, master control module controls DPLL clock occurs and programmable clock distribute module produces accurate clock, passes through
Accurate clock takes out Wave data or output voltage data from memory module, controls circuit for generating synchronous signals to produce simultaneously
Frame corresponding with Wave data, row, pixel and CDS synchronizing signal；
Step 4, by the Wave data taking out or output voltage data, and the frame, row, pixel and the CDS that produce synchronously believe
Number deliver to DAC module, exported to video acquisition module in the lump by output interface；
Step 5, analog channel receives the analogue signal or digital signal from the return of signal testing unit or outside input,
It is sent to Data acquisition and storage module；
Step 6, clock and trigger that Data acquisition and storage module produces according to clock and trigger module, docking
The analogue signal receiving or digital signal carry out data acquisition, storage and display.
Compared with prior art, beneficial effects of the present invention are as follows：
1. General design, when debugging different video data acquisition module, accomplishes that analog signal output scope, array are big
Little, the isoparametric programmable setting of frequency, frame line phase relation；
2. integrative design, instrument miniaturization and easy to operate；
3. practicality strengthens, and analog fixture can be directly connected to rear end prober interface connection end；
4. adjustment method optimization, reduces debugging cost, shortens debug time；
5. video continuously transmits, and is controlled by the coordination of software and hardware, big data quantity video signal realize software and hardware it
Between continuously transmit it is ensured that the continuous not frame losing of video signal be transferred to rear end prober interface connection end.
Technique effect below with reference to design, concrete structure and generation to the present invention for the accompanying drawing is described further, with
It is fully understood from the purpose of the present invention, feature and effect.
Brief description
Fig. 1 is a kind of structural representation of the programmable analog device of infrared focal plane device video output signals of the present invention
Figure.
Symbol description
1 main control module
2CPCI bus interface circuit
3DPLL clock occurs and programmable clock distribute module
4 synchronizing signal generation modules
5 sync signal delay modules
6DAC module
7 memory modules
8 analog channels
9 clocks and trigger module
10 Data acquisition and storage modules
Specific embodiment
Be illustrated in figure 1 the embodiment of the invention, this infrared focal plane device video output signals programmable
Analog mainly includes：Main control module 1, cpci bus interface circuit 2, signal imitation unit and signal testing unit, its
In, main control module 1 is connected by cpci bus with cpci bus interface circuit 2, and cpci bus interface circuit 2 passes through internal bus
It is connected with signal imitation unit, signal testing unit respectively.
Signal imitation unit include DPLL clock occur and programmable clock distribute module 3, synchronizing signal generation module 4,
Sync signal delay module 5, DAC module 6 and memory module 7, cpci bus interface circuit 2 pass through internal bus respectively with
DPLL clock occurs and programmable clock distribute module 3, synchronizing signal generation module 4, sync signal delay module 5, DAC module
6 and memory module 7 connect.
Signal testing unit includes analog channel 8, clock and the collection of trigger module 9 data and memory module 10, CPCI
Bus interface circuit 2 is connected with trigger module 9 one end with Data acquisition and storage module 10, clock respectively by internal bus,
Data acquisition and storage module 10, clock are all connected with analog channel 8 with the other end of trigger module 9.
DPLL clock main control module 1 occurs and programmable clock distribute module 3, synchronizing signal generation module 4, synchronous letter
Number Postponement module 5, DAC module 6 and memory module 7 are controlled, and it is programmed designing by VHDL language, completes figure
When showing and edit, focal plane device scale, the frequency of output signal, amplitude, frame line blanking are set as waveform conversion, waveform
Between, the function such as the parameter such as sync signal delay time.In a better embodiment, e.g. single-chip microcomputer, FPGA etc., for example
Spartan.IIIXC3S200 the or Spartan-6 series of Xilinx company.
CPCI (compact PCI) bus interface circuit 2 mainly completes decoding, register configuration, access retry, even-odd check
And state machine control function.In a better embodiment, it designs and develops the ISE9.1 environment e.g. in Xilinx company
Under carry out, complete the design of circuit with VHDL hardware description language.
DPLL (all-digital phase-locked loop) clock occurs and programmable clock distribute module 3 is used for producing the high-precision of out of phase
Degree, low-jitter clock signal.In a better embodiment, for example, design on the basis of NBC12429 chip is core.
Synchronizing signal generation module 4, in the presence of clock signal, according to the requirement of main control module 1, exports D/A and controls letter
Number, frame, row, pixel, CDS synchronizing signal etc..
Analogue signal is synchronized by sync signal delay module 5 with CDS synchronizing signal, eliminates output analogue signal and passes through
The impact of the transmission delay of memorizer, DAC conversion, isolating chip etc..
DAC module 6 is analog-digital converter, for realizing the conversion of analog quantity-digital quantity.
Memory module 7 is, for example, eeprom memory.
The direct output of infrared digital signal or digital signal are finally realized through DAC by the cooperation of function above part
Conversion, obtains requiring consistent analogue signal with the detector output interface being actually subjected to simulate.
The waveform of the programmable analog device output of infrared focal plane device video output signals is a section of Serial output
Video, each clock represents a pixel of infrared focal plane array, its high level representation signal, and low level represents background.Profit
With gradation of image grade principle, the ceiling voltage corresponding grey scale value 255 (white) of waveform, the minimum voltage corresponding grey scale value of waveform
0 (black), waveform modelling pixel any one magnitude of voltage between high level and low level, will be corresponding corresponding by conversion relation
Gray value.Therefore, on the basis of the phase relation between control frame, row, pixel, CDS synchronizing signal and analogue signal, only
To change waveform output amplitude, output array, output frequency by the programming of main control module 1, you can obtain disposable type and visit
Survey the interface analogue signal of device and the output of digital signal.
Analog channel 8 is used for receipt signal test cell and returns or the analogue signal of outside input or digital signal, transmission
It is analyzed processing to Data acquisition and storage module 10.
Clock and trigger module 9, under the control of main control module 1, produce clock and trigger, are sent to data acquisition
With memory module 10.
Data acquisition and storage module 10, according to clock and trigger, is entered to the analogue signal or digital signal receiving
Row data acquisition and storage, are easy to follow-up analyzing and processing.
In a better embodiment, signal imitation unit also includes an output interface, and it is with sync signal delay module
5th, DAC module 6 is connected, and the required each interface signal of output rear-class video acquisition module input, including digital signal：Frame synchronization
Signal, line synchronising signal (integrated signal), pixel synchronizing signal, CDS synchronizing signal；And analogue signal：Simulation focal plane device
Part image-forming information exports.
In a better embodiment, signal testing unit also includes an input interface, and it is connected with analog channel 8,
Analogue unit return or the analogue signal of outside input or digital signal are inputted this infrared focal plane device video output signals
Programmable analog device, to process to signal.
In a better embodiment, the programmable analog device of this infrared focal plane device video output signals also includes
Panel button module and display module, are connected with main control module 1 respectively, for the man-machine interaction of this device, the such as volume of signal
Volume, figure shows etc..
In a better embodiment, the programmable analog device of this infrared focal plane device video output signals also includes
Interface control module, is connected with main control module 1 and cpci bus interface circuit 2, for according to the instruction of main control module 1 to bus
Interface is controlled.
In a better embodiment, the programmable analog device of this infrared focal plane device video output signals also includes
Low voltage difference high stable state power module, is connected with other each modules, provides the power supply signal of low voltage difference, high stable state for it.
The invention also discloses what a kind of employing said apparatus were simulated to infrared focal plane device video output signals
Method, comprises the steps：
Step one, is edited to the output voltage data of simulation pixel by man-machine interface and main control module 1, or loads
Image simultaneously adopts image processing techniquess to be Wave data, the output voltage data of editor or the waveform of conversion by image rapid translating
Data storage is in memory module 7；
Step 2, edits the scale of analog device by man-machine interface and main control module 1；
Step 3, main control module 1 controls DPLL clock to occur and programmable clock distribute module 3 produces accurate clock, leads to
Cross accurate clock and take out Wave data or output voltage data from memory module 7, control circuit for generating synchronous signals 4 simultaneously
Produce frame corresponding with Wave data, row, pixel and CDS synchronizing signal；
Step 4, by the Wave data taking out or output voltage data, and the frame, row, pixel and the CDS that produce synchronously believe
Number deliver to DAC module 6, exported to video acquisition module in the lump by output interface；
Step 5, analog channel 8 receives the analogue signal or digital signal from the return of signal testing unit or outside input,
It is sent to Data acquisition and storage module 10；
Step 6, clock and trigger that Data acquisition and storage module 10 produces according to clock and trigger module 9, right
The analogue signal receiving or digital signal carry out data acquisition, storage and display.
This analog not only by editor's waveform can export the corresponding frame synchronization of video imaging information, row synchronous, as
Unit is synchronous, CDS is synchronous, imaging video message digit signal, can also carry out programmable setting to these output parameters, including same
Step signal frequency, image-forming information out-put dynamic range, and video signal is done with the process of corresponding infrared characteristic, fix including superposition
Noise, pixel cross-talk is processed, video scene selects etc. it is achieved that the conversion of video file and data signal file, and realizes number
According to the reading of file, process, show that the transmission with signal controls, and coordinated by software and hardware, realize signal and send and reception
Synchronization Control, completes video signal continuous reception and transmission on hardware.
The preferred embodiment of the present invention described in detail above.It should be appreciated that those of ordinary skill in the art need not
Creative work just can make many modifications and variations according to the design of the present invention.Therefore, all those skilled in the art are according to this
The available technical side of logical analysis, reasoning, or a limited experiment is passed through in the design of invention on the basis of existing technology
Case, all should be in the protection domain being defined in the patent claims.
Claims (8)
1. a kind of programmable analog device of infrared focal plane device video output signals is it is characterised in that include：Main control module
(1), cpci bus interface circuit (2), signal imitation unit and signal testing unit, wherein, described main control module (1) with
Cpci bus interface circuit (2) is connected by cpci bus, described cpci bus interface circuit (2) pass through internal bus respectively with
Described signal imitation unit, signal testing unit connect；
Described signal imitation unit includes DPLL clock and occurs and programmable clock distribute module (3), synchronizing signal generation module
(4), sync signal delay module (5), DAC module (6) and memory module (7), described cpci bus interface circuit (2) is led to
Cross internal bus respectively with described DPLL clock occur and programmable clock distribute module (3), synchronizing signal generation module (4),
Sync signal delay module (5), DAC module (6) and memory module (7) connect；Described signal testing unit includes simulating
Passage (8), clock and the collection of trigger module (9) data and memory module (10), described cpci bus interface circuit (2) is passed through
Internal bus is connected with trigger module (9) one end with described Data acquisition and storage module (10), clock respectively, and described data is adopted
Collection is all connected with described analog channel (8) with the other end of trigger module (9) with memory module (10), clock；Infrared focus plane
The programmable analog device output waveform of device video output signals is one section of video of Serial output, and each clock represents infrared
One pixel of focal plane arrays (FPA), high level representation signal, low level represents background, the ceiling voltage corresponding grey scale value of waveform
255, the minimum voltage corresponding grey scale value 0 of waveform, waveform modelling pixel any one voltage between high level and low level
Value, is converted into corresponding gray value, by the programming of described main control module (1) change described output waveform output amplitude,
Output array, output frequency, obtain the interface analogue signal of disposable type detector and digital signal output.
2. a kind of programmable analog device of infrared focal plane device video output signals as claimed in claim 1, its feature
It is, described signal imitation unit also includes an output interface, it is with described sync signal delay module (5), DAC module (6)
It is connected, output rear-class video acquisition module inputs required interface analogue signal and digital signal.
3. a kind of programmable analog device of infrared focal plane device video output signals as claimed in claim 1, its feature
It is, described main control module (1) is single-chip microcomputer or FPGA, be programmed designing by VHDL language, described DPLL clock is sent out
Life and programmable clock distribute module (3), synchronizing signal generation module (4), sync signal delay module (5), DAC module (6)
And memory module (7) is controlled, complete image waveform conversion, waveform show and edit, arrange focal plane device scale,
The frequency of output signal, amplitude, frame line blanking time, the function of sync signal delay time；Described cpci bus interface circuit
(2) carry out under the ISE9.1 environment of Xilinx company, complete the design of circuit with VHDL hardware description language, complete decoding,
Register configuration, access retry, even-odd check and state machine control function；Described DPLL clock occurs and programmable clock distribution
Module (3), with NBC12429 chip as core design, produces high accuracy, the low-jitter clock signal of out of phase；Described synchronization
Signal generator module (4) in the presence of clock signal, according to the requirement of described main control module (1), export D/A control signal,
Frame, row, pixel, CDS synchronizing signal；Analogue signal and CDS synchronizing signal are carried out same by described sync signal delay module (5)
Step, eliminates the transmission delays affect of output analogue signal.
4. a kind of programmable analog device of infrared focal plane device video output signals as claimed in claim 1, its feature
It is, described analog channel (8) can receive the analogue signal or digital signal from the return of signal testing unit or outside input, passes
Deliver to described Data acquisition and storage module (10) to be analyzed processing；Described clock and trigger module (9) are in described master control mould
Under the control of block (1), produce clock and trigger, be sent to described Data acquisition and storage module (10)；Described data is adopted
Collection with memory module (10) according to clock and trigger, the analogue signal receiving or digital signal are carried out data acquisition,
Storage and display.
5. a kind of programmable analog device of infrared focal plane device video output signals as claimed in claim 1, its feature
It is, described signal testing unit also includes an input interface, it is connected with described analog channel (8).
6. a kind of programmable analog device of infrared focal plane device video output signals as claimed in claim 1, its feature
It is, also includes panel button module and display module, be connected with described main control module (1) respectively, carry out man-machine interaction.
7. a kind of programmable analog device of infrared focal plane device video output signals as claimed in claim 1, its feature
It is, also includes interface control module, be connected with described main control module (1) and cpci bus interface circuit (2), according to described master
The instruction of control module (1) is controlled to EBI.
8. a kind of programmable analog method of infrared focal plane device video output signals is it is characterised in that comprise the steps：
Step one, the waveform of the programmable analog device output of infrared focal plane device video output signals is the one of Serial output
Section video, each clock represents a pixel of infrared focal plane array, defeated to pixel by man-machine interface and main control module
Go out voltage data and enter edlin, or Load Images and using image processing techniquess by image rapid translating be Wave data, editor
Output voltage data or the Wave data of conversion be stored in memory module；
Step 2, arranges focal plane device scale by man-machine interface and main control module；
Step 3, master control module controls DPLL clock occurs and programmable clock distribute module produces accurate clock, by accurate
Clock takes out Wave data or output voltage data from memory module, controls circuit for generating synchronous signals to produce and ripple simultaneously
The corresponding frame of graphic data, row, pixel and CDS synchronizing signal；
Step 4, by the Wave data taking out or output voltage data, and the frame, row, pixel and the CDS synchronizing signal that produce are sent
To DAC module, exported to video acquisition module in the lump by output interface；
Step 5, analog channel receives the analogue signal or digital signal from the return of signal testing unit or outside input, transmission
To Data acquisition and storage module；
Step 6, clock and trigger that Data acquisition and storage module produces according to clock and trigger module, to receiving
Analogue signal or digital signal carry out data acquisition, storage and display.
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| CN104270586B (en) * | 2014-10-14 | 2017-05-17 | 中国电子科技集团公司第四十四研究所 | Focal plane reading circuit in optional line-by-line or interlacing reading mode |
| CN108665847B (en) * | 2018-05-17 | 2020-10-23 | 深圳市灵星雨科技开发有限公司 | Method for eliminating dark and bright of LED display screen |
| CN113064362A (en) * | 2020-01-02 | 2021-07-02 | 上海鹏武电子科技有限公司 | Multichannel analog data real-time acquisition system |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6111241A (en) * | 1998-11-24 | 2000-08-29 | The United States Of America As Represented By The Secretary Of The Army | Semi-active laser last pulse logic seeker utilizing a focal plane array |
| CN101241028A (en) * | 2007-02-07 | 2008-08-13 | 南京理工大学 | Infrared focal plane array image-forming demonstration system |
| CN102004219A (en) * | 2010-09-17 | 2011-04-06 | 南京理工大学 | Infrared focal plane array detector simulation device and method |
| WO2011149826A1 (en) * | 2010-05-25 | 2011-12-01 | Siemens Product Lifecycle Management Software Inc. | Method and system for closed-loop controller programming |
| CN102538972A (en) * | 2011-12-31 | 2012-07-04 | 中国电子科技集团公司第四十一研究所 | Infrared focal plane array signal simulator |
-
2013
- 2013-11-19 CN CN201310616222.1A patent/CN103618853B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6111241A (en) * | 1998-11-24 | 2000-08-29 | The United States Of America As Represented By The Secretary Of The Army | Semi-active laser last pulse logic seeker utilizing a focal plane array |
| CN101241028A (en) * | 2007-02-07 | 2008-08-13 | 南京理工大学 | Infrared focal plane array image-forming demonstration system |
| WO2011149826A1 (en) * | 2010-05-25 | 2011-12-01 | Siemens Product Lifecycle Management Software Inc. | Method and system for closed-loop controller programming |
| CN102004219A (en) * | 2010-09-17 | 2011-04-06 | 南京理工大学 | Infrared focal plane array detector simulation device and method |
| CN102538972A (en) * | 2011-12-31 | 2012-07-04 | 中国电子科技集团公司第四十一研究所 | Infrared focal plane array signal simulator |
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