CN113064362A - Multichannel analog data real-time acquisition system - Google Patents
Multichannel analog data real-time acquisition system Download PDFInfo
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- CN113064362A CN113064362A CN202010000693.XA CN202010000693A CN113064362A CN 113064362 A CN113064362 A CN 113064362A CN 202010000693 A CN202010000693 A CN 202010000693A CN 113064362 A CN113064362 A CN 113064362A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0423—Input/output
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/21—Pc I-O input output
- G05B2219/21137—Analog to digital conversion, ADC, DAC
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Abstract
The invention discloses a multi-channel analog data real-time acquisition system which comprises an infrared focal plane, an AD conversion module, an FPGA and a storage module. The multi-channel output port of the infrared focal plane is connected with the multi-channel input port of the AD conversion module, the multi-channel output port of the AD conversion module is connected with the multi-channel input port of the FPGA, the multi-channel analog signals of the infrared focal plane are input to the AD conversion module, the AD conversion module converts the multi-channel analog signals into multi-channel digital signals according to the acquisition clock sent by the FPGA and sends the multi-channel digital signals to the FPGA, the FPGA determines effective signals of each digital signal according to the phase of the acquisition clock and the corresponding delay parameters of the multi-channel analog signals respectively, and the effective signals are stored in the storage module. The multi-channel analog channels can be simultaneously acquired in one clock period, the condition that invalid data are acquired by individual channels is avoided, and the problem of synchronization of acquisition clocks is solved.
Description
Technical Field
The embodiment of the invention relates to the technical field of infrared acquisition, in particular to a multi-channel analog data real-time acquisition system.
Background
The existing infrared focal plane data processing scheme is to position an effective data acquisition point by adjusting the phase of an AD acquisition clock on the aspect of processing the synchronization of the AD acquisition clock, and theoretically, the method can only be adjusted within a clock period (0-360 degrees). However, in practical applications, a delay exceeding one clock cycle may occur, and particularly, such a situation is more likely to occur when multi-channel analog data is simultaneously acquired, and input delays of each channel are still different, if data is aligned by simply adjusting a clock phase, requirements on related peripheral devices are high, and debugging difficulty is high.
Disclosure of Invention
The embodiment of the invention provides a multi-channel analog data real-time acquisition system, which is used for acquiring multi-channel analog data and improving the acquisition efficiency.
In a first aspect, an embodiment of the present invention provides a multi-channel analog data real-time acquisition system, including: the system comprises an infrared focal plane, an AD (Analog-to-Digital) conversion module, an FPGA (Field-Programmable Gate Array) and a storage module;
the multi-channel output port of the infrared focal plane is connected with the multi-channel input port of the AD conversion module; the multi-path output port of the AD conversion module is connected with the multi-path input port of the FPGA;
the multi-channel analog signals of the infrared focal plane are input to the AD conversion module, the AD conversion module converts the multi-channel analog signals into multi-channel digital signals according to the acquisition clock sent by the FPGA, and sends the multi-channel digital signals to the FPGA; and the FPGA determines an effective signal of each digital signal according to the phase of the acquisition clock and the respective corresponding delay parameter of the multiple paths of analog signals, and stores the effective signal in the storage module.
In the technical scheme, the AD conversion module converts the multiple paths of analog signals into the multiple paths of digital signals according to the high-frequency acquisition clock sent by the FPGA, so that the FPGA determines the effective signals of each path of digital signals according to the phase of the acquisition clock and the respective corresponding delay parameters of the multiple paths of analog signals, the simultaneous acquisition of the multiple paths of analog channels in one clock period is realized, the condition that invalid data are acquired by individual channels is avoided, and the problem of synchronization of the acquisition clock is solved.
Optionally, the system further includes a terminal device;
the terminal equipment is connected with the FPGA, reads the effective data from the storage module through the FPGA, displays the effective data in an image form, and analyzes the effective data.
Optionally, the system further comprises a flash memory module;
the flash memory module is connected with the FPGA, and the terminal equipment receives the working information of the infrared focal plane configured by a user; sending the working information to the FPGA; and the FPGA stores the working information in the flash memory module.
Optionally, when it is determined that the infrared focal plane works, the FPGA reads the working information from the flash memory module, and determines an excitation waveform according to the working information and sends the excitation waveform to the infrared focal plane.
Optionally, the operation information includes a configured excitation waveform and configuration parameters.
Optionally, the configuration parameter includes the delay parameter.
Optionally, the acquisition clock is a high-frequency acquisition clock.
Optionally, the terminal device is a PC.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a multi-channel analog data real-time acquisition system according to an embodiment of the present invention;
fig. 2 is a schematic diagram of an operation timing sequence according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the present invention will be described in further detail with reference to the accompanying drawings, and it is apparent that the described embodiments are only a part of the embodiments of the present invention, not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 1 schematically shows a multi-channel analog data real-time acquisition system to which an embodiment of the present invention is applicable, including: the infrared focal plane 100, the AD conversion module 200, the FPGA300 and the storage module 400.
The multi-channel output port of the infrared focal plane 100 is connected to the multi-channel input port of the AD conversion module 200, the multi-channel output port of the AD conversion module 200 is connected to the multi-channel input port of the FPGA300, the multi-channel analog signal of the infrared focal plane 100 is input to the AD conversion module 200, the AD conversion module 200 converts the multi-channel analog signal into a multi-channel digital signal according to the acquisition clock transmitted by the FPGA300 and transmits the multi-channel digital signal to the FPGA300, and the FPGA300 determines the effective signal of each digital signal according to the phase of the acquisition clock and the respective corresponding delay parameter of the multi-channel analog signal and stores the effective signal in the storage module 400.
In the embodiment of the present invention, the acquisition clock is a high-frequency acquisition clock, the frequency of the acquisition clock is higher than that of a PCLK clock, and the acquisition clock is mainly used for outputting a data valid signal at a proper position according to a delay parameter of each channel in synchronization of the acquisition clock.
In a specific implementation process, the memory module 400 may be a high-capacity and high-bandwidth memory chip such as DDR3, DDR4, DDR5, and the like.
The multi-channel analog data real-time acquisition system may further include a terminal device 600, and the terminal device 600 may be a PC, a notebook computer, a PAD, or the like. The terminal device 600 may be connected to the FPGA300, and mainly reads valid data from the storage module 400 through the FPGA300, displays the valid data in the form of an image, and analyzes the valid data. The terminal device 600 may be connected to and communicate with the FPGA300 through a PCIE (peripheral component interconnect express, high-speed Serial computer extended Bus standard), a USB (Universal Serial Bus), a network cable, an optical fiber, and other connection modes.
Further, the multi-channel real-time analog data acquisition system further includes a FLASH memory module 500, the FLASH memory module 500 may be a power-down nonvolatile memory such as FLASH, and the FLASH memory module 500 may be connected to the FPGA300, and is configured to receive the working information of the infrared focal plane 100 configured by the user through the terminal device 600, and send the working information to the FPGA300, and the FPGA300 stores the working information in the FLASH memory module 500. In addition, when determining that the infrared focal plane 100 is working, the FPGA300 may also read working information from the flash memory module 500, determine an excitation waveform according to the working information, and send the excitation waveform to the infrared focal plane 100.
It should be noted that the operation information may include the configured excitation waveform and the configuration parameters. The configuration parameters may include the delay parameters of the channels, so that the FPGA300 outputs the valid data signal at a suitable position according to the delay parameters of each channel in synchronization with the acquisition clock.
In the embodiment of the present invention, the FPGA300, the AD conversion module 200, the flash memory module 500, and the storage module 400 may be integrated on the same motherboard or located on different motherboards respectively in the specific implementation process, which may be set according to experience, and this is not specifically limited in the embodiment of the present invention.
To better explain the embodiment of the present invention, the following is a further explanation through the workflow of the multi-channel analog data real-time acquisition system.
As shown in fig. 1, a user edits an excitation waveform and configuration parameters required by the operation of the infrared focal plane 100 at the terminal device 600 to generate a data file, and then sends the data file to the FPGA300 through a PCIE bus or a USB bus or a network cable, and the FPGA300 writes the data file into the flash memory module 500 for storage. When necessary, the FPGA300 reads the waveform data and configuration parameters from the flash memory module 500, and outputs the appropriate stimulus waveform (FSYNC/LSYNC/PCLK) to the infrared focal plane 100 according to the data.
The multi-channel analog signal output of the infrared focal plane 100 is connected to the analog input terminal of the AD conversion module 200, the FPGA300 outputs an AD acquisition clock (AD _ CLK) to the AD conversion module 200, and the AD conversion module 200 converts the analog signal CHm _ AIN into a digital signal (CHm _ D [ n:0]) and outputs the digital signal to the FPGA 300.
Under the synchronization of the AD _ CLK, the FPGA300 outputs the data Valid signal CHm _ Valid at a suitable position (the position parameter can be modified in real time by issuing a command through the terminal device 600) according to the delay parameter of each channel. As shown in the operation sequence of fig. 2, when the AD _ CLK is located at the S1, S2, S3, S4, S5, S6, S7, S8, … …, and Sn positions, the signals of the respective channels are collected, and the S1, S2, S3, S4, S5, S6, S7, S8, … …, and Sn positions are determined according to the delay parameters of the respective channels.
When the FPGA300 stores the captured valid data in the storage module 400, the FPGA300 is connected to the terminal device 600 through the PCIE bus or the USB bus or the network cable, and the terminal device 600 reads the data in the storage module 400 through the PCIE bus or the USB bus or the network cable.
The terminal device 600 displays the read data on the screen in real time in the form of an image, and analyzes the data in real time to obtain the performance parameters of the infrared focal plane 100 to be measured and the working state of the whole system.
In the embodiment of the present invention, the AD conversion module 200 converts the multiple analog signals into the multiple digital signals according to the high-frequency acquisition clock sent by the FPGA300, so that the FPGA300 determines the effective signal of each digital signal according to the phase of the acquisition clock and the respective corresponding delay parameter of the multiple analog signals, thereby implementing simultaneous acquisition of multiple analog channels in one clock cycle, avoiding the situation that an individual channel acquires invalid data, solving the problem of synchronization of the acquisition clock, and improving the signal acquisition efficiency.
The embodiment of the invention provides a multi-channel analog data real-time acquisition system, which mainly solves the following technical problems:
1. necessary excitation time sequence is provided for normal work of the infrared detector, and the waveform of the excitation time sequence can be modified in an online upgrading mode.
2. The image data output by the detector is converted from analog quantity to digital quantity so as to facilitate subsequent digital processing. The problem of acquisition clock synchronization is mainly solved, and especially, the problem that when multiple channels are acquired simultaneously, delay of each channel is different, and even the delay integrally exceeds one clock cycle is solved.
3. The acquired digital image data is cached after being preprocessed as necessary.
4. And uploading the cached image data to the terminal equipment through a PCIE bus or a USB bus or a network cable.
5. The terminal equipment displays the acquired image data in real time and displays the image quality in a visual mode.
6. The terminal equipment processes the acquired image data so as to analyze the performance parameters of the tested infrared detector and achieve the purpose of testing the infrared detector.
During data acquisition, the embodiment of the invention adopts a method of outputting the Valid data signal CHm _ Valid under the synchronization of the high-frequency acquisition clock AD _ CLK, thereby solving the problem of clock and data synchronization. Compared with the prior art, the method can support multiple channels, each channel can independently adjust the delay parameter, the delay of any length of the collected data can be realized, the delay parameter (namely the effective collection point position) can be configured through a PC, and the method is also suitable for the application condition of the asynchronous clock domain.
It should be noted that the multi-channel analog data real-time acquisition system provided by the embodiment of the invention is not only suitable for an infrared focal plane detector, but also can be applied to an ultraviolet focal plane detector, and only needs to replace the infrared focal plane with the ultraviolet focal plane.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the invention.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (8)
1. A multi-channel real-time analog data acquisition system, comprising: the device comprises an infrared focal plane, an AD conversion module, a field programmable gate array FPGA and a storage module;
the multi-channel output port of the infrared focal plane is connected with the multi-channel input port of the AD conversion module; the multi-path output port of the AD conversion module is connected with the multi-path input port of the FPGA;
the multi-channel analog signals of the infrared focal plane are input to the AD conversion module, the AD conversion module converts the multi-channel analog signals into multi-channel digital signals according to the acquisition clock sent by the FPGA, and sends the multi-channel digital signals to the FPGA; and the FPGA determines an effective signal of each digital signal according to the phase of the acquisition clock and the respective corresponding delay parameter of the multiple paths of analog signals, and stores the effective signal in the storage module.
2. The multi-channel analog data real-time acquisition system of claim 1, wherein the system further comprises a terminal device;
the terminal equipment is connected with the FPGA, reads the effective data from the storage module through the FPGA, displays the effective data in an image form, and analyzes the effective data.
3. The multi-channel real-time analog data acquisition system of claim 2 further comprising a flash memory module;
the flash memory module is connected with the FPGA, and the terminal equipment receives the working information of the infrared focal plane configured by a user; sending the working information to the FPGA; and the FPGA stores the working information in the flash memory module.
4. The multi-channel real-time analog data acquisition system as claimed in claim 3, wherein when the infrared focal plane is determined to be working, the FPGA reads the working information from the flash memory module, determines an excitation waveform according to the working information, and sends the excitation waveform to the infrared focal plane.
5. The multi-channel analog data real-time acquisition system of claim 4 wherein the operational information includes configured excitation waveforms and configuration parameters.
6. The multi-channel analog data real-time acquisition system of claim 5 wherein the configuration parameters include the delay parameters.
7. A multi-channel real-time acquisition system of analog data according to any of claims 1 to 6, wherein the acquisition clock is a high frequency acquisition clock.
8. A multi-channel real-time analog data acquisition system as claimed in any one of claims 1 to 6, wherein said terminal device is a PC.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202010000693.XA CN113064362A (en) | 2020-01-02 | 2020-01-02 | Multichannel analog data real-time acquisition system |
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| CN202010000693.XA CN113064362A (en) | 2020-01-02 | 2020-01-02 | Multichannel analog data real-time acquisition system |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103618853A (en) * | 2013-11-19 | 2014-03-05 | 中国电子科技集团公司第四十一研究所 | Programmable simulation device and method for infrared focal plane device video output signal |
| CN104950770A (en) * | 2015-06-24 | 2015-09-30 | 中国船舶重工集团公司第七二六研究所 | Controllable high-speed multi-channel signal acquisition control circuit system and control method thereof |
| US9992437B1 (en) * | 2017-02-03 | 2018-06-05 | SmartSense Technology(U.S.), Inc. | Stacked image sensor pixel cell with in-pixel vertical channel transfer transistor |
| CN110321316A (en) * | 2019-06-19 | 2019-10-11 | 西安思丹德信息技术有限公司 | A kind of multi-channel synchronous data acquisition adaptive training control device and method |
-
2020
- 2020-01-02 CN CN202010000693.XA patent/CN113064362A/en not_active Withdrawn
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103618853A (en) * | 2013-11-19 | 2014-03-05 | 中国电子科技集团公司第四十一研究所 | Programmable simulation device and method for infrared focal plane device video output signal |
| CN104950770A (en) * | 2015-06-24 | 2015-09-30 | 中国船舶重工集团公司第七二六研究所 | Controllable high-speed multi-channel signal acquisition control circuit system and control method thereof |
| US9992437B1 (en) * | 2017-02-03 | 2018-06-05 | SmartSense Technology(U.S.), Inc. | Stacked image sensor pixel cell with in-pixel vertical channel transfer transistor |
| CN110321316A (en) * | 2019-06-19 | 2019-10-11 | 西安思丹德信息技术有限公司 | A kind of multi-channel synchronous data acquisition adaptive training control device and method |
Non-Patent Citations (1)
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| 王海英等: "基于FPGA的红外焦平面信息获取系统设计", 《光学与光电技术》 * |
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Application publication date: 20210702 |