CN103617800A - Portable multi-channel voice data collector based on ARM and FPGA - Google Patents

Abstract

The invention discloses a portable multi-channel voice data collector based on an ARM and an FPGA. The collector comprises a signal conditioning module, an ADC converting module, an FPGA collecting processing module, an SDRAM data buffering module, an ARM control processing module and an SD card interface module. The input end of the signal conditioning module is connected with a voice input device. The output end of the signal conditioning module is connected with the input end of the ADC converting module. The output end of the ADC converting module is connected with the input end of the FPGA collecting processing module which is connected with the SDRAM data buffering module and the ARM control processing module. The ARM control processing module is connected with the SD card interface module. The purpose of low power loss and convenient carrying is achieved.

Description

Portable multi-channel audio data collecting device based on ARM and FPGA

Technical field

The present invention relates to field of audio processing, particularly, relate to a kind of portable multi-channel audio data collecting device based on ARM and FPGA.

Background technology

At present, the fast development of signal processing technology, the communication technology and multimedia technology all has benefited from the widespread use of DSP technology.Wherein digital audio processing system requirement of real-time is very high, need to make reaction extremely fast to the sound signal of input, system works is under real-time mode, and this hardware performance that system is adopted has proposed very high requirement, comprises processing speed and memory capacity etc.The task that audio collection has been processed is day by day complicated, the requirement of processing is improved constantly, audio frequency Processing Algorithm also becomes increasingly complex, it can require audio frequency process main device with and accessory is processed within a few tens of milliseconds or shorter time, the voice data of storage magnanimity.Need audio process arithmetic speed up to 10-20MIPS, according to the requirement of different task, some processing speeds even reach 50MIPS.

Real-time Audio Collection disposal system realizes conventionally in two ways:

The first is as main frame by single computer, coordinate one or some digital signal panels to form whole system, the latter consists of the conversion chip of general or special purpose digital signal processing chip and corresponding storage chip, interface chip and sound signal.This system reliability under outdoor playback environ-ment is not high, and mutual connection easily goes wrong, and computer run is unstable in addition, extremely easily crashes.

The second by DSP and other companion chip form one can off-line working system.But for portable audio disposal system, the design proposal based on common dsp chip is not very good.First the chip cost taken by themselves of DSP and cost of development present stage remain higher, especially chip cost taken by themselves.Secondly portable set is very harsh to volume and power consumption requirement, has limited the use of dsp chip.The power consumption of DSP own is relatively large, and powered battery, by being difficult to meet the requirement in certain cruising time of equipment, is unfavorable for going out to carry.The system that DSP forms is in addition unfavorable for the expansion of later stage system, such as extended audio acquisition channel quantity, and adds some audio frequency Processing Algorithm etc.

Summary of the invention

The object of the invention is to, for the problems referred to above, propose a kind of portable multi-channel audio data collecting device based on ARM and FPGA, to realize the little and portable advantage of power consumption.

For achieving the above object, the technical solution used in the present invention is:

A kind of portable multi-channel audio data collecting device based on ARM and FPGA, comprise signal condition module, ADC modular converter, FPGA acquisition processing module, SDRAM data buffering module, ARM controls processing module and SD card interface module, the input end of described signal condition module connects voice input device, the output terminal of described signal condition module connects the input end of ADC modular converter, the output terminal of described ADC modular converter connects the input end of FPGA acquisition processing module, described FPGA acquisition processing module is connected with SDRAM data buffering module, and this FPGA acquisition processing module is controlled processing module with ARM and is connected, described ARM controls in processing module and connects SD card interface module.

Further, described ADC modular converter adopts CS5341 chip, and described FPGA acquisition processing module adopts EP4CE22 chip, and described ARM controls processing module and adopts STM32F103 chip.

Further, resistance in series R16, resistance R 18 and resistance R 19 respectively between three clock signal pin mclk, sclk of described EP4CE22 chip and CS5341 chip and lrclk, shunt capacitance C14 and capacitor C 15 between the FLLT+ pin of CS5341 chip and REF_GND pin.

Further, described capacitor C 15 sizes are 0.01 μ F.

Further, described signal condition module is carried out amplitude adjustment, impedance transformation and direct current biasing setting to the sound signal of input, makes sound signal meet the data acquisition request of ADC modular converter;

Described FPGA acquisition processing module is controlled ADC modular converter and is carried out audio collection, and by the data buffer storage collecting in SDRAM data buffering module, the internal logic circuit of FPGA acquisition processing module produces and writes and read address;

When the voice data in SDRAM data buffering module stores the Frame length of setting into, by FPGA acquisition processing module counting, produce a look-at-me, trigger ARM control processing module and read voice data.

Technical scheme of the present invention has following beneficial effect:

Each technical scheme of the present invention, has been used arm processor and the fpga chip of high integration, and the area of circuit board reduces greatly, thereby whole system is placed in a less cabinet, is beneficial to the portability of system.And arm processor and fpga chip have reduced power consumption simultaneously.Thereby reach the little and portable object of power consumption.

Accompanying drawing explanation

Fig. 1 and Fig. 2 are the theory diagram of the portable multi-channel audio data collecting device based on ARM and FPGA described in the embodiment of the present invention;

Fig. 3 and Fig. 7 are the FPGA of portable multi-channel audio data collecting device based on ARM and FPGA and the electrical connection schematic diagram of CS5341 described in the embodiment of the present invention;

Fig. 4 is the FPGA of portable multi-channel audio data collecting device based on ARM and FPGA and the electrical connection schematic diagram of ARM described in the embodiment of the present invention;

Fig. 5 is the ARM of portable multi-channel audio data collecting device based on ARM and FPGA and the electrical connection schematic diagram of SD card described in the embodiment of the present invention;

Fig. 6 is the workflow diagram of the portable multi-channel audio data collecting device based on ARM and FPGA described in the embodiment of the present invention.

Embodiment

Below in conjunction with accompanying drawing, the preferred embodiments of the present invention are described, should be appreciated that preferred embodiment described herein, only for description and interpretation the present invention, is not intended to limit the present invention.

As shown in Figure 1, a kind of portable multi-channel audio data collecting device based on ARM and FPGA, comprise signal condition module, ADC modular converter, FPGA acquisition processing module, SDRAM data buffering module, ARM controls processing module and SD card interface module, the input end of signal condition module connects voice input device, the output terminal of signal condition module connects the input end of ADC modular converter, the output terminal of ADC modular converter connects the input end of FPGA acquisition processing module, FPGA acquisition processing module is connected with SDRAM data buffering module, and this FPGA acquisition processing module is controlled processing module with ARM and is connected, ARM controls in processing module and connects SD card interface module.

Wherein, as shown in Figure 2, ADC modular converter adopts CS5341 chip, and FPGA acquisition processing module adopts EP4CE22 chip, and ARM controls processing module and adopts STM32F103 chip.As shown in Figure 7, resistance in series R16, resistance R 18 and resistance R 19 respectively between three clock signal pin mclk, sclk of EP4CE22 chip and CS5341 chip and lrclk, shunt capacitance C14 and capacitor C 15 between the FLLT+ pin of CS5341 chip and REF_GND pin.Capacitor C 15 sizes are 0.01 μ F.

Signal condition module is carried out amplitude adjustment, impedance transformation and direct current biasing setting to the sound signal of input, makes sound signal meet the simulating signal incoming level standard of ADC modular converter;

FPGA acquisition processing module is controlled ADC modular converter and is carried out audio collection, and by the data buffer storage collecting in SDRAM data buffering module, the internal logic circuit of FPGA acquisition processing module produces and writes and read address; And the interface sequence standard in strict accordance with SDRAM generates its control signal.

When the voice data in SDRAM data buffering module stores the Frame length of setting into, by FPGA acquisition processing module counting, produce a look-at-me, trigger ARM control processing module and read voice data.

ARM controls processing module and adopts the mode of DMA to send data read request to FPGA acquisition processing module, once reads the Frame of certain length, and it is write in SDRAM data buffering module.Audio file is stored and is adopted FAT file system in SDRAM data buffering module, and the voice data of each passage leaves in wherein with wav file form, and data layout is 16Bit, and sampling rate is 48KHz.

Signal condition module is responsible for front end voice input device to be amplified to certain amplitude range as the faint simulating signal of the generations such as microphone, and the DC level that superposes, to adapt to ADC modular converter analog input level standard.FPGA acquisition processing module is mainly responsible for and being connected of ADC modular converter and SDRAM data buffering module, and is used as the function of system sequence control and data-switching and route.When voice data is cached to certain length, produces interrupt notification ARM and control processing module extraction data.ARM controls processing module and plays the control action to whole system, responsible official's machine interactive interface and be the inner functions such as WAV audio file read-write control that realize based on FAT file system of SD card in SDRAM data buffering module.

ADC modular converter is selected the CS5341 of Cirrus Logic company, is the audio ADC of a two-channel 2-4 4Bit precision, and the maximum picking rate of every passage is 192KHz, can realize higher sampling precision and speed.

Fpga chip in FPGA acquisition processing module has by the connected signal wire of CS5341: mclk, sclk, lrclk, rst_o.Wherein FPGA provides sampling synchronization clock signal by mclk, sclk and these three signal wires of lrclk for CS5341.ADC control module in FPGA is drawn high RST_n pin pin level by rst_o signal wire, and indication starts the collection of respective channel; CS5341 by the resulting voice data of Collect conversion by the FPGA that outputs to of sdout_1 serial.FPGA reads and data is converted in the FIFO that parallel form is saved in FPGA inside.

Because amount of audio data is large, requirement of real-time is higher, needs high-capacity and high-speed storer to make voice data buffering.SDRAM in SDRAM data buffering module compares the memory devices such as SRAM and has the advantages such as speed is fast, capacity is large, therefore becomes first-selected data-carrier store in audio frequency processing.

SDRAM adopts HY57V641620HG chip, adopts 3.3V power supply, and input and output pin and LVTTL are compatible.Memory capacity is 64Mbit, and inside is divided into the page of 4 8M, and each page is divided into 4096 row, and every row 256 row, often show 16 bit data.Address wire A11-A0 sends into row address under RAS is synchronous, and address wire A7-A0 sends into column address under CAS is synchronous, by BA0 and BA1, selects paging.

When concrete operations SDRAM, first need to carry out its initial configuration, i.e. configuration mode register, to determine the mode of operations such as delay street umber of beats, outburst type and burst-length of the CAS of SDRAM; Secondly by activation manipulation, activate its corresponding group of addresses, simultaneously line of input read/write address; Then by reading or writing order Input Address, by the data reading in appropriate address or write; Finally need to stop read or write order.When SDRAM does not operate, need it to storage unit, automatically to refresh, prevent loss of data.

ARM chip in ARM control processing module is selected the STM32F103 chip of ST Microelectronics, and frequency of operation reaches 80Mhz, can guarantee real time high-speed and control FPGA subsystem and and SD card storage data.

ARM is connected as shown in Figure 4 with FPGA's, with in the communicating by letter of ARM, be that cross clock domain is communicated by letter, for fear of metastable state, propagate, sample and lose and the potential fortuitous event generations such as logic error, adopt porch detection method, the signal that ARM biography is come first carries out internal clocking territory and synchronously does post-processed again.

FPGA receives after the RST order of ARM, controls ADC chip and samples, and after BUSY pin to be detected be low, FPGA reading out data is also cached in FIFO, then changes the level of INT pin, to ARM, produces once and interrupts; ARM judges interruption, by CLRINT, is given with FPGA and is fed back, and FPGA will no longer produce new interruption in the CLRINT term of validity; ARM enables NCS and NRD signal, and by data line D[15:0] data are taken away after, remove CLRINT signal, so that FPGA can continue to produce new interruption to ARM.

The storage of the technical program voice data adopts large capacity SD card, and the SD card controller on ARM sends order and data according to the command format of SD card to it.

The technical program adopts SDIO data communication mode, and SD card is articulated in the SDIO bus of STM32.Fig. 5 is the interface circuit figure of SD card.

The workflow of audio data collecting device as shown in Figure 6.After system powers on, ARM and FPGA first carry out initialization.When user sends, start after acquisition, ARM notice FPGA starts sampling process, then by FPGA, controls sampling buffered data.When buffer zone collects after the data of length of a frame, to ARM, send look-at-me.ARM receives after look-at-me, starts reading out data program, and data are write in SD card with wav file form.

Wherein three of CS5341 chip clock signal pin mclk are that Master Clock major clock, sclk are that Serial Clock serial clock and lrclk are Left Right Clock left and right channel clock, the FLLT+ of CS5341 chip be Positive Voltage Reference reference voltage pin and REF_GND be Ground reference with reference to pin.

Finally it should be noted that: the foregoing is only the preferred embodiments of the present invention, be not limited to the present invention, although the present invention is had been described in detail with reference to previous embodiment, for a person skilled in the art, its technical scheme that still can record aforementioned each embodiment is modified, or part technical characterictic is wherein equal to replacement.Within the spirit and principles in the present invention all, any modification of doing, be equal to replacement, improvement etc., within all should being included in protection scope of the present invention.

Claims (5)

1. the portable multi-channel audio data collecting device based on ARM and FPGA, it is characterized in that, comprise signal condition module, ADC modular converter, FPGA acquisition processing module, SDRAM data buffering module, ARM controls processing module and SD card interface module, the input end of described signal condition module connects voice input device, the output terminal of described signal condition module connects the input end of ADC modular converter, the output terminal of described ADC modular converter connects the input end of FPGA acquisition processing module, described FPGA acquisition processing module is connected with SDRAM data buffering module, and this FPGA acquisition processing module is controlled processing module with ARM and is connected, described ARM controls in processing module and connects SD card interface module.

2. the portable multi-channel audio data collecting device based on ARM and FPGA according to claim 1, it is characterized in that, described ADC modular converter adopts CS5341 chip, and described FPGA acquisition processing module adopts EP4CE22 chip, and described ARM controls processing module and adopts STM32F103 chip.

3. the portable multi-channel audio data collecting device based on ARM and FPGA according to claim 2, it is characterized in that, resistance in series R16, resistance R 18 and resistance R 19 respectively between three clock signal pin mclk, sclk of described EP4CE22 chip and CS5341 chip and lrclk, shunt capacitance C14 and capacitor C 15 between the FLLT+ pin of CS5341 chip and REF_GND pin.

4. the portable multi-channel audio data collecting device based on ARM and FPGA according to claim 3, is characterized in that, described capacitor C 15 sizes are 0.01 μ F.

5. the portable multi-channel audio data collecting device based on ARM and FPGA according to claim 1 and 2, is characterized in that,

Described signal condition module is carried out amplitude adjustment, impedance transformation and direct current biasing setting to the sound signal of input, makes sound signal meet the simulating signal incoming level standard of ADC modular converter;

Described FPGA acquisition processing module is controlled ADC modular converter and is carried out audio collection, and by the data buffer storage collecting in SDRAM data buffering module, the internal logic circuit of FPGA acquisition processing module produces and writes and read address;

When the voice data in SDRAM data buffering module stores the Frame length of setting into, by FPGA acquisition processing module counting, produce a look-at-me, trigger ARM control processing module and read voice data.

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