CN103606897B - Uninterruptible power supply over-current protection circuit - Google Patents
Uninterruptible power supply over-current protection circuit Download PDFInfo
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Abstract
The invention provides an uninterruptible power supply over-current protection circuit which is strong in protection function and more reliable in performance. The uninterruptible power supply over-current protection circuit comprises a main circuit, a control circuit and a drive circuit, wherein the main circuit comprises IGBT tubes V1-V4, a diode V5, a diode V6, a current transformer T1, a current transformer T2, resistors R1-R10, capacitors C1-C5, an inductor L1 and an inductor L2, the control circuit comprises a CPLD chip N3, a chip N1, a chip N2, a chip N4, a chip N5, a chip N7, a chip N8, resistors R11-R27, resistors R44-R47, capacitors C6-C14, a crystal oscillator H1 and a peripheral device, and the drive circuit comprises an IGBT drive chip N6, a peripheral circuit device, an IGBT drive chip 1N6 and a peripheral circuit device. The uninterruptible power supply over-current protection circuit is high in circuit collection protection function, high in peak current bearing capacity and high in efficiency, a power supply can uninterruptedly work in an environment with multiple rectification capacitive loads, data are prevented from being lost, and maintenance cost is reduced.
Description
Technical field
The present invention relates to a kind of power technique fields, particularly relate to the current foldback circuit of a kind of uninterrupted power source.
Background technology
The load of uninterrupted power source (abbreviation power supply) is generally computer load (being called for short load), after power supply start, plug load, if the electric capacity of load is bigger, the immediate current started is the biggest, particularly often there is the power-off restarting phenomenon of power supply when the moment connecting load is exactly the peak value of electric power output voltage, even there will be the damage of power supply.Therefore, power supply producer selects the major loop switching device of big electric current, makes power supply bear big peak current as far as possible, but has the phenomenon of power cut-off.
The overcurrent protection of power supply is mainly the protection of major loop switching device.When major loop switching device IGBT pipe (insulated gate bipolar transistor) runs into short circuit and crosses stream, if being not added with protection or protecting improper, will lose efficacy, its main cause has: super overheating limit, latching effect occurs and exceedes pressure three kinds of device.The generation lost efficacy in order to avoid these three, it is necessary to drive circuit is taked adequate measures.The measure that conventional power source uses is off IGBT pipe driving voltage, it is simply that when referring to stream and short circuit, turns off IGBT by the Enable Pin turning off driving chip and manages.This protective measure poor anti jamming capability, once detect that fault just turns off device, it is easy to misoperation, thus for increasing the capacity of resisting disturbance of protection circuit, often add a constant time lag between fault-signal and starting protection circuit obtaining, but fault current can steeply rise in constant time lag, thus the power attenuation of device when considerably increasing fault, the increase of simultaneous faults electric current, di/dt(current changing rate when device fault also can be made to turn off) increase, parameter designing between them is difficult to compromise, the most traditional protection circuit, when fault occurs, protection circuit starts often, but device still may damage.
Summary of the invention
The present invention is directed to problem above, it is provided that the uninterrupted power source current foldback circuit that a kind of defencive function is strong, performance is relatively reliable.
Technical scheme: include major loop, control circuit and drive circuit；
Described major loop includes IGBT pipe V1 ~ 4, diode V5, V6, current transformer T1, T2, resistance R1 ~ 10, electric capacity C1 ~ 5, inductance L1, L2；
Described control circuit includes CPLD chip N3, chip N1, N2, N4, N5, N7, N8, resistance R11 ~ 27, R44 ~ 47, electric capacity C6 ~ 14, crystal oscillator H1 and peripheral components；
Described drive circuit includes IGBT driving chip N6, peripheral circuit device, IGBT driving chip 1N6, peripheral circuit device；
Parallel IGBT pipe V1 ~ 4 correspondingly, resistance R1 ~ 4, IGBT pipe V1, V3, IGBT pipe V2, V4 form two brachium pontis, constituting full-bridge circuit, current transformer T1, T2 are connected on two brachium pontis respectively, and inductance L1, L2 are connected on outfan, resistance R1 ~ 4 are connected in parallel on the grid of IGBT pipe V1 ~ 4 respectively
Resistance R5 one end connects+15V, the other end and connects 2 feet and the diode V5 negative terminal of current transformer T1 respectively, the negativing ending grounding of diode V5,
One end of resistance R6 connects 2 feet and the negative terminal of diode V6 that+15V, the other end connect current transformer T2 respectively, the negativing ending grounding of diode V6,
Resistance R7 is connected to the two ends of current transformer T1, and resistance R8 connects the two ends of current transformer T2 respectively,
One end of electric capacity C1 and resistance R9 connects 1 foot of current transformer T1 respectively, exports current sampling signal, other end ground connection；
One end of electric capacity C2 and resistance R10 connects 1 foot of current transformer T2 respectively, exports current sampling signal, other end ground connection；
The clock signal produced by chip N4, resistance R18, crystal oscillator H1, electric capacity C6 ~ 8 is connected to 87 feet of CPLD chip N3 through resistance R17, between chip N1, N2 and N3, corresponding data terminal and data terminal, address end and address end connect, and R11 ~ 16 are the pull-up resistor of address wire；
CPLD chip N3 produces signal NY and Y, signal NY and Y at 80 and 81 feet and produces signal DNY and DY through chip N7 and peripheral components；
CPLD chip N3 produces signal 1NY and 1Y, signal 1NY and 1Y at 84 and 85 feet and produces signal 1DNY and 1DY through chip N8 and peripheral components；
Signal DNY and DY produces through IGBT driving chip N6 and peripheral circuit device and drives signal VGL0 and VGH0；
Signal 1DNY and 1DY produces through IGBT driving chip 1N6 and peripheral circuit device and drives signal VGL1 and VGH1；
Drive the grid that signal VGL0 and VGH0 connects IGBT pipe V3 and V1 respectively；
Drive the grid that signal VGL1 and VGH1 connects IGBT pipe V4 and V2 respectively；
Current sampling signal produces over-current signal via chip N5 and peripheral components and connects 79 feet of CPLD chip N3；
Peripheral circuit device includes chip diode V12 ~ 16, audion V11, resistance R28 ~ 43, electric capacity C15 ~ 21；
5 feet of IGBT driving chip N6 connect outfan over-current signal through resistance R29, audion V11, resistance R28,
5 feet of IGBT driving chip 1N6 connect outfan over-current signal through resistance R29, audion V11, resistance R28.
Described current transformer T1, T2 are for forcing restoration type current transformer.
Described CPLD chip N3 is EPM3064ATC100-10 cake core.
Described chip N1, N2 are SST39SF040-45-4I-WH cake core.
Described chip N5 is LM393 cake core.
Described IGBT driving chip N6 is IR22141 type driving chip, and described IGBT driving chip 1N6 is IR22141 type driving chip.
The present invention, relative to prior art, has following technical effect that 1), major loop is mainly made up of four IGBT pipes, current transformer, filtering and absorption circuit.All having current sample at two brachium pontis and output, the advantage of current transformer sampling is not have power attenuation, isolates with major loop, and the current signal capacity of resisting disturbance of detection is strong.(2) control loop to be made up of EPM3064ATC100-10 cake core N3, SST39SF040-45-4I-WH type FLASH chip N1 ~ 2, phase inverter, clock circuit and peripheral components and detection control circuit.Chip N1 ~ 2 have SPWM signal that two-way is reverse respectively, by CPLD chip N3, the signal reading of their data port DQ0 ~ DQ7 is produced two groups of signal Y, NY and 1Y, 1NY.Y, NY and 1Y, 1NY isolate respectively through a phase inverter, is made up of resistance, electric capacity, diode delay circuit and the shaping circuit being made up of two phase inverters produce dead band time delay and export two groups of signal DY, DNY and 1DY, 1DNY.This controls loop and is produced strong anti-interference performance by hardware circuit completely, additionally deposit two pipe synchronicitys when the reverse SPWM signal of two-way makes the most anti-phase loop works with chip N1 ~ 2 good, increasing dead band delay circuit makes two pipes of unified brachium pontis will not produce common conduct, adds the reliability of circuit.Detection control circuit by chip N5(dual comparator N5B, N5A) and peripheral components constitute；When current sampling signal (i.e. Vsen signal) exceedes reference voltage, the 7 foot output high level of N5B, the 1 foot output high level of N5A, the C foot output low level of V10, CPLD chip N3 turns off two path control signal；When current sampling signal Vsen is less than reference voltage, producing by the time delay of 100 microseconds of high step-down through the delay circuit being made up of resistance R23, diode V8 and electric capacity C10, in the 7 foot output low levels of N5B, CPLD chip N3 normally exports two path control signal.CPLD chip N3 and FLASH chip N1 ~ 2 are all high speed device, and speed is respectively 10ns and 45ns.Owing to the speed of CPLD chip N3 is fast, during Power supply belt big capacitive load, the result of outfan reaction is that output voltage has reduced some, is not result in that computer is restarted.When long-time stream excessively, current foldback circuit turns off drive circuit, and protection IGBT pipe will not damage by excess temperature.(3) drive circuit is that New IGBT drives integrated chip have overcurrent turn-off function and synchronize lock-out facility, and short-circuit protection is effective rapidly, and additionally this chip has the function preventing phase fault, and system reliability can be greatly improved.(4) driving chip play first class of protection effect prevent main switch (i.e. IGBT pipe) cross stream, excessive pressure damages; CPLD control chip plays second class protection effect and prevents that immediate current is excessive causes load power down; the effect exporting long-time overcurrent protection detected by system single-chip microcomputer is to prevent the long-time excess temperature of main switching device from playing three-level protective effect, and power supply has triple protection in terms of crossing stream.
Circuit in the present invention collects the feature that defencive function is strong, peak current ability to bear is strong and efficiency is high, enables power supply non-stop run in the environment of multiple rectification capacitive loads, prevents loss of data, reduce maintenance cost.
Accompanying drawing explanation
Fig. 1 is the theory diagram of the present invention,
Fig. 2 is the schematic diagram of major loop in the present invention,
Fig. 3 is the schematic diagram of drive circuit in the present invention,
Fig. 4 is the schematic diagram controlling loop in the present invention.
Detailed description of the invention
The present invention as Figure 1-4, including major loop, control circuit and drive circuit；
Described major loop includes IGBT pipe V1 ~ 4, diode V5, V6, current transformer T1, T2, resistance R1 ~ 10, electric capacity C1 ~ 5, inductance L1, L2；
Described control circuit includes CPLD chip N3, chip N1, N2, N4, N5, N7, N8, resistance R11 ~ 27, R44 ~ 47, electric capacity C6 ~ 14, crystal oscillator H1 and peripheral components；
Described drive circuit includes IGBT driving chip N6, peripheral circuit device, IGBT driving chip 1N6, peripheral circuit device；Described drive circuit includes that drive circuit one and drive circuit two, described drive circuit one include that IGBT driving chip N6, peripheral circuit device, described drive circuit two include IGBT driving chip 1N6, peripheral circuit device；
Parallel IGBT pipe V1 ~ 4 correspondingly, resistance R1 ~ 4, IGBT pipe V1, V3, IGBT pipe V2, V4 form two brachium pontis, constituting full-bridge circuit, current transformer T1, T2 are connected on two brachium pontis respectively, and inductance L1, L2 are connected on outfan, resistance R1 ~ 4 are connected in parallel on the grid of IGBT pipe V1 ~ 4 respectively
Resistance R5 one end connects+15V, the other end and connects 2 feet and the diode V5 negative terminal of current transformer T1 respectively, the negativing ending grounding of diode V5,
One end of resistance R6 connects 2 feet and the negative terminal of diode V6 that+15V, the other end connect current transformer T2 respectively, the negativing ending grounding of diode V6,
Resistance R7 is connected to the two ends of current transformer T1, and resistance R8 connects the two ends of current transformer T2 respectively,
One end of electric capacity C1 and resistance R9 connects 1 foot of current transformer T1, output current sampling signal (Vsen signal), other end ground connection respectively；
One end of electric capacity C2 and resistance R10 connects 1 foot of current transformer T2, output current sampling signal (Vsen signal), other end ground connection respectively；
By chip N4, resistance R18, crystal oscillator H1(6.5536MHz), the clock signal that produces of electric capacity C6 ~ 8 be connected to 87 feet of CPLD chip N3 through resistance R17, between chip N1, N2 and N3, corresponding data terminal and data terminal, address end and address end connect, and R11 ~ 16 are the pull-up resistor of address wire；
CPLD chip N3 produces signal NY and Y, signal NY and Y at 80 and 81 feet and produces signal DNY and DY through chip N7 and peripheral components；
CPLD chip N3 produces signal 1NY and 1Y, signal 1NY and 1Y at 84 and 85 feet and produces signal 1DNY and 1DY through chip N8 and peripheral components；
Signal DNY and DY produces through IGBT driving chip N6 and peripheral circuit device and drives signal VGL0 and VGH0；
Signal 1DNY and 1DY produces through IGBT driving chip 1N6 and peripheral circuit device and drives signal VGL1 and VGH1；
Drive the grid that signal VGL0 and VGH0 connects IGBT pipe V3 and V1 respectively；
Drive the grid that signal VGL1 and VGH1 connects IGBT pipe V4 and V2 respectively；
Current sampling signal (Vsen signal) produces over-current signal via chip N5 and peripheral components (including audion V10) and connects 79 feet of CPLD chip N3；
Peripheral circuit device includes chip diode V12 ~ 16, audion V11, resistance R28 ~ 43, electric capacity C15 ~ 21；
Over-current signal (i.e. the overcurrent turn-off function signal that GL signal is produced by system single-chip microcomputer) is connected to 5 feet of IGBT driving chip N6 through resistance R29, audion V11, resistance R28,
Over-current signal is connected to 5 feet of IGBT driving chip 1N6 through resistance R29, audion V11, resistance R28.
Described current transformer T1, T2 are for forcing restoration type current transformer.
Described CPLD chip N3 is EPM3064ATC100-10 cake core.
Described chip N1, N2 are SST39SF040-45-4I-WH cake core.
Described chip N5 is LM393 cake core.
Described IGBT driving chip N6 is IR22141 type driving chip, and described IGBT driving chip 1N6 is IR22141 type driving chip.
The present invention all has current sample to two brachium pontis and output.Two brachium pontis use the current sampling circuit forcing restoration type current transformer; the thresholding arranged is high; sample rate is fast; when the big current overload of load transients; protection circuit can turn off input signal DNY of driving chip N6 and 1N6, DY and 1DNY, 1DY; when load transients electric current falls after rise, the input signal of driving chip N6 and 1N6 can be recovered；
The thresholding that output end current sampling is arranged is low, and sample rate is slow, and when loading long term overloading, the sampling control circuit of outfan can turn off the Enable Pin of driving chip, and protection IGBT pipe will not damage by excess temperature；Drive circuit is made up of driving chip N6 and peripheral circuit, driving chip 1N6 and peripheral circuit thereof, driving chip N6 and 1N6 has power IGBT and crosses stream soft turn-off function, by Vce saturation voltage drop testing circuit, use two-step method soft switching technology, effectively suppression dv/dt(voltage change ratio), reduce EMI(electromagnetic interference), connect composition " LAN " by SY-FLT and FAULT/SD pin between IR22141 type driving chip N6 and IR22141 type driving chip 1N6 two-way.This pin has input/output function；Once having a certain road to break down, the Fault Management System of IR22141 type driving chip synchronizes block immediately, sends alarm signal to controller simultaneously；Protection the most effectively, can be greatly improved the reliability of power supply.
The operation principle of the present invention is: have the SPWM signal that two-way is reverse in chip N1 ~ 2 respectively, by CPLD chip N3, the signal reading of their data port DQ0 ~ DQ7 is produced two groups of signal NY, Y and 1NY, 1Y, two are produced respectively to having signal DNY, DY and the 1DNY in dead band, 1DY through N7, N8 and peripheral components, again through driving chip N6 and peripheral components, driving chip 1N6 and peripheral components, produce two groups of grids driving signal VGL0, VGH0 and VGL1, VGH1 to deliver to V1 ~ 4.Force restoration type current transformer T1, T2 when big temporary over-current signal Vsen being detected, 1 foot at chip N5 produces a high level, the C foot output low level of audion V10 is to 79 feet of CPLD chip N3, turn off SPWM pulse signal, once there is no over-current signal, by making 1 foot of chip N5 produce a low level after R23, C10 time delay, the C foot output high level of audion V10, to 79 feet of CPLD chip N3, exports SPWM pulse signal.
When outfan load long term overloading; over-current signal (GL signal) can become high level; the C foot output low level of audion V11 is to 5 feet of driving chip N6; the C foot output low level of audion V11 is to 5 feet of driving chip 1N6; driving chip N6 and 1N6 forbids enabling; turning off the grid voltage of V1 ~ 4, protection IGBT pipe will not damage by excess temperature；Major loop has two brachium pontis V1, V3 and V2, V4, a driving chip is had at each brachium pontis, assume when certain brachium pontis down tube occurred stream, the i.e. Vce sensing point voltage of down tube exceedes its 7 V threshold value, SY-FLT is driven output by high step-down, system lock, starts soft switching process, through measuring time about 9.6 microsecond, send power model short trouble to control circuit simultaneously and report to the police.After soft switching terminates, SY-FLT recovers high level, is blocked output at this road SY-FLT by the trailing edge of high step-down, another road IR22141 being connected with this, it is possible to effectively prevent phase fault simultaneously simultaneously.Additionally IR22141 has a fault clearance signal FLT-CLR, when without over-current signal, and can be by applying a pulse signal fast quick-recovery output voltage on FLT-CLR port so that computer will not be restarted.
In the present invention, the performance parameter of uninterrupted power source current foldback circuit is:
Output voltage: AC220 ± 5%(can according to user need design)；
Output: 2KW；
Output spike current carrying capability: can bear > the 4500 rectification capacitive loads of μ F, output is uninterrupted.
Claims (5)
1. a uninterrupted power source current foldback circuit, it is characterised in that include major loop, control circuit and drive circuit；
Described major loop includes four IGBT pipe V1 ~ V4, diode V5, V6, current transformer T1, T2, ten resistance R1 ~ R10, five electric capacity C1 ~ C5, inductance L1, L2；
Described control circuit includes chip N1, N2, N3, N4, N5, N7, N8, its chips N3 be model be the CPLD chip of EPM3064ATC100-10,17 resistance R11 ~ R27, four resistance R44 ~ R47, nine electric capacity C6 ~ C14, crystal oscillator H1 and peripheral components；
Described drive circuit includes the peripheral circuit device of IGBT driving chip N6, IGBT driving chip N6, the peripheral circuit device of IGBT driving chip 1N6, IGBT driving chip 1N6；
Four resistance R1 ~ R4 connect grid and the emitter stage of four IGBT pipe V1 ~ V4, IGBT pipe V1, V3 correspondingly, and IGBT pipe V2, V4 form two brachium pontis, constitute full-bridge circuit, current transformer T1, T2 are connected on two brachium pontis respectively, and inductance L1, L2 are connected on outfan
Resistance R5 one end connects+15V, the other end and connects 2 feet and the diode V5 negative terminal of current transformer T1 respectively, the positive ending grounding of diode V5,
One end of resistance R6 connects 2 feet and the negative terminal of diode V6 that+15V, the other end connect current transformer T2 respectively, the positive ending grounding of diode V6,
Resistance R7 is connected to the two ends of current transformer T1, and resistance R8 connects the two ends of current transformer T2 respectively,
One end of electric capacity C1 and resistance R9 connects 1 foot of current transformer T1 respectively, exports current sampling signal, other end ground connection；
One end of electric capacity C2 and resistance R10 connects 1 foot of current transformer T2 respectively, exports current sampling signal, other end ground connection；
The clock signal produced by chip N4, resistance R18, crystal oscillator H1, three electric capacity C6 ~ C8 is connected to 87 feet of CPLD chip N3 through resistance R17, between chip N1, N2 and N3, corresponding data terminal and data terminal, address end and address end connect, chip N1, N2 have SPWM signal that two-way is reverse respectively, by CPLD chip N3, the signal reading of their data port DQ0 ~ DQ7 is produced two groups of signal NY, Y and 1NY, 1Y；Six resistance R11 ~ R16 are the pull-up resistor of address wire；
CPLD chip N3 produces signal NY and Y, signal NY and Y at 80 and 81 feet and produces signal DNY and DY through the peripheral components of chip N7 and chip N7；
CPLD chip N3 produces signal 1NY and 1Y, signal 1NY and 1Y at 84 and 85 feet and produces signal 1DNY and 1DY through the peripheral components of chip N8 and chip N8；
Signal DNY and DY produces driving signal VGL0 and VGH0 through the peripheral circuit device of IGBT driving chip N6 and IGBT driving chip N6；
Signal 1DNY and 1DY produces driving signal VGL1 and VGH1 through the peripheral circuit device of IGBT driving chip 1N6 and GBT driving chip 1N6；
Drive the grid that signal VGL0 and VGH0 connects IGBT pipe V3 and V1 respectively；
Drive the grid that signal VGL1 and VGH1 connects IGBT pipe V4 and V2 respectively；
Current sampling signal produces over-current signal via the peripheral components of chip N5 and chip N5 and connects 79 feet of CPLD chip N3；
Peripheral circuit device includes five chip diode V12 ~ V16, audion V11,16 resistance R28 ~ R43, seven electric capacity C15 ~ C21；
5 feet of IGBT driving chip N6 connect outfan over-current signal through resistance R29, audion V11, resistance R28,
5 feet of IGBT driving chip 1N6 connect outfan over-current signal through resistance R29, audion V11, resistance R28.
A kind of uninterrupted power source current foldback circuit the most according to claim 1, it is characterised in that: described current transformer T1, T2 are for forcing restoration type current transformer.
A kind of uninterrupted power source current foldback circuit the most according to claim 1, it is characterised in that: described chip N1, N2 are SST39SF040-45-4I-WH cake core.
A kind of uninterrupted power source current foldback circuit the most according to claim 1, it is characterised in that: described chip N5 is LM393 cake core.
A kind of uninterrupted power source current foldback circuit the most according to claim 1, it is characterised in that: described IGBT driving chip N6 is IR22141 type driving chip, and described IGBT driving chip 1N6 is IR22141 type driving chip.
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| CN201310638218.5A CN103606897B (en) | 2013-12-02 | 2013-12-02 | Uninterruptible power supply over-current protection circuit |
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| CN201310638218.5A CN103606897B (en) | 2013-12-02 | 2013-12-02 | Uninterruptible power supply over-current protection circuit |
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| CN109548209B (en) * | 2019-01-03 | 2024-03-08 | 重庆悠悦智能科技有限公司 | Circuit special for sensing induction cooker |
| CN111313392B (en) * | 2020-03-30 | 2022-11-25 | 朗帝科技有限公司 | Automatic current-limiting protection system and method for crystal oscillator |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201393078Y (en) * | 2009-03-24 | 2010-01-27 | 深圳市捷益达电子有限公司 | Uninterrupted power supply |
| CN203589707U (en) * | 2013-12-02 | 2014-05-07 | 扬州万方电子技术有限责任公司 | Over-current protection circuit for uninterrupted power supply |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201393078Y (en) * | 2009-03-24 | 2010-01-27 | 深圳市捷益达电子有限公司 | Uninterrupted power supply |
| CN203589707U (en) * | 2013-12-02 | 2014-05-07 | 扬州万方电子技术有限责任公司 | Over-current protection circuit for uninterrupted power supply |
Non-Patent Citations (1)
| Title |
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| 不间断交流电源过流保护设计;闻海霞等;《无线互联科技》;20130831(第8期);第84页 * |
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Address after: 225006 No. 96 Anlin Road, Guangling District, Yangzhou City, Jiangsu Province Patentee after: Yangzhou Wanfang Technology Co.,Ltd. Address before: 225006 No. 96 Anlin Road, Guangling District, Yangzhou City, Jiangsu Province Patentee before: YANGZHOU WANFANG ELECTRONIC TECHNOLOGY LLC |