CN103596353B - Line construction and preparation method thereof - Google Patents
Line construction and preparation method thereof Download PDFInfo
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- CN103596353B CN103596353B CN201210295065.4A CN201210295065A CN103596353B CN 103596353 B CN103596353 B CN 103596353B CN 201210295065 A CN201210295065 A CN 201210295065A CN 103596353 B CN103596353 B CN 103596353B
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Abstract
Open a kind of line construction of the present invention and preparation method thereof, this line construction includes an internal layer circuit layer, one first dielectric layer, one first conductive material layer, one second conductive layer, one second dielectric layer, one second conductive material layer and one the 3rd conductive layer.First dielectric layer covers one first conductive layer of internal layer circuit layer and has a first surface and multiple first line groove.First conductive material layer is configured in first line groove.Second conductive layer is configured on first surface and includes a signal line and at least two reference line.Second dielectric layer covers first surface and the second conductive layer and has a second surface and multiple second circuit groove.The width of each first line groove and the width of each second circuit groove are less than the live width of each reference line.Second conductive material layer is configured in the second circuit groove.3rd conductive layer is configured on second surface.
Description
Technical field
The present invention relates to a kind of line construction and preparation method thereof, and particularly relate to one there is electromagnetic screen
Line construction covering effect and preparation method thereof.
Background technology
Along with the progress of printed circuit board (PCB) (Printed circuit board, PCB) manufacturing technology, printed circuit board (PCB)
The size of itself is more and more less.Due to the many requirements in design, not only it is arranged on printed circuit board (PCB)
Circuit unit quantity to get more and more, and the signaling rate between each circuit unit also will be increasingly
Hurry up.But, in limited board area, large number of circuit unit is connected up (layout)
If, the spacing between signal line certainly will need to reduce, and causes these signal lines mutually to occur
Cross-talk (cross talk), and then affect transmission quality.If the spacing of these signal lines is increased
Greatly, reality can carry out the region of circuit layout and then can reduce accordingly.
Furthermore, when electronic product curtage with high frequency or converts at a high speed, electromagnetism noise produced by it
Transmit easily by space radiation or conducting path, and cause the signal of adjacent signal circuit to transmit by shadow
Ring, now need additionally to increase element or protection to protect signal line to avoid extraneous electromagnetic wave action
The transmission integrity of signal own.But, although all there are element or protection in the both sides up and down of signal line
Avoid the diffusion of electromagnetic wave, but the left and right sides of signal line is essentially open space.Therefore,
Electromagnetic wave easily transmits from the signal of the left and right sides aggressor signal line of signal line, implies that holding wire Louis
By Electromagnetic Interference, and then affect the integrity of signal transmission.
Summary of the invention
It is an object of the invention to provide a kind of line construction, it is possible to decrease cross-talk noise (cross talk) is done
Disturb and Electromagnetic Interference (Electro-Magnetic Interference, EMI).
Still a further object of the present invention is to provide the manufacture method of a kind of line construction, in order to make above-mentioned line
Line structure.
For reaching above-mentioned purpose, the present invention proposes a kind of line construction, it include an internal layer circuit layer, one the
One dielectric layer, one first conductive material layer, one second conductive layer, one second dielectric layer, one second conduction
Material layer and one the 3rd conductive layer.Internal layer circuit layer has a upper surface and and is configured on upper surface
The first conductive layer.First dielectric layer is configured on internal layer circuit layer and covers upper surface and the first conduction
Layer.First dielectric layer has a first surface and multiple extends to the first of the first conductive layer from first surface
Circuit groove.The bearing of trend of vertical first conductive layer of bearing of trend of first line groove.First conduction
Material layer is configured in first line groove.Second conductive layer is configured on the first surface of the first dielectric layer
And include a signal line and at least two reference line.Signal line is between reference line and each other
It is not attached to.Reference line is electrically connected by the first conductive material layer and the first conductive layer, and each reference line
The live width on road is more than the width of each first line groove.Second dielectric layer be configured on the first dielectric layer and
Cover first surface and the second conductive layer.Second dielectric layer has a second surface and multiple from second surface
Extend to the second circuit groove of reference line.Vertical second conductive layer of bearing of trend of the second circuit groove
Bearing of trend, and the width of each second circuit groove is less than the live width of each reference line.Second leads
Material layer is configured in the second circuit groove.3rd conductive layer is configured at the second surface of the second dielectric layer
On.3rd conductive layer is electrically connected with reference line by the second conductive material layer, and the prolonging of the 3rd conductive layer
Stretch direction identical with the bearing of trend of the bearing of trend of the first conductive layer and the second conductive layer.
In one embodiment of this invention, above-mentioned the first conductive layer, the first conductive material layer, reference line
Road, the second conductive material layer and the 3rd conductive layer define a circular retaining wall, and circular retaining wall is around letter
Number circuit.
In one embodiment of this invention, between the 3rd above-mentioned conductive layer and the second conductive layer vertical away from
From equal to the vertical dimension between the second conductive layer and the first conductive layer and signal line and each reference
Horizontal range between circuit.
In one embodiment of this invention, the width of above-mentioned first line groove is between 5 microns to 50
The width of the second circuit groove between Wei meter and above-mentioned is between 5 microns to 50 microns.
In one embodiment of this invention, the thickness of the first above-mentioned dielectric layer is micro-between 5 microns to 60
The thickness of the second dielectric layer between meter and above-mentioned is between 5 microns to 60 microns.
In one embodiment of this invention, the material of the first above-mentioned conductive material layer and the second conductive layer
Material is identical, and the material of the second above-mentioned conductive material layer is identical with the material of the 3rd conductive layer.
The present invention proposes the manufacture method of a kind of line construction, and it comprises the following steps.Layer line in providing one
Road floor.Internal layer circuit layer has the first conductive layer that a upper surface and is configured on upper surface.Formed
One first dielectric layer is on internal layer circuit layer.First dielectric layer covers the upper surface and first of internal layer circuit layer
Conductive layer and there is a first surface.First dielectric layer is carried out a first time laser ablation step, with shape
Multiple first surface from the first dielectric layer is become to extend to the first line groove of the first conductive layer.First Line
The bearing of trend of vertical first conductive layer of bearing of trend of road groove.Fill one first conductive material layer in
In one circuit groove, wherein the first conductive material layer fills up first line groove.Form one second conductive layer
On the first surface of the first dielectric layer.Second conductive layer includes a signal line and at least two reference lines
Road.Signal line and is not attached between reference line each other.Reference line passes through the first conductive material
Layer electrically connects with the first conductive layer, and the live width of each reference line is more than the width of each first line groove
Degree.Form one second dielectric layer on the first dielectric layer.Second dielectric layer covers the first of the first dielectric layer
Surface and the second conductive layer and there is a second surface.Second dielectric layer is carried out a second time laser ablation
Step, extends to the second circuit ditch of reference line forming multiple second surface from the second dielectric layer
Groove.The bearing of trend of vertical second conductive layer of bearing of trend of the second circuit groove, and each second circuit
The width of groove is less than the live width of each reference line.Fill one second conductive material layer in the second circuit ditch
In groove, wherein the second conductive material layer fills up the second circuit groove.Form one the 3rd conductive layer to be situated between in second
On the second surface of electric layer.3rd conductive layer is electrically connected with reference line by the second conductive material layer.The
The bearing of trend of three conductive layers and the bearing of trend phase of the bearing of trend of the first conductive layer and the second conductive layer
With.
In one embodiment of this invention, above-mentioned the first conductive layer, the first conductive material layer, reference line
Road, the second conductive material layer and the 3rd conductive layer define a circular retaining wall, and circular retaining wall is around letter
Number circuit.
In one embodiment of this invention, between the 3rd above-mentioned conductive layer and the second conductive layer vertical away from
From equal to the vertical dimension between the second conductive layer and the first conductive layer and signal line and each reference
Horizontal range between circuit.
In one embodiment of this invention, the step of above-mentioned formation the second conductive layer, including: fill the
When one conductive material layer is in first line groove, the first conductive material layer further extends to the first dielectric layer
On first surface and cover first surface；And first be pointed on the first surface of the first dielectric layer lead
A part for material layer carries out a subtractive process program, to form the second conductive layer.
In one embodiment of this invention, the step of above-mentioned formation the 3rd conductive layer, including: fill the
When two conductive material layers are in the second circuit groove, the second conductive material layer further extends to the second dielectric layer
On second surface and cover second surface；And second be pointed on the second surface of the second dielectric layer lead
A part for material layer carries out a subtractive process program, to form the 3rd conductive layer.
In one embodiment of this invention, the while that above-mentioned signal line and reference line being in same step
Formed.
In one embodiment of this invention, above-mentioned filling the first conductive material layer and the second conductive material layer
Method include galvanoplastic.
Based on above-mentioned, owing to the signal line of second conductive layer of the present invention is between reference line,
And the both sides up and down of this signal line are all respectively configured the 3rd conductive layer and the first conductive layer, and the first conduction
Layer, reference line and the 3rd conductive layer three are by the first conductive material layer and the second conductive material layer phase
Connect.It is to say, signal line by the first conductive layer, the first conductive material layer, reference line,
Two conductive material layers and the cincture of the 3rd conductive layer institute.Consequently, it is possible to the design of the line construction of the present invention
Signal line and other adjacent signal line crosstalk phenomenon can be avoided, can effectively reduce cross-talk noise
Outside interference and promotion signal transmission quality, it is possible to stop the interference to signal line of the external electromagnetic wave, i.e.
Can effectively reduce Electromagnetic Interference.
For the features described above of the present invention and advantage can be become apparent, special embodiment below, and coordinate
Appended accompanying drawing is described in detail below.
Accompanying drawing explanation
Figure 1A is the generalized section of a kind of line construction of one embodiment of the invention；
Figure 1B is the sectional perspective schematic diagram of the line construction of Figure 1A；
Fig. 2 A to Fig. 2 G is the section of the manufacture method of a kind of line construction of one embodiment of the invention
Schematic diagram；
Fig. 3 A to Fig. 3 D is the office of the manufacture method of a kind of line construction of another embodiment of the present invention
The schematic diagram of portion's step.
Main element symbol description
100a, 100b: line construction
110: internal layer circuit layer
112: upper surface
114: the first conductive layers
120: the first dielectric layers
122: first surface
124: first line groove
130a: the first conductive material layer
140a: the second conductive layer
142: signal line
144: reference line
150: the second dielectric layers
152: second surface
154: the second circuit grooves
160a: the second conductive material layer
170a: the three conductive layer
C: circular retaining wall
D1, D2: vertical dimension
D3, D4: horizontal range
W1: live width
W2, W3: width
T1, T2: thickness
Detailed description of the invention
Figure 1A is the generalized section of a kind of line construction of one embodiment of the invention.Figure 1B is figure
The sectional perspective schematic diagram of the line construction of 1A.Please also refer to Figure 1A and Figure 1B, at the present embodiment
In, line construction 100a includes internal layer circuit layer 110,1 first dielectric layer 120,1 first conduction
Material layer 130a, one second conductive layer 140a, one second dielectric layer 150,1 second conductive material layer
160a and one the 3rd conductive layer 170a.
Specifically, internal layer circuit layer 110 has a upper surface 112 and and is configured at upper surface 112
On the first conductive layer 114.First dielectric layer 120 is configured on internal layer circuit layer 110 and covers upper table
Face 112 and the first conductive layer 114.First dielectric layer 120 has a first surface 122 and multiple from
One surface 122 extends to the first line groove 124 of the first conductive layer 114.First line groove 124
The bearing of trend of bearing of trend substantial orthogonality the first conductive layer 114.First conductive material layer 130a
It is configured in first line groove 124.Second conductive layer 140a is configured at the of the first dielectric layer 120
On one surface 122 and include signal line 142 and at least two reference line 144.Signal line 142
And it is not attached to each other between reference line 144.Reference line 144 is by the first conductive material layer
130a and the first conductive layer 114 electrically connect, and live width W1 of each reference line 114 is more than each the
The width W2 of one circuit groove 124, wherein the width W2 of first line groove 124 e.g. between
Between 5 microns to 50 microns.Second dielectric layer 150 is configured on the first dielectric layer 120 and covers first
Surface 122 and the second conductive layer 140a.Second dielectric layer 150 have a second surface 152 and multiple from
Second surface 152 extends to the second circuit groove 154 of reference line 144.Second circuit groove 154
The bearing of trend of bearing of trend substantial orthogonality the second conductive layer 140a, and each second circuit groove
The width W3 of 154 is less than live width W1 of each reference line 114, wherein the second circuit groove 154
Width W3 e.g. between 5 microns to 50 microns.Second conductive material layer 160a is configured at
In second circuit groove 154.3rd conductive layer 170a is configured at the second surface of the second dielectric layer 150
On 152.3rd conductive layer 170a is electrically connected with reference line 144 by the second conductive material layer 160a,
And the 3rd conductive layer 170a bearing of trend and the bearing of trend of the first conductive layer 114 and the second conductive layer
The bearing of trend of 140a is substantially the same.
More particularly, first conductive layer the 114, second conductive layer 140a and the 3rd conduction of the present embodiment
Layer 170a is respectively a patterned conductive layer.The first line groove 124 of the first dielectric layer 120 is from
One surface 122 extends to part the first conductive layer 114, and the first conductive material layer 130a fill up this first
Circuit groove 124, and reference line 144 is by the first conductive material layer 130a and the first conductive layer 114
Electrical connection.Second circuit groove 154 of the second dielectric layer 150 extends to part from second surface 152
Two conductive layer 140a, and the second conductive material layer 160a fills up this second circuit groove 154, and the 3rd
Conductive layer 170a is electrically connected with reference line 144 by the second conductive material layer 160a.Particularly,
One conductive layer the 114, first conductive material layer 130a, reference line the 144, second conductive material layer 160a
And the 3rd conductive layer 170a define a circular retaining wall C, and circular retaining wall C is around signal line 142.
Vertical dimension D1 between 3rd conductive layer 170a and the second conductive layer 140a is equal to the second conductive layer
Vertical dimension D2 between 140a and the first conductive layer 114 and signal line 142 and each reference line
Horizontal range D3 between road 144, D4.The thickness T1 of the first dielectric layer 120 is e.g. between 5
Micron is between 60 microns, and the thickness T2 of the second dielectric layer 150 is e.g. between 5 microns to 60
Between Wei meter.
It is noted that the present embodiment do not limit the first conductive material 130a, the second conductive layer 140a,
Second conductive material 160a and the 3rd conductive layer 170a material, although the first conduction material mentioned herein
The material of bed of material 130a is substantially the same with the material of the second conductive layer 140a, and the second conductive material layer
The material of 160a is substantially the same with the material of the 3rd conductive layer 170a.But in other embodiments, the
The material of the material of one conductive material layer 130a and the second conductive layer 140a also can be different, and the second conduction
The material of material layer 160a also can be different from the material of the 3rd conductive layer 170a, and this still falls within the present invention can
The technical scheme used, the scope to be protected without departing from the present invention.
Owing to the signal line 142 of the second conductive layer 140a of the present embodiment is in reference line 144
Between, and the both sides up and down of this signal line 142 are all respectively configured the 3rd conductive layer 170a and first and lead
Electric layer 114, and the first conductive layer 114, reference line 144 and the 3rd conductive layer 170a three be to pass through
First conductive material layer 130a and the second conductive material layer 160a is connected.It is to say, signal line
142 by first conductive layer the 114, first conductive material layer 130a, reference line the 144, second conduction material
The circular retaining wall C institute cincture that bed of material 160a and the 3rd conductive layer 170a is defined.Consequently, it is possible to
The design of the line construction 100a of the present embodiment can avoid signal line 142 and other adjacent holding wires
Road crosstalk phenomenon, can effectively reduce outside cross-talk noise interference and promotion signal transmission quality, it is possible to resistance
Keep off the interference to signal line of the external electromagnetic wave, can effectively reduce Electromagnetic Interference.Additionally, due to
Vertical dimension D1 between 3rd conductive layer 170a and the second conductive layer 140a is equal to the second conductive layer
Vertical dimension D2 between 140a and the first conductive layer 114 and signal line 142 and each reference line
Horizontal range D3 between road 144, D4.In other words, circular retaining wall C and the row of signal line 142
Row mode belongs to coaxial design, implies that signal line 142 to the first conductive layer 114, reference line 144
Or the 3rd the distance of conductive layer 170a the most identical.Therefore, the line construction 100a of the present embodiment can be effective
Reduce cross-talk noise interference and Electromagnetic Interference, and there is good signal integrity.
Below only introduce the structure of the line construction 100a of the present invention, do not introduce the circuit knot of the present invention
The manufacture method of structure 100a.To this, below by with the system of open-wire line line structure 100a for two embodiments
Make method, and coordinate Fig. 2 A to Fig. 2 G and Fig. 3 A to Fig. 3 D to line construction 100a, 100b
Manufacture method is described in detail.
Fig. 2 A to Fig. 2 G is the section of the manufacture method of a kind of line construction of one embodiment of the invention
Schematic diagram.Please refer to Fig. 2 A, according to the manufacture method of the line construction 100a of the present embodiment, first,
Refer to Fig. 2 A, it is provided that an internal layer circuit layer 110, wherein internal layer circuit layer 110 has a upper surface
112 and one the first conductive layers 114 being configured on upper surface 112.Specifically, internal layer circuit layer
110 are e.g. made up of with at least one conductive layer (not illustrating) at least one insulating barrier (not illustrating),
And a first conductive layer 114 e.g. patterned conductive layer, and the first conductive layer 114 is configured at upper surface
On 112 and expose portion of upper surface 112.
Then, refer to Fig. 2 B, form one first dielectric layer 120 on internal layer circuit layer 110, its
In the first dielectric layer 120 cover the upper surface 112 of internal layer circuit layer 110 and the first conductive layer 114 and tool
There is a first surface 122.In the present embodiment, the material e.g. polyimides of the first dielectric layer 120
(polyimide, PI), ABF(Ajinomoto build-up film) or liquid crystal polymer (Liquid
Crystalline Polymer, LCP).Additionally, the thickness T1 of the first dielectric layer 120 is e.g. between 5
Micron is between 60 microns.
Then, refer again to Fig. 2 B, the first dielectric layer 120 carried out a first time laser ablation step,
The first of the first conductive layer 114 is extended to the multiple first surfaces 122 from the first dielectric layer 120 of formation
Circuit groove 124.Particularly, the bearing of trend substantial orthogonality first of first line groove 124 conducts electricity
The bearing of trend of layer 114, and the width W2 of first line groove 124 by first surface 122 towards the
One conductive layer 114 is tapered.
Then, refer to Fig. 2 C, fill one first conductive material layer 130a in first line groove 124
In, wherein the first conductive material layer 130a fills up first line groove 124.In the present embodiment, fill
First conductive material layer 130a method e.g. galvanoplastic in first line groove 124.
Then, refer to Fig. 2 D, form one second conductive layer 140a in the first of the first dielectric layer 120
On surface 122, wherein the second conductive layer 140a includes signal line 142 and at least two reference lines
Road 144, and the bearing of trend of the bearing of trend of the second conductive layer 140a and the first conductive layer 114 is identical.
Specifically, signal line 142 and is not attached between reference line 144 each other.Herein, first
The material of conductive material layer 130a substantially may be the same or different with the material of the second conductive layer 140a.Special
Not, signal line 142 concurrently forms in same step with reference line 144, and reference line 144
Electrically connected by the first conductive material layer 130a and the first conductive layer 114, and each reference line 144
Live width W1 more than the width W2 of each first line groove 124.It is preferred that first line groove
The width W2 of 124 is e.g. between 5 microns to 50 microns.
It should be noted that, a second conductive layer 140a e.g. patterned conductive layer of the present embodiment, and
Second conductive layer 140a is e.g. formed by half addition program (semi-additive process).
Owing to the first line groove 124 of the present embodiment is to be formed by laser ablation step, therefore compared to
The generation type of the second conductive layer 140a, the width W2 of the first line groove 124 of the present embodiment can
It is significantly less than live width W1 of the reference line 144 of the second conductive layer 140a.
Then, refer to Fig. 2 E, form one second dielectric layer 150 on the first dielectric layer 120, its
In the second dielectric layer 150 cover the first surface 122 and the second conductive layer 140a of the first dielectric layer 120
And there is a second surface 152.In the present embodiment, the material e.g. polyamides of the second dielectric layer 150
Imines (polyimide, PI), ABF(Ajinomoto build-up film) or liquid crystal polymer (Liquid
Crystalline Polymer, LCP).Additionally, the thickness T2 of the second dielectric layer 150 is e.g. between 5
Micron is between 60 microns.
Then, refer again to Fig. 2 E, the second dielectric layer 150 carried out a second time laser ablation step,
The second line of reference line 144 is extended to the multiple second surfaces 152 from the second dielectric layer 150 of formation
Road groove 154.Particularly, the vertical second conductive layer 140a of the bearing of trend of the second circuit groove 154
Bearing of trend, and the width W3 of each second circuit groove 154 is less than each reference line 144
Live width W1.It is preferred that the width W3 of the second circuit groove 154 is e.g. micro-between 5 microns to 50
Between meter.More particularly, the width W3 of the second circuit groove 154 is by the of the second dielectric layer 154
Two surfaces 152 are tapered towards reference line 144.
Afterwards, refer to Fig. 2 F, fill one second conductive material layer 160a in the second circuit groove 154
In, wherein the second conductive material layer 160a fills up the second circuit groove 154.In the present embodiment, fill
Second conductive material layer 160a method e.g. galvanoplastic in the second circuit groove 154.
Finally, refer to Fig. 2 G, form one the 3rd conductive layer 170a in the second of the second dielectric layer 150
On surface 152, wherein the 3rd conductive layer 170a passes through the second conductive material layer 160a and the second conductive layer
The reference line 144 of 140a electrically connects.The bearing of trend of the 3rd conductive layer 170a and the first conductive layer 114
Bearing of trend and the bearing of trend of the second conductive layer 140a be substantially the same.It should be noted that, this reality
Execute a 3rd conductive layer 170a e.g. patterned conductive layer of example, and the 3rd conductive layer 170a is e.g.
Formed by half addition program (semi-additive process).Second conductive material layer 160a's
Material substantially may be the same or different with the material of the 3rd conductive layer 170a.Particularly, the present embodiment
First conductive layer the 114, first conductive material layer 130a, reference line the 144, second conductive material layer 160a
And the 3rd conductive layer 170a define a circular retaining wall C, and circular retaining wall C is around signal line 142.
Vertical dimension D1 between 3rd conductive layer 170 and the second conductive layer 140a is equal to the second conductive layer 140a
And vertical dimension D2 between the first conductive layer 114 and signal line 142 and each reference line 144
Between horizontal range D3, D4.So far, the making of line construction 100a has been completed.
Owing to the present embodiment is to form first line groove 124 and the second line by the way of laser ablation
Road groove 154, therefore first line groove 124 and width W2, W3 phase of the second circuit groove 154
Compared with the reference line 144 of the second conductive layer 140a using semi-additive process to be formed live width W1 and
Speech, the width W2 of first line the groove 124 and width W3 of the second circuit groove 154 can be the least
Width W1 in reference line 144.Furthermore, owing to the width W1 of reference line 144 is significantly greater than
The width W2 and the width W3 of the second circuit groove 154 of first line groove 124, therefore refers to line
Road 144 is except can be considered an alignment line road, to improve the second circuit groove 154 and first line groove 124
Between Aligning degree, it is possible to as the catch point of laser ablation, to avoid damaging the first conductive material layer 130a.
Additionally, due to vertical dimension D1 between the 3rd conductive layer 170a and the second conductive layer 140a is equal to the
Vertical dimension D2 between two conductive layer 140a and the first conductive layer 114 and signal line 142 are with every
Horizontal range D3 between one reference line 144, D4.In other words, circular retaining wall C and signal line
The arrangement mode of 142 belongs to coaxial design, implies that signal line 142 to the first conductive layer 114, reference
The distance of circuit 144 or the 3rd conductive layer 170a is the most identical.Therefore, the line construction 100a of the present embodiment
Design can avoid signal line 142 and other adjacent signal line crosstalk phenomenon, can effectively drop
Outside the interference of low cross-talk noise and promotion signal transmission quality, it is possible to stop that external electromagnetic wave is to signal line
Interference, can effectively reduce Electromagnetic Interference.
Fig. 3 A to Fig. 3 D is the office of the manufacture method of a kind of line construction of another embodiment of the present invention
The schematic diagram of portion's step.The present embodiment continues to use element numbers and the partial content of previous embodiment, wherein adopts
Be denoted by the same reference numerals the identical or element of approximation, and eliminates the explanation of constructed content.
Explanation about clipped can refer to previous embodiment, and it is no longer repeated for the present embodiment.
Please refer to Fig. 3 D, the line construction 100b of the present embodiment and the line construction of previous embodiment
Difference main for 100a is to be: the first conductive material layer 130a of the line construction 100b of Fig. 3 D
Material is substantially the same with the material of the second conductive layer 140b, and the material of the second conductive material layer 160a
It is substantially the same with the material of the 3rd conductive layer 170b.
In processing technology, the line construction 100b of the present embodiment can use the line with previous embodiment
The production method that line structure 100a is roughly the same, and after the step of Fig. 2 B, i.e. form first line
After groove 124, refer to Fig. 3 A, fill the first conductive material layer 130b in first line groove 124
Time interior, the first conductive material layer 130b further extend on the first surface 122 of the first dielectric layer 120 and
Cover first surface 122.Then, refer to Fig. 3 B, be pointed to the first surface of the first dielectric layer 120
A part of the first conductive material layer 130b on 122 carries out a subtractive process program, to form the second conduction
Layer 140b.Then, then after carrying out the step of Fig. 2 E, after i.e. forming the second circuit groove 154, please
With reference to Fig. 3 C, fill the second conductive material layer 160b in the second circuit groove 154 time, the second conduction
Material layer 160b further extends on the second surface 152 of the second dielectric layer 150 and covers second surface
152.Then, refer to Fig. 3 D, be pointed to second on the second surface 152 of the second dielectric layer 150
A part of conductive material layer 160b carries out a subtractive process program, to form the 3rd conductive layer 170b.Extremely
This has completed the making of line construction 100b.
In sum, owing to the signal line of second conductive layer of the present invention is between reference line,
And the both sides up and down of this signal line are all respectively configured the 3rd conductive layer and the first conductive layer, and the first conduction
Layer, reference line and the 3rd conductive layer three are by the first conductive material layer and the second conductive material layer phase
Connect.It is to say, signal line by the first conductive layer, the first conductive material layer, reference line,
Two conductive material layers and the cincture of the 3rd conductive layer institute.Consequently, it is possible to the design of the line construction of the present invention
Signal line and other adjacent signal line crosstalk phenomenon can be avoided, can effectively reduce cross-talk noise
Outside interference and promotion signal transmission quality, it is possible to stop the interference to signal line of the external electromagnetic wave, i.e.
Can effectively reduce Electromagnetic Interference.Furthermore, owing to the present invention is to form by the way of laser ablation
One circuit groove and the second circuit groove, therefore the width of first line groove and the second circuit groove is compared
For the line of the reference line of the second conductive layer using semi-additive process to be formed, first line groove
The wide width that can be significantly less than reference line with the second circuit groove width.Additionally, due to reference line
Width be significantly greater than width and the width of the second circuit groove of first line groove, therefore refer to circuit and remove
Can be considered an alignment line road, improving the Aligning degree between the second circuit groove and first line groove,
Also can be as the catch point of laser ablation, to avoid damaging the first conductive material layer.
Although disclosing the present invention in conjunction with above example, but it being not limited to the present invention, any
Skilled person in art, without departing from the spirit and scope of the present invention, can make a little
Change and retouching, therefore protection scope of the present invention should be with being as the criterion that the claim enclosed is defined.
Claims (11)
1. a line construction, including:
Internal layer circuit layer, has upper surface and the first conductive layer being configured on this upper surface；
First dielectric layer, it is configured on this internal layer circuit layer and covers this upper surface and this first conductive layer, this first dielectric layer has first surface and multiple first line groove extending to this first conductive layer from this first surface, the bearing of trend of the bearing of trend of those first line grooves this first conductive layer vertical；
First conductive material layer, is configured in those first line grooves；
Second conductive layer, it is configured on this first surface of this first dielectric layer and includes a signal line and at least two reference line, wherein this signal line and is not attached between those reference line each other, those reference line are electrically connected with this first conductive layer by this first conductive material layer, and the live width of each this reference line is more than the width of each this first line groove；
Second dielectric layer, it is configured on this first dielectric layer and covers this first surface and this second conductive layer, this second dielectric layer has second surface and multiple the second circuit groove extending to those reference line from this second surface, the bearing of trend of the bearing of trend of those the second circuit grooves this second conductive layer vertical, and the width of each this second circuit groove is less than the live width of respectively this reference line；
Second conductive material layer, is configured in this second circuit groove；And
3rd conductive layer, it is configured on this second surface of this second dielectric layer, wherein the 3rd conductive layer is electrically connected with those reference line by this second conductive material layer, and the 3rd the bearing of trend of conductive layer identical with the bearing of trend of the bearing of trend of this first conductive layer and this second conductive layer, wherein this first conductive layer, this first conductive material layer, those reference line, this second conductive material layer and the 3rd conductive layer define a circular retaining wall, and this circular retaining wall is around this signal line.
2. line construction as claimed in claim 1, wherein the vertical dimension between the 3rd conductive layer and this second conductive layer is equal to the vertical dimension between this second conductive layer and this first conductive layer and this signal line and each horizontal range between this reference line.
3. line construction as claimed in claim 1, wherein the width of this first line groove is between 5 microns to 50 microns, and the width of this second circuit groove is between 5 microns to 50 microns.
4. line construction as claimed in claim 1, wherein the thickness of this first dielectric layer is between 5 microns to 60 microns, and the thickness of this second dielectric layer is between 5 microns to 60 microns.
5. line construction as claimed in claim 1, wherein the material of this first conductive material layer is identical with the material of this second conductive layer, and the material of this second conductive material layer is identical with the material of the 3rd conductive layer.
6. a manufacture method for line construction, including:
Thering is provided an internal layer circuit layer, this internal layer circuit layer has upper surface and the first conductive layer being configured on this upper surface；
Forming one first dielectric layer on this internal layer circuit layer, this first dielectric layer covers this upper surface of this internal layer circuit layer and this first conductive layer and has first surface；
This first dielectric layer is carried out a first time laser ablation step, the first line groove of this first conductive layer, the wherein bearing of trend of the bearing of trend of those first line grooves this first conductive layer vertical is extended to multiple these first surfaces from this first dielectric layer of formation；
Filling one first conductive material layer in those first line grooves, wherein this first conductive material layer fills up those first line grooves；
Form one second conductive layer on this first surface of this first dielectric layer, this second conductive layer includes a signal line and at least two reference line, wherein this signal line and is not attached between those reference line each other, those reference line are electrically connected with this first conductive layer by this first conductive material layer, and the live width of each this reference line is more than the width of each this first line groove；
Forming one second dielectric layer on this first dielectric layer, this second dielectric layer covers this first surface of this first dielectric layer and this second conductive layer and has second surface；
This second dielectric layer is carried out a second time laser ablation step, the second circuit groove of those reference line is extended to multiple these second surfaces from this second dielectric layer of formation, the wherein bearing of trend of the bearing of trend of those the second circuit grooves this second conductive layer vertical, and the width of each this second circuit groove is less than the live width of respectively this reference line；
Filling one second conductive material layer in those the second circuit grooves, wherein this second conductive material layer fills up those the second circuit grooves；And
Form one the 3rd conductive layer on this second surface of this second dielectric layer, 3rd conductive layer is electrically connected with those reference line by this second conductive material layer, and the 3rd the bearing of trend of conductive layer identical with the bearing of trend of the bearing of trend of this first conductive layer and this second conductive layer, wherein this first conductive layer, this first conductive material layer, those reference line, this second conductive material layer and the 3rd conductive layer define a circular retaining wall, and this circular retaining wall is around this signal line.
7. the manufacture method of line construction as claimed in claim 6, wherein the vertical dimension between the 3rd conductive layer and this second conductive layer is equal to the vertical dimension between this second conductive layer and this first conductive layer and this signal line and each horizontal range between this reference line.
8. the manufacture method of line construction as claimed in claim 6, wherein forms the step of this second conductive layer, including:
Fill this first conductive material layer in those first line grooves time, this first conductive material layer further extends on this first surface of this first dielectric layer and covers this first surface；And
A part for this first conductive material layer being pointed on this first surface of this first dielectric layer carries out a subtractive process program, to form this second conductive layer.
9. the manufacture method of line construction as claimed in claim 6, wherein forms the step of the 3rd conductive layer, including:
Fill this second conductive material layer in those the second circuit grooves time, this second conductive material layer further extends on this second surface of this second dielectric layer and covers this second surface；And
A part for this second conductive material layer being pointed on this second surface of this second dielectric layer carries out a subtractive process program, to form the 3rd conductive layer.
10. the manufacture method of line construction as claimed in claim 6, wherein this signal line concurrently forms in same step with those reference line.
The manufacture method of 11. line constructions as claimed in claim 6, the method wherein filling this first conductive material layer and this second conductive material layer includes galvanoplastic.
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| CN201210295065.4A CN103596353B (en) | 2012-08-17 | 2012-08-17 | Line construction and preparation method thereof |
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| CN111211111B (en) * | 2020-01-08 | 2020-11-20 | 上海燧原智能科技有限公司 | Interconnector and packaging structure |
| CN114916120A (en) * | 2021-02-09 | 2022-08-16 | 苏州旭创科技有限公司 | Circuit board with waveguide structure and manufacturing method thereof |
| CN114916127A (en) * | 2021-02-09 | 2022-08-16 | 苏州旭创科技有限公司 | Circuit board and method for manufacturing the same |
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| TW201002194A (en) * | 2008-06-27 | 2010-01-01 | Samsung Electro Mech | Electromagnetic bandgap structure and printed circuit board |
| CN103120038A (en) * | 2010-09-28 | 2013-05-22 | 日本电气株式会社 | Structural body and wiring substrate |
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| KR101023541B1 (en) * | 2009-09-22 | 2011-03-21 | 삼성전기주식회사 | Electromagnetic interference noise reduction board using electromagnetic bandgap structure |
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| TW201002194A (en) * | 2008-06-27 | 2010-01-01 | Samsung Electro Mech | Electromagnetic bandgap structure and printed circuit board |
| CN103120038A (en) * | 2010-09-28 | 2013-05-22 | 日本电气株式会社 | Structural body and wiring substrate |
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