CN103592597B - The mutual detecting method of fault of a kind of voltage linear buffer circuit and voltage comparator circuit - Google Patents
The mutual detecting method of fault of a kind of voltage linear buffer circuit and voltage comparator circuit Download PDFInfo
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- CN103592597B CN103592597B CN201310592096.0A CN201310592096A CN103592597B CN 103592597 B CN103592597 B CN 103592597B CN 201310592096 A CN201310592096 A CN 201310592096A CN 103592597 B CN103592597 B CN 103592597B
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Abstract
The invention discloses the mutual detecting method of fault of a kind of voltage linear buffer circuit and voltage comparator circuit, realized by voltage linear buffer circuit (1), voltage comparator circuit (2) and overall treatment unit (3), described overall treatment unit (3) comprising: AD acquisition module (4), level detection module (5) and fault detection module (6).The fault that the method can complete between voltage linear buffer circuit (1) and voltage comparator circuit (2) is examined mutually, tested voltage, through the comparison of signal by the isolation of voltage linear buffer circuit (1), collection and voltage comparator circuit (2), carries out fault detect by overall treatment unit (3).The method can be located automatically to the fault of circuit, can be widely used in the voltage linear buffer circuit based on linear optical coupling.
Description
Technical field
The present invention relates to the mutual detecting method of fault of the mutual detecting method of fault between circuit, particularly a kind of voltage linear buffer circuit and voltage comparator circuit.
Background technology
In many commercial measurements such as automated detection system, computer data acquisition system, industrial control system, often need in-site modeling signals collecting in microprocessor.In the process gathered, various undesired signal all can enter in microprocessor along with measured signal, these signal superpositions can make the accuracy of measurement reduce in useful measured signal, in order to realize voltage linear conversion and the electrical noise interference at scene be not incorporated into control system, circuit-under-test and control circuit must be realized isolation on electrically.Current use is more is voltage isolation circuit based on linear optical coupling, but in the process of carrying out AD collection, is no matter input end fault or the output terminal fault of buffer circuit, all can causes the results abnormity that AD gathers.After circuit malfunctions, usually adopt the instrument and meter such as voltage table, oscillograph measuring voltage and waveform, need dismounting circuit board, spend larger time and efforts.
Summary of the invention
The object of the invention is the mutual detecting method of fault providing a kind of voltage linear buffer circuit and voltage comparator circuit, after solving circuit malfunctions, instrument and meter measuring voltage and the waveforms such as usual employing voltage table, oscillograph, need dismounting circuit board, spend the problem of larger time and efforts.
The mutual detecting method of fault of voltage linear buffer circuit and voltage comparator circuit, its concrete steps are:
The first step builds detection tester for electronic circuit fault
Detection tester for electronic circuit fault, comprising: voltage linear buffer circuit, voltage comparator circuit and overall treatment unit.Described overall treatment unit, comprising: AD acquisition module, level detection module and fault detection module.
The function of AD acquisition module is: carry out AD collection to the magnitude of voltage of voltage linear buffer circuit output terminal.
The function of level detection module is: the level value reading voltage comparator circuit output terminal.
The function of fault detection module is: the fault detecting voltage linear buffer circuit or voltage comparator circuit.
The output terminal of tested voltage signal is connected with the input end of voltage linear buffer circuit and the input end of voltage comparator circuit respectively; The output terminal of voltage linear buffer circuit is connected with the AD collection terminal of overall treatment unit; The output terminal of voltage comparator circuit is held with the GPIO of overall treatment unit and is connected.
Second step voltage linear buffer circuit carries out voltage conditioning
Tested voltage signal, after voltage linear buffer circuit, is the voltage of 0-3V by conditioning, and completes the electrical isolation with input end.
3rd step voltage comparator circuit arranges level saltus step thresholding
When tested voltage signal is 0, the level of voltage comparator circuit output terminal is low level, and when tested voltage signal is not 0, the level of voltage comparator circuit output terminal is high level.
4th step overall treatment unit Initialize installation
Arrange acquisition mode and the frequency acquisition of overall treatment unit AD collection terminal, AD acquisition mode is set to ordered mode, and frequency acquisition is 1Mbps, and the GPIO of overall treatment unit end is set to input pattern.
5th step AD acquisition module reads magnitude of voltage
AD acquisition module carries out AD collection by the magnitude of voltage of AD collection terminal to voltage linear buffer circuit output terminal of overall treatment unit.
6th step level detection module reads level value
Level detection module reads the level value of voltage comparator circuit output terminal by the GPIO end of overall treatment unit.
7th step fault detection module detection failure
The GPIO that the magnitude of voltage of the AD collection terminal that fault detection module is read by contrast AD acquisition module and level detection module read holds level value, detects fault.In normal state, the AD collection terminal of overall treatment unit has voltage, what GPIO held is input as high level, and when the magnitude of voltage of the AD collection terminal of overall treatment unit or the level value of GPIO end input occur abnormal, account for voltage circuit linearity insulating circuit or voltage comparator circuit break down.
So far the fault completing voltage linear buffer circuit and voltage comparator circuit is examined mutually.
This detection method is by increasing a voltage comparator circuit at the input end of voltage linear buffer circuit, by the level value that the magnitude of voltage and GPIO end that read AD collection terminal input, complete the automatic location to voltage linear buffer circuit input end or output terminal fault, solve the fault detection problem in voltage linear buffer circuit in the past; And also can be detected the fault of voltage comparator circuit by the magnitude of voltage of reading AD collection terminal and the level value of GPIO end input, the fault achieved between DC voltage circuit linearity insulating circuit and voltage comparator circuit is examined mutually.The method can be located automatically to the fault of circuit, and structure is simple, is easy to realize, can be widely used in the voltage linear buffer circuit based on linear optical coupling.
Accompanying drawing explanation
The block diagram of detection tester for electronic circuit fault in the mutual detecting method of fault of Fig. 1 a kind of voltage linear buffer circuit and voltage comparator circuit.
1. voltage linear buffer circuit 2. voltage comparator circuit 3. overall treatment unit 4.AD acquisition module 5. level detection module 6. fault detection module.
Embodiment
The mutual detecting method of fault of voltage linear buffer circuit and voltage comparator circuit, its concrete steps are:
The first step builds detection tester for electronic circuit fault
Detection tester for electronic circuit fault, comprising: voltage linear buffer circuit 1, voltage comparator circuit 2 and overall treatment unit 3.Described overall treatment unit 3, comprising: AD acquisition module 4, level detection module 5 and fault detection module 6.
The function of AD acquisition module 4 is: carry out AD collection to the magnitude of voltage of voltage linear buffer circuit 1 output terminal.
The function of level detection module 5 is: the level value reading voltage comparator circuit 2 output terminal.
The function of fault detection module 6 is: the fault detecting voltage linear buffer circuit 1 or voltage comparator circuit 2.
The output terminal of tested voltage signal is connected with the input end of voltage linear buffer circuit 1 and the input end of voltage comparator circuit 2 respectively; The output terminal of voltage linear buffer circuit 1 is connected with the AD collection terminal of overall treatment unit 3; The output terminal of voltage comparator circuit 2 is held with the GPIO of overall treatment unit 3 and is connected.
Second step voltage linear buffer circuit 1 carries out voltage conditioning
Tested voltage signal, after voltage linear buffer circuit 1, is the voltage of 0-3V by conditioning, and completes the electrical isolation with input end.
3rd step voltage comparator circuit 2 arranges level saltus step thresholding
When tested voltage signal is 0, the level of voltage comparator circuit 2 output terminal is low level, and when tested voltage signal is not 0, the level of voltage comparator circuit 2 output terminal is high level.
4th step overall treatment unit 3 Initialize installation
Arrange acquisition mode and the frequency acquisition of the AD collection terminal of overall treatment unit 3, AD acquisition mode is set to ordered mode, frequency acquisition is 1Mbps, and the GPIO of overall treatment unit 3 end is set to input pattern.
5th step AD acquisition module 4 reads magnitude of voltage
AD acquisition module 4 carries out AD collection by the magnitude of voltage of AD collection terminal to voltage linear buffer circuit 1 output terminal of overall treatment unit 3.
6th step level detection module 5 reads level value
Level detection module 5 reads the level value of voltage comparator circuit 2 output terminal by the GPIO end of overall treatment unit 3.
7th step fault detection module 6 detection failure
The GPIO that the magnitude of voltage of the AD collection terminal that fault detection module 6 is read by contrast AD acquisition module 4 and level detection module 5 read holds level value, detects fault.In normal state, the AD collection terminal of overall treatment unit 3 has voltage, what GPIO held is input as high level, and when the magnitude of voltage of the AD collection terminal of overall treatment unit 3 or the level value of GPIO end input occur abnormal, account for voltage circuit linearity insulating circuit 1 or voltage comparator circuit 2 break down.Be embodied in:
When the AD collection terminal no-voltage of overall treatment unit 3, but GPIO end be input as high level time, the output of account for voltage circuit linearity insulating circuit 1 is broken down; When the AD collection terminal of overall treatment unit 3 has voltage, but when the input end of GPIO end is low level, account for voltage comparator circuit 2 breaks down.
So far complete voltage linear buffer circuit 1 to examine mutually with the fault of voltage comparator circuit 2.
Claims (1)
1. the mutual detecting method of the fault of voltage linear buffer circuit and voltage comparator circuit, is characterized in that the concrete steps of this method are:
The first step builds detection tester for electronic circuit fault
Detection tester for electronic circuit fault, comprising: voltage linear buffer circuit (1), voltage comparator circuit (2) and overall treatment unit (3); Described overall treatment unit (3), comprising: AD acquisition module (4), level detection module (5) and fault detection module (6);
The function of AD acquisition module (4) is: carry out AD collection to the magnitude of voltage of voltage linear buffer circuit (1) output terminal;
The function of level detection module (5) is: the level value reading voltage comparator circuit (2) output terminal;
The function of fault detection module (6) is: the fault detecting voltage linear buffer circuit (1) or voltage comparator circuit (2);
The output terminal of tested voltage signal is connected with the input end of voltage linear buffer circuit (1) and the input end of voltage comparator circuit (2) respectively; The output terminal of voltage linear buffer circuit (1) is connected with the AD collection terminal of overall treatment unit (3); The output terminal of voltage comparator circuit (2) is held with the GPIO of overall treatment unit (3) and is connected;
Second step voltage linear buffer circuit (1) carries out voltage conditioning
Tested voltage signal, after voltage linear buffer circuit (1), is the voltage of 0-3V by conditioning, and completes the electrical isolation with input end;
3rd step voltage comparator circuit (2) arranges level saltus step thresholding
When tested voltage signal is 0, the level of voltage comparator circuit (2) output terminal is low level, and when tested voltage signal is not 0, the level of voltage comparator circuit (2) output terminal is high level;
4th step overall treatment unit (3) Initialize installation
Arrange acquisition mode and the frequency acquisition of the AD collection terminal of overall treatment unit (3), AD acquisition mode is set to ordered mode, frequency acquisition is 1Mbps, and the GPIO of overall treatment unit (3) end is set to input pattern;
5th step AD acquisition module (4) reads magnitude of voltage
AD acquisition module (4) carries out AD collection by the magnitude of voltage of AD collection terminal to voltage linear buffer circuit (1) output terminal of overall treatment unit (3);
6th step level detection module (5) reads level value
Level detection module (5) reads the level value of voltage comparator circuit (2) output terminal by the GPIO end of overall treatment unit (3);
7th step fault detection module (6) detection failure
The GPIO that the magnitude of voltage of the AD collection terminal that fault detection module (6) is read by contrast AD acquisition module (4) and level detection module (5) read holds level value, detects fault; In normal state, the AD collection terminal of overall treatment unit (3) has voltage, what GPIO held is input as high level, when the magnitude of voltage of the AD collection terminal of overall treatment unit (3) or the level value of GPIO end input occur abnormal, account for voltage circuit linearity insulating circuit (1) or voltage comparator circuit (2) break down; Be embodied in: when the AD collection terminal no-voltage of overall treatment unit (3), but GPIO end be input as high level time, the output of account for voltage circuit linearity insulating circuit (1) is broken down; When the AD collection terminal of overall treatment unit (3) has voltage, but when the input end of GPIO end is low level, account for voltage comparator circuit (2) breaks down;
So far the fault completing voltage linear buffer circuit and voltage comparator circuit is examined mutually.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201310592096.0A CN103592597B (en) | 2013-11-22 | 2013-11-22 | The mutual detecting method of fault of a kind of voltage linear buffer circuit and voltage comparator circuit |
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| CN201310592096.0A CN103592597B (en) | 2013-11-22 | 2013-11-22 | The mutual detecting method of fault of a kind of voltage linear buffer circuit and voltage comparator circuit |
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| CN103592597B true CN103592597B (en) | 2016-03-30 |
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| CN109188248B (en) * | 2018-09-12 | 2021-07-16 | 杭州和利时自动化有限公司 | Circuit diagnosis device, method, equipment and computer readable storage medium |
| CN112327681A (en) * | 2020-10-14 | 2021-02-05 | 北京三快在线科技有限公司 | Power supply control device, fault positioning method, device, medium, and unmanned device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006262180A (en) * | 2005-03-17 | 2006-09-28 | Toshiba Corp | Semiconductor device |
| CN102193066A (en) * | 2010-03-05 | 2011-09-21 | 通用汽车环球科技运作有限责任公司 | Method and apparatus to monitor loss of ground isolation of an electric motor drive circuit |
| CN103033732A (en) * | 2012-11-09 | 2013-04-10 | 浙江大学 | Insulated gate bipolar transistor (IGBT) fault detection circuit |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006262180A (en) * | 2005-03-17 | 2006-09-28 | Toshiba Corp | Semiconductor device |
| CN102193066A (en) * | 2010-03-05 | 2011-09-21 | 通用汽车环球科技运作有限责任公司 | Method and apparatus to monitor loss of ground isolation of an electric motor drive circuit |
| CN103033732A (en) * | 2012-11-09 | 2013-04-10 | 浙江大学 | Insulated gate bipolar transistor (IGBT) fault detection circuit |
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