CN103582877B - 计算机系统中断处理 - Google Patents

计算机系统中断处理 Download PDF

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Publication number
CN103582877B
CN103582877B CN201180060123.9A CN201180060123A CN103582877B CN 103582877 B CN103582877 B CN 103582877B CN 201180060123 A CN201180060123 A CN 201180060123A CN 103582877 B CN103582877 B CN 103582877B
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CN
China
Prior art keywords
cpu
apd
multiple task
queue
uli
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201180060123.9A
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English (en)
Chinese (zh)
Other versions
CN103582877A (zh
Inventor
本杰明·托马斯·桑德
迈克尔·休斯顿
牛顿·张
基思·洛韦里
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
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Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US13/292,721 external-priority patent/US8667201B2/en
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of CN103582877A publication Critical patent/CN103582877A/zh
Application granted granted Critical
Publication of CN103582877B publication Critical patent/CN103582877B/zh
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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Advance Control (AREA)
  • Image Processing (AREA)
  • Image Generation (AREA)
  • Bus Control (AREA)
  • Cash Registers Or Receiving Machines (AREA)
  • Multi Processors (AREA)
CN201180060123.9A 2010-12-15 2011-12-09 计算机系统中断处理 Active CN103582877B (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US42348310P 2010-12-15 2010-12-15
US61/423,483 2010-12-15
US13/292,721 US8667201B2 (en) 2010-12-15 2011-11-09 Computer system interrupt handling
US13/292,721 2011-11-09
PCT/US2011/064169 WO2012082556A2 (en) 2010-12-15 2011-12-09 Computer system interrupt handling

Publications (2)

Publication Number Publication Date
CN103582877A CN103582877A (zh) 2014-02-12
CN103582877B true CN103582877B (zh) 2015-09-23

Family

ID=49326938

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201180060123.9A Active CN103582877B (zh) 2010-12-15 2011-12-09 计算机系统中断处理

Country Status (5)

Country Link
EP (1) EP2663926B1 (enExample)
JP (1) JP5805783B2 (enExample)
KR (1) KR101791182B1 (enExample)
CN (1) CN103582877B (enExample)
WO (1) WO2012082556A2 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9465620B2 (en) * 2012-12-20 2016-10-11 Intel Corporation Scalable compute fabric
US10387343B2 (en) 2015-04-07 2019-08-20 International Business Machines Corporation Processing of events for accelerators utilized for parallel processing
CN109388592B (zh) * 2017-08-02 2022-03-29 伊姆西Ip控股有限责任公司 采用用户空间存储驱动器内的多个排队结构来提高速度
US10672095B2 (en) * 2017-12-15 2020-06-02 Ati Technologies Ulc Parallel data transfer to increase bandwidth for accelerated processing devices
US11687366B2 (en) * 2018-07-24 2023-06-27 Mitsubishi Electric Corporation Interrupt handling method, computer system, and non-transitory storage medium that resumes waiting threads in response to interrupt signals from I/O devices
CN113051082A (zh) * 2021-03-02 2021-06-29 长沙景嘉微电子股份有限公司 软件硬件数据同步方法、装置、电子设备和存储介质

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02188866A (ja) * 1989-01-17 1990-07-24 Fujitsu Ltd コプロセッサにおける事象管理方式
JPH0496857A (ja) * 1990-08-15 1992-03-30 Fujitsu Ltd コプロセッサにおける事象通知方式
US6128672A (en) 1998-03-10 2000-10-03 Motorola, Inc. Data transfer using software interrupt service routine between host processor and external device with queue of host processor and hardware queue pointers on external device
US6895460B2 (en) * 2002-07-19 2005-05-17 Hewlett-Packard Development Company, L.P. Synchronization of asynchronous emulated interrupts
US7421694B2 (en) * 2003-02-18 2008-09-02 Microsoft Corporation Systems and methods for enhancing performance of a coprocessor
US7340547B1 (en) 2003-12-02 2008-03-04 Nvidia Corporation Servicing of multiple interrupts using a deferred procedure call in a multiprocessor system
US8400444B2 (en) * 2005-12-08 2013-03-19 Agency 9AB Method to render a root-less scene graph with a user controlled order of rendering
US7689748B2 (en) * 2006-05-05 2010-03-30 Ati Technologies, Inc. Event handler for context-switchable and non-context-switchable processing tasks
EP2074316B1 (en) 2006-10-12 2020-02-12 United Technologies Corporation Managing low pressure turbine maximum speed in a turbofan engine
US8780123B2 (en) * 2007-12-17 2014-07-15 Nvidia Corporation Interrupt handling techniques in the rasterizer of a GPU
GB2462860B (en) * 2008-08-22 2012-05-16 Advanced Risc Mach Ltd Apparatus and method for communicating between a central processing unit and a graphics processing unit
JP4990250B2 (ja) * 2008-09-18 2012-08-01 株式会社日立産機システム 割込制御装置、割込制御システム、割込制御方法および割込制御プログラム
JP2010181989A (ja) * 2009-02-04 2010-08-19 Renesas Electronics Corp データ処理装置
US8356130B2 (en) 2009-08-14 2013-01-15 Advanced Micro Devices, Inc. Mechanism for recording undeliverable user-level interrupts

Also Published As

Publication number Publication date
WO2012082556A3 (en) 2013-11-14
EP2663926A4 (en) 2015-01-07
CN103582877A (zh) 2014-02-12
JP5805783B2 (ja) 2015-11-10
WO2012082556A2 (en) 2012-06-21
KR20130136499A (ko) 2013-12-12
KR101791182B1 (ko) 2017-10-27
EP2663926B1 (en) 2017-02-22
EP2663926A2 (en) 2013-11-20
JP2014503899A (ja) 2014-02-13

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