CN103579355B - Thin film transistor base plate and manufacture method thereof and include the display of this substrate - Google Patents
Thin film transistor base plate and manufacture method thereof and include the display of this substrate Download PDFInfo
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- CN103579355B CN103579355B CN201210259588.3A CN201210259588A CN103579355B CN 103579355 B CN103579355 B CN 103579355B CN 201210259588 A CN201210259588 A CN 201210259588A CN 103579355 B CN103579355 B CN 103579355B
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- thin film
- film transistor
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- oxide semiconductor
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- 239000010409 thin film Substances 0.000 title claims abstract description 92
- 239000000758 substrate Substances 0.000 title claims abstract description 38
- 238000000034 method Methods 0.000 title claims abstract description 22
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 13
- 239000004065 semiconductor Substances 0.000 claims abstract description 90
- 230000004888 barrier function Effects 0.000 claims abstract description 61
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 16
- 229910052802 copper Inorganic materials 0.000 claims abstract description 16
- 239000010949 copper Substances 0.000 claims abstract description 16
- 239000010410 layer Substances 0.000 claims description 158
- 238000005530 etching Methods 0.000 claims description 17
- 239000000463 material Substances 0.000 claims description 16
- 230000005611 electricity Effects 0.000 claims description 5
- 239000002356 single layer Substances 0.000 claims description 4
- 150000002927 oxygen compounds Chemical class 0.000 claims description 2
- UGFAIRIUMAVXCW-UHFFFAOYSA-N Carbon monoxide Chemical compound [O+]#[C-] UGFAIRIUMAVXCW-UHFFFAOYSA-N 0.000 claims 3
- 229910052751 metal Inorganic materials 0.000 description 18
- 239000002184 metal Substances 0.000 description 18
- 239000012212 insulator Substances 0.000 description 12
- 239000010936 titanium Substances 0.000 description 7
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 6
- 229910004205 SiNX Inorganic materials 0.000 description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 6
- 238000009413 insulation Methods 0.000 description 6
- 239000004973 liquid crystal related substance Substances 0.000 description 6
- 239000011733 molybdenum Substances 0.000 description 6
- 229910052750 molybdenum Inorganic materials 0.000 description 6
- 229910052814 silicon oxide Inorganic materials 0.000 description 6
- 229910052719 titanium Inorganic materials 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 4
- 230000003647 oxidation Effects 0.000 description 4
- 238000007254 oxidation reaction Methods 0.000 description 4
- 238000000059 patterning Methods 0.000 description 4
- 239000011241 protective layer Substances 0.000 description 4
- 229910052725 zinc Inorganic materials 0.000 description 4
- 239000011701 zinc Substances 0.000 description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 3
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 3
- 239000002131 composite material Substances 0.000 description 3
- 229910052733 gallium Inorganic materials 0.000 description 3
- 229910052738 indium Inorganic materials 0.000 description 3
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 2
- -1 SiOx or SiNx) Chemical compound 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- 208000027418 Wounds and injury Diseases 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 230000006378 damage Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 208000014674 injury Diseases 0.000 description 2
- 229910052749 magnesium Inorganic materials 0.000 description 2
- 239000011777 magnesium Substances 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 239000011265 semifinished product Substances 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- JPVYNHNXODAKFH-UHFFFAOYSA-N Cu2+ Chemical compound [Cu+2] JPVYNHNXODAKFH-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000005856 abnormality Effects 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 229910001431 copper ion Inorganic materials 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000001962 electrophoresis Methods 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000003365 glass fiber Substances 0.000 description 1
- 230000012447 hatching Effects 0.000 description 1
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 239000012811 non-conductive material Substances 0.000 description 1
- 239000000615 nonconductor Substances 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 229920003023 plastic Polymers 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000004062 sedimentation Methods 0.000 description 1
- 238000005728 strengthening Methods 0.000 description 1
- YSRUGFMGLKANGO-UHFFFAOYSA-N zinc hafnium(4+) indium(3+) oxygen(2-) Chemical compound [O-2].[Zn+2].[In+3].[Hf+4] YSRUGFMGLKANGO-UHFFFAOYSA-N 0.000 description 1
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/495—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a simple metal, e.g. W, Mo
Abstract
A kind of thin film transistor base plate and manufacture method thereof and include the display of this substrate, this thin film transistor base plate includes substrate and multiple thin film transistor (TFT).The plurality of thin film transistor (TFT) includes the first electrode layer, the first insulating barrier, oxide semiconductor layer, the second electrode lay and the second insulating barrier.First electrode layer is formed on substrate, and it includes gate portion.First insulating barrier covers the first electrode layer.Oxide semiconductor layer is formed on the first insulating barrier.The second electrode lay is formed on oxide semiconductor layer, and it includes that source portion and drain portion are positioned at the two ends of corresponding gate portion, has the first interval between source portion and drain portion.Second insulating barrier covers oxide semiconductor layer and the second electrode lay.Wherein, within the edge of the second electrode lay is positioned at oxide semiconductor layer edge, the second electrode lay includes copper.
Description
Technical field
The present invention relates to a kind of display, and particularly relate to comprise the thin film of copper and oxide semiconductor
Transistor base, its display and manufacture method thereof.
Background technology
The liquid crystal display of thin plane or organic electric exciting light-emitting diode (OLED) display due to
Power consumption is low, is therefore widely used on electronic equipment.Active (Active) liquid crystal display
On substrate on device or organic electric exciting light-emitting diode display, there is multiple thin film transistor (TFT)
(Thin-Film Transistor, TFT), goes out light efficiency with control each pixel (pixel) unit
Really, display picture GTG.
If the active layers of thin film transistor (TFT) uses oxide semiconductor, for example, indium gallium zinc
(Indium Gallium Zinc Oxide, IGZO), compared to general conventional non-crystalline silicon (a-Si)
There is for quasiconductor bigger electron mobility, relatively low power consumption and less transistor area
Advantage, compared to for general low-temperature polysilicon silicon semiconductor (LTPS), then there is relatively low technique
Cost and the advantage being easier to maximization.Therefore in large scale or high-resolution display, use oxidation
Thing semiconductor thin-film transistor is following trend.
The profile of its thin film transistor base plate of traditional monitor as shown in Figure 1, thin film transistor (TFT) base
Plate 1 includes substrate 10 and thin film transistor (TFT).Thin film transistor (TFT) includes gate portion 11, gate insulator
12, intervening metal layer 13, oxide semiconductor layer 14, source portion 15a, drain portion 15b, insulation
Protective layer (passivation layer) 16, contact hole (via) 19 and pixel electrode (pixel
Electrode) 17.Wherein, source portion 15a is copper (Copper, Cu) with the material of drain portion 15b.
Gate portion 11 is formed on substrate 10.Gate insulator 12 is oxide or the nitride of silicon
(such as SiOx or SiNx), and flood covers substrate 10 and gate portion 11.Oxide semiconductor layer
14 are formed on gate insulator 12, and are positioned at above corresponding grid 11.
In order to avoid the copper ion of drain portion 15a Yu source portion 15b diffuses to gate insulator 12 shape
Become moving iron, affect electrical characteristics and the reliability of thin film transistor (TFT), therefore an intervening metal layer 13
Can be initially formed on gate insulator 12, and be positioned at corresponding drain portion 15a and source portion 15b
Under.In addition, copper metal and the gate insulator 12 of drain portion 15a, source portion 15b is attached
The property (adhesion) is the best, by the setting of intervening metal layer 13, can increase tack and avoid
Splitting (peeling).
Insulating protective layer 16 is oxide or the nitride (such as SiOx or SiNx) of silicon, and flood
Cover drain portion 15a, source portion 15b, oxide semiconductor layer 14 and gate insulator 12, to reach
Effect to protection insulation.Then, above insulating protective layer 16, contact hole 19 is defined, and
Being formed at pixel electrode 17 on insulating protective layer 16, wherein contact hole 19 is in order to make pixel electricity
Pole 17 down extends and is electrically connected with source portion 15b.
It addition, refer to Fig. 2, Fig. 2 is the profile of another kind of thin film transistor base plate.Compared to
The thin film transistor (TFT) of the thin film transistor base plate 1 ' of Fig. 1, Fig. 2 also includes etching stopping layer (Etch Stop
Layer, ESL) 18 it is formed on oxide semiconductor layer 14, to prevent etching process to oxidation
Thing semiconductor layer 14 carries on the back the injury of passage (back channel) part.
Above-mentioned intervening metal layer 13 for example, molybdenum (Molybdenum, Mo) or titanium (Titanium,
Ti).After gate insulator 12 is formed, molybdenum or titanium meeting flood successive sedimentation also cover gate insulator
Layer 12, top covers copper again, then passes through etching process, can be formed above-mentioned drain portion 15a,
Source portion 15b and intervening metal layer 13.But, in etching process, part molybdenum or titanium may not by
Etch and remain, thus result in the even disabler of thin film transistor (TFT) electric characteristic abnormality, affect its reliability
With yield.
Summary of the invention
The present invention provides a kind of thin film transistor base plate, and this thin film transistor base plate includes substrate and multiple
Thin film transistor (TFT).Thin film transistor (TFT) include the first electrode layer, the first insulating barrier, oxide semiconductor layer,
The second electrode lay and the second insulating barrier.First electrode layer is formed on substrate, and it includes gate portion.
First insulating barrier covers the first electrode layer.Oxide semiconductor layer is formed on gate insulator.Second
Electrode layer is formed on oxide semiconductor, and it includes that source portion and drain portion are positioned at corresponding gate portion
There is between two ends, source portion and drain portion the first interval.Second insulating barrier covers oxide semiconductor
Layer and the second electrode lay.Wherein, the second electrode lay edge within oxide semiconductor layer edge,
Two electrode layers include copper.
The present invention provides a kind of display, and it includes display floater, drive circuit and appearance member.Display
Panel includes thin film transistor base plate.Thin film transistor base plate include substrate, multiple thin film transistor (TFT),
The a plurality of scan line being parallel to each other and a plurality of data wire being parallel to each other.Thin film transistor (TFT) includes first
Electrode layer, the first insulating barrier, oxide semiconductor layer, the second electrode lay and the second insulating barrier.The
One electrode layer is formed on substrate, and it includes gate portion.First insulating barrier covers the first electrode layer.Oxygen
Compound semiconductor layer is formed on gate insulator.The second electrode lay is formed on oxide semiconductor,
It includes that source portion and drain portion are positioned at the two ends of corresponding gate portion, has between source portion and drain portion
First interval.Second insulating barrier covers oxide semiconductor layer and the second electrode lay.Wherein, the second electricity
Layer edge, pole is within oxide semiconductor layer edge, and the second electrode lay includes copper.
The present invention provides the manufacture method of a kind of thin film transistor base plate.First, it is provided that substrate.Then
Form the first electrode layer on substrate, and the first electrode layer includes gate portion.Afterwards, first is formed exhausted
Edge layer covers the first electrode layer.Form oxide semiconductor layer on the first insulating barrier.Then, formed
The second electrode lay is on oxide semiconductor layer, and the second electrode lay includes the two ends being positioned at corresponding gate portion
Source portion and drain portion, source portion and drain portion between there is the first interval.Finally, second is formed
Insulating barrier covers oxide semiconductor layer and the second electrode lay.Wherein, the second electrode lay edge is in oxidation
Within thing semiconductor layer edge, the second electrode lay includes copper.
In sum, the embodiment of the present invention provides a kind of thin film transistor base plate, its display to make with it
Making method, the second electrode lay of wherein said thin film transistor (TFT) is formed on oxide semiconductor layer, and
There is between described the second electrode lay and oxide semiconductor layer good tackness.Compared to conventional thin
Film transistor, the thin film transistor (TFT) of the embodiment of the present invention uses simple copper as the second electrode lay, saves
Omited intervening metal layer, thus have relatively low cost, the technique more simplified, preferably yield with relatively
Good degree of stability.
It is further understood that inventive feature and technology contents for enabling, refers to below in connection with this
Bright detailed description and accompanying drawing, but these explanations and institute's accompanying drawings are intended merely to illustrate the present invention, and
Non-scope of the presently claimed invention is made any restriction.
Accompanying drawing explanation
Fig. 1 is the profile of the thin film transistor base plate of traditional liquid crystal panel.
Fig. 2 is the profile of the another kind of thin film transistor base plate of traditional liquid crystal panel.
Fig. 3 is the profile of the thin film transistor base plate of the embodiment of the present invention.
Fig. 4 is the plane graph of the thin film transistor base plate of the embodiment of the present invention
Fig. 5 is the profile of the thin film transistor base plate of another embodiment of the present invention.
Fig. 6 is the profile of the thin film transistor base plate of another embodiment of the present invention.
Fig. 7 is the profile of the thin film transistor base plate of another embodiment of the present invention.
The semi-finished product that Fig. 8 to Figure 11 is formed by the part steps of thin film transistor base plate manufacture method
Plane graph.
[main element symbol description]
1,1 ': conventional thin film transistor substrate
3,3 ', 3 ", 3 " ': thin film transistor base plate
10,30: substrate
11,31: the first electrode layer
12,32: the first insulating barrier
13: intervening metal layer
14,33,33 ': oxide semiconductor layer
31a: gate portion
34: the second electrode lay
15a, 34a: drain portion
15b, 34b: source portion
16,35: the second insulating barrier
17,36: pixel electrode layer
18,37: etching stopping layer
19,38: contact hole
39,39 ', 39 ", 39 " ': thin film transistor (TFT)
41: scan line
42: data wire
S1: the first interval
S2: the second interval
Detailed description of the invention
Fig. 3 is the profile of the thin film transistor base plate of the embodiment of the present invention, and Fig. 4 is present invention reality
Executing the plane graph of the thin film transistor base plate of example, wherein the profile of Fig. 3 is according to the hatching of Fig. 4
AA carries out section and obtains.Thin film transistor base plate 3 is by the multiple matrix arrangement being positioned on substrate 30
Thin film transistor (TFT) 39, be parallel to each other and a plurality of sweep along what first axial (such as X-axis) arranged
Retouch line 41 be parallel to each other and along second axial (such as Y-axis) to arrangement a plurality of data lines 42
Constituted.Scan line 41 and data wire 42 are staggered, and are spaced the multiple pixel cells of formation.Thin
Film transistor 39 is positioned at scan line 41 and the intervening portion of data wire 42, by scan line 41 and number
The driving signal provided according to line 42, controls each pixel cell and goes out light situation, to show grey menu.
Thin film transistor base plate 3 includes substrate 30, thin film transistor (TFT) 39 and pixel electrode layer 36.Thin
Film transistor 39 include first electrode layer the 31, first insulating barrier 32, oxide semiconductor layer 33,
Two electrode layer 34 and the second insulating barriers 35.The thin film transistor (TFT) 39 of this embodiment constructs for bottom-gate.
Substrate 30 act as bearing film and element, its surface must have enough flatness,
Its material can be printing opacity or lighttight insulant, e.g. glass, plastics, glass fibre
Or the sheet metal (metal foil) on coated insulation top layer.
First electrode layer 31 of patterning is positioned on substrate 30, has wire portion and gate portion 31a,
Wherein wire portion can be scan line 41, and gate portion protrudes from scan line 41 or belongs to scan line
41 a portions, the predetermined grid (gate) forming thin film transistor (TFT) 39.Gate portion 31a with sweep
Retouch line 41 for being electrical connected.The material of the first electrode layer 31 can be aluminum, copper, molybdenum, titanium, silver,
The metals such as magnesium, are constituted with monolayer, multi-laminate or alloy mode.
First insulating barrier 32 also referred to as gate insulator, it is positioned at the first electrode layer 31 and substrate 30
Top, and the first insulating barrier 32 must completely cover the first electrode layer 31 to completely cut off interelectrode electricity
Property conducting and produce suitable TFT channels effect.First insulating barrier 32 can be partial or complete
Cover substrate 30.The material of the first insulating barrier 32 can be SiNx, SiOx or its composite bed
Folded combination.But the present invention does not limit substrate the 30, first electrode layer 31 and the first insulating barrier 32
The material used.
Oxide semiconductor layer 33 is positioned at the top of the first insulating barrier 32, and part covering first is exhausted
Edge layer 32, wherein partial oxide semiconductor layer 33 must be positioned on opposing gate portion 31a, with
Form the passage of thin film transistor (TFT).The material of oxide semiconductor layer 33 can be with ionic bond bond
Semi-conducting material, itself there is higher carrier transport factor, to be used as induction channels, example
Zinc oxide (ZnO), indium zinc oxide (IZO), indium gallium zinc (IGZO), tin indium oxide in this way
Zinc (ITZO), aluminium oxide stannum zinc (ATZO), hafnium oxide indium zinc (HIZO) or a combination thereof.
The second electrode lay 34 of patterning is positioned at the top of oxide semiconductor layer 33, and it corresponds to grid
Two ends relative for pole portion 31a have source portion 34b and drain portion 34a, source portion 34b and drain electrode
There is the first interval S1 with electrically isolated between portion 34a, and produce suitable TFT channels
Effect.The second electrode lay 34 additionally has wire portion, and it can be data wire 42.This embodiment
With the first insulating barrier 32 below source portion 34b of two electrode layers 34, drain portion 34a and data wire 42
Contact surface, all have oxide semiconductor layer 33 between as attachment strengthening layer, oxide
Semiconductor layer 33 area is at least above the second electrode lay 34 area, the graph edge of the second electrode lay 34
The pattern edge of edge and oxide semiconductor layer 33 trims or the pattern edge of the second electrode lay 34 exists
Oxide semiconductor layer 33 pattern edge in.More preferably, the figure of oxide semiconductor layer 33
Within shape edge, it is positioned at the oxide semiconductor layer 33 below the data wire 42 of the second electrode lay 34
Figure has more than one second interval S2, may in order to electrically isolate oxide semiconductor layer 33
Conductive path, it is to avoid electric leakage produce impact display picture.The material of the second electrode lay 34 can be
The metals such as aluminum, copper, molybdenum, titanium, silver, magnesium, are constituted with monolayer, multi-laminate or alloy mode.This is real
The second electrode lay 34 executing example is monolayer copper metal.
Second insulating barrier 35 is positioned on the second electrode lay 34 and oxide semiconductor layer 33, and necessary
Complete the second electrode lay 34 and the oxide semiconductor layer 33 of covering is to reach the effect of insulation protection.The
The material of two insulating barriers 35 can be the combination of SiNx, SiOx or its composite laminate.By first
The structure of electrode layer 31 to the second insulating barrier 35 is a complete thin film transistor (TFT) 39, can perform out
The effect closed.
What deserves to be explained is, owing to the material of the first insulating barrier 32 is the non-conductors such as SiNx, SiOx
Material, and the metal material poor adhesive force of the second electrode lay 34, and the material of oxide semiconductor layer 33
Matter is with the semi-conducting material of ionic bond bond, for the metal material and first of the second electrode lay 34
The non-conductive material of insulating barrier 32 all has good tack, can increase by the most between
Two electrode layer 34 and the tacks of the first insulating barrier 32.Additionally, oxide semiconductor layer 33 also may be used
Using as diffusion impervious layer, in case the metal of the second electrode lay 34 above block compound semiconductor layer 33
Ion enters the first insulating barrier 32 below oxide semiconductor layer 33, forms mobile carrier and reduces
The insulation characterisitic of the first insulating barrier 32, and then affect the reliability of semiconductor subassembly.
In addition, the present embodiment uses oxide semiconductor layer 33 replacement general thin film transistor (TFT) base
The intervening metal layer that plate uses, can solve traditional intermediary metal level and produce residue in etchant flow
Problem.Owing to the second electrode lay 34 can be simple layer metallic copper, the selection of etching solution and etching stream
Journey is more simple easily, and the problem being not easy to produce residue.Therefore, compared to prior art,
The yield of the present embodiment thin film transistor base plate is preferable, and its technique is simplified to reduce cost.
It addition, the second insulating barrier 35 has contact hole 38, and position is relative in source portion 34b
The position (as shown in Figure 4) of side.Pixel electrode layer 36 is positioned at above the second insulating barrier 35, and covers
Second insulating barrier 35 of cover and whole contact holes 38, wherein pixel electrode layer 36 passes through
Contact hole 38 down extends and is electrically connected with source electrode 34b, receives and drives signal.The picture of each pixel
Element electrode layer 36 must electrically isolate, and is driven operating display layer with each thin film transistor (TFT) 39
(not shown) is to show grey menu.Complete the structure of the first electrode layer 31 to pixel electrode layer 36
I.e. complete the major part (other layers can be increased not to have other characteristics) of thin film transistor base plate.
Thin film transistor base plate is the main body of display floater, and (such as liquid crystal, Organic Electricity excites collocation display layer
Luminescent material, electrophoresis particle etc.), colored filter substrate become a display floater.And display floater
Can arrange in pairs or groups drive circuit and appearance member becomes a display.
It should also be noted that oxide semiconductor layer 33 is in the present embodiment, its edge the most slightly protrudes from
The source electrode 34b of (also can trim) the second electrode lay 34, drain electrode 34a and the edge of data wire 42,
Additionally, be positioned at the oxide semiconductor 33 below data wire 42 can be electrical connected or have the second interval
S2 and be electrically not attached to (as shown in Figure 9).It should be noted that oxide semiconductor layer 33 in
In other embodiments, can not be defined, and be that flood covers the first insulating barrier 32.
Please referring next to Fig. 5, Fig. 5 is the thin film transistor (TFT) of the liquid crystal panel of another embodiment of the present invention
The profile of substrate 3 '.Compared to the embodiment of Fig. 4, the thin film transistor (TFT) 39 ' of Fig. 5 also includes
Etching stopping layer 37 is formed on oxide semiconductor layer 33, and corresponding to the position of gate portion 31a
Put and between source portion 34b and drain portion 34a, in order to close oxide semiconductor layer 33 not
The opening covered by source portion 34b and drain portion 34a, to protect in etching process etching solution to oxidation
Thing semiconductive layer 33 carries on the back the injury of passage, thus promotes yield and the conductive characteristic of thin film transistor (TFT).Erosion
The material carving stop-layer 37 can be the combination of SiNx, SiOx or its composite laminate.
Refer to the profile that Fig. 6, Fig. 6 are the thin film transistor base plates of another embodiment of the present invention.
Compared to the embodiment of Fig. 4, thin film transistor (TFT) 39 " oxide semiconductor layer 33 ' be that flood is covered
Cover the first insulating barrier 32, and be not defined.
Refer to the profile that Fig. 7, Fig. 7 are the thin film transistor base plates of another embodiment of the present invention.
Compared to the embodiment of Fig. 5, thin film transistor (TFT) 39 " ' oxide semiconductor layer 33 ' be flood
Cover the first insulating barrier 32, and be not defined.
Sequentially the most brilliant with reference to the thin film that Fig. 8 to Figure 11 and Fig. 4, Fig. 8 to Figure 11 are display
The plane graph of the semi-finished product that the part steps of the manufacture method of body pipe substrate is formed.However, it is necessary to say
Bright, following manufacture method is only the one of which embodiment of the present invention, and its step is with order all
It is not used to limit the present invention.
In Fig. 8, first, it is provided that substrate 30.Then, form patterning and there is multiple gate portion
31a and multi-strip scanning line 41(wire portion) the first electrode layer 31 on substrate 30, wherein scan
Line 41 axially arranges along first, and every scan line 41 is electrically connected with multiple gate portion 31a.Connect
, formed the first insulating barrier 32 cover substrate 30, scan line 41 with gate portion 31a.
Then, refer to Fig. 9, form oxide semiconductor layer 33 on the first insulating barrier 32.So
After, oxide semiconductor layer 33 is defined, in other embodiments, it is also possible to increase multiple
Second is spaced S2 or is not defined oxide semiconductor layer 33.
It should also be noted that in other embodiments, it is also possible to include forming etching stopping layer 37 in right
Should be on the oxide semiconductor layer 33 above gate portion.
Then, refer to Figure 10, form the second electrode lay 34 of patterning in oxide semiconductor layer
On 33, the edge of the second electrode lay 34 within the edge of oxide semiconductor layer 33, the second electrode
Layer 34 includes a plurality of data wire 42, multiple drain electrode 34a and the multiple corresponding source being parallel to each other
Pole 34b, has the first interval S1 each other, and wherein data wire 42 axially arranges along second, and often
One data wire 42 is electrically connected with multiple drain electrode 34a.Then, refer to Figure 11, form the second insulation
Layer 35, and define multiple contact hole 38.Finally, refer to Fig. 4, formed corresponding the plurality of
Multiple pixel electrode layers 36 of the thin film transistor (TFT) of pixel region.
Comprehensive the above, the embodiment of the present invention provide a kind of thin film transistor base plate, its display with
Its manufacture method, the second electrode lay of wherein said thin film transistor (TFT) is formed at oxide semiconductor layer
On, and there is between described the second electrode lay and oxide semiconductor layer good tackness.Compared to
Conventional thin film transistor, the embodiment of the present invention use simple copper as the second electrode lay, in eliminating
Jie's metal level, and simple metal etch liquid can be used to define the second electrode lay, therefore have relatively low
Cost, the technique more simplified, preferably yield and preferable degree of stability.
The foregoing is only embodiments of the invention, it is not limited to the patent protection model of the present invention
Enclose.Any those of ordinary skill in the art, without departing from spirit and scope of the invention, is made
Change and retouching equivalence replacement, in being still the scope of patent protection of the present invention.
Claims (18)
1. a thin film transistor base plate, it is characterised in that described thin film transistor base plate includes:
One substrate；
One first electrode layer, is positioned on described substrate, including a wire portion and a gate portion；
One first insulating barrier, covers described first electrode layer；
Monoxide semiconductor layer, is positioned on described first insulating barrier；And
One the second electrode lay, is positioned on described oxide semiconductor layer, including a source portion,
One drain portion and a data wire, described source portion and described drain portion are positioned at and described gate portion
Corresponding two ends；
Wherein, the edge of described the second electrode lay is positioned at the edge of described oxide semiconductor layer
In；
Wherein, described gate portion along described data wire bearing of trend protrude and with described data
Line overlap, and the width being positioned at the described oxide semiconductor layer on described gate portion is big
Width in described data wire.
Thin film transistor base plate the most according to claim 1, it is characterised in that described oxide
Whole of semiconductor layer covers described first insulating barrier.
Thin film transistor base plate the most according to claim 1, it is characterised in that described oxide
Semiconductor layer be ZnO, IZO, IGZO, ITZO, ATZO, HIZO one of which or
A combination thereof.
Thin film transistor base plate the most according to claim 1, it is characterised in that described second electricity
The material of pole layer is monolayer copper.
Thin film transistor base plate the most according to claim 1, it is characterised in that described thin film is brilliant
Body pipe substrate also includes that etching stopping layer, described etching stopping layer are positioned at described oxide and partly lead
The top of body layer.
Thin film transistor base plate the most according to claim 1, it is characterised in that described thin film is brilliant
Body pipe substrate also includes that the second insulating barrier, described second insulating barrier cover described the second electrode lay
With described oxide semiconductor layer.
Thin film transistor base plate the most according to claim 6, it is characterised in that described second exhausted
Edge layer has contact hole, and described contact hole is relative with described source portion.
Thin film transistor base plate the most according to claim 7, it is characterised in that described second exhausted
There is in edge layer pixel electrode layer, described pixel electrode layer via described contact hole toward downward
Stretch and be electrically connected with described source portion.
9. a display, it is characterised in that described display includes:
Drive circuit；
Appearance member；And
Display floater, including thin film transistor base plate, described thin film transistor base plate, including:
One substrate；
One first electrode layer, is positioned on described substrate, including a wire portion and a grid
Portion；
One first insulating barrier, covers described first electrode layer；
Monoxide semiconductor layer, is positioned on described first insulating barrier；And
One the second electrode lay, is positioned on described oxide semiconductor layer, including a source electrode
Portion, a drain portion and a data wire, described source portion and described drain portion are positioned at and institute
State the two ends that gate portion is corresponding；
Wherein, the edge of described the second electrode lay is positioned at described oxide semiconductor layer
In edge；
Wherein, described gate portion is protruded and with described along the bearing of trend of described data wire
Data wire is overlapping, and is positioned at described oxide semiconductor layer on described gate portion
Width is greater than the width of described data wire.
Display the most according to claim 9, it is characterised in that described oxide semiconductor layer
Whole covers described first insulating barrier.
11. display according to claim 9, it is characterised in that described oxide semiconductor layer
One of them or a combination thereof for ZnO, IZO, IGZO, ITZO, ATZO, HIZO.
12. display according to claim 9, it is characterised in that the material of described the second electrode lay
Material is copper.
13. display according to claim 9, it is characterised in that described thin film transistor base plate
Also include that etching stopping layer, described etching stopping layer are positioned on described oxide semiconductor layer.
14. display according to claim 9, it is characterised in that described thin film transistor base plate
Also include that the second insulating barrier, described second insulating barrier cover described the second electrode lay and described oxygen
Compound semiconductor layer.
15. display according to claim 14, it is characterised in that described second insulating barrier has
Contact hole, described contact hole is relative with described source portion.
16. display according to claim 15, it is characterised in that have on described second insulating barrier
Having pixel electrode layer, described pixel electrode layer down extends via described contact hole and electrical
Connect described source portion.
The manufacture method of 17. 1 kinds of thin film transistor base plates, it is characterised in that described thin film transistor (TFT) base
The manufacture method of plate comprises the following steps:
One substrate is provided；
Forming one first electrode layer on the substrate, described first electrode layer includes a wire
Portion and a gate portion；
Forming one first insulating barrier, described first insulating barrier covers described first electrode layer；
Described first insulating barrier is formed monoxide semiconductor layer；
Described oxide semiconductor layer is formed a second electrode lay, described the second electrode lay
Including a source portion, a drain portion and a data wire, and described source portion and described drain portion
It is positioned at the two ends corresponding with described gate portion；And
Form the second insulating barrier, described second insulating barrier cover described oxide semiconductor layer with
Described the second electrode lay；
Forming contact hole on described second insulating barrier, wherein said contact hole is with described
Source portion is relative；
Forming pixel electrode layer on described second insulating barrier, wherein said pixel electrode layer leads to
Cross described contact hole and be electrically connected with described source portion；
Wherein, the edge of described the second electrode lay is positioned at the edge of described oxide semiconductor layer
In；
Wherein, described gate portion along described data wire bearing of trend protrude and with described data
Line overlap, and the width being positioned at the described oxide semiconductor layer on described gate portion is big
Width in described data wire.
The manufacture method of 18. thin film transistor base plates according to claim 17, it is characterised in that
The manufacture method of described thin film transistor base plate also includes:
Etching stopping layer, wherein said etching is formed above described oxide semiconductor layer
Stop-layer is positioned on described oxide semiconductor layer.
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