CN1567077A

CN1567077A - Film transistor LCD and method for manufacturing same

Info

Publication number: CN1567077A
Application number: CN 03149249
Authority: CN
Inventors: 来汉中
Original assignee: AU Optronics Corp
Current assignee: AU Optronics Corp
Priority date: 2003-06-16
Filing date: 2003-06-16
Publication date: 2005-01-19

Abstract

This invention provides a thin film transistor LCD and its process method. This thin film transistor LCD comprises a thin film transistor base plate on the color filter layer, wherein, the thin film transistor is located on the color filter layer and the data line is located between the color filter layer and down base plate and the thin film transistor is coupled between the data line and the picture element electrode.

Description

Thin Film Transistor-LCD and manufacture method thereof

Technical field

Relevant a kind of colour liquid crystal display device of the present invention and manufacture method thereof.Particularly about a kind of integration switches assembly (for example thin film transistor (TFT)), chromatic filter layer and light-shielding structure of comprising in the colour liquid crystal display device of same substrate.

Background technology

Usually, thin film transistor (TFT) (thin film transistor, TFT) LCD (liquid crystaldisplay, LCD) comprise infrabasal plate, be formed at the thin film transistor (TFT) (as switch module) on the infrabasal plate, the upper substrate relative, the liquid crystal layer that is formed at the red-green-blue color filter layer on the upper substrate and is sealed in the space between two substrates with infrabasal plate.

Fig. 1 illustrates the sectional view of traditional Thin Film Transistor-LCD (TFT LCD).

In the drawings, etch stop layer counter-rotating staggered (seven road mask process) (etch stopper inversestaggered type) thin film transistor (TFT) 15 and pixel electrode 8 are arranged on the infrabasal plate 1.Pixel electrode 8 is made up of indium tin oxide (ITO).On thin film transistor (TFT) 15, can cover layer protective layer 9, in order to protective film transistor 15.This thin film transistor (TFT) 15 comprises grid 2a, source electrode 7a and drain electrode 7b.Storage electrode 2b is arranged on the identical plane with grid 2a, and pixel electrode 8 and insulation course 3 are arranged between storage electrode 2b and the pixel electrode 8, uses to constitute a capacitor 17.Black matrix" (black matrix) 12 in order to shading is arranged on upper substrate 11, in order to avoid the color interference of LCD.This black matrix" 12 is formed on the zone corresponding to thin film transistor (TFT) 15 and capacitor 17, and this chromatic filter layer 13 is arranged on the zone corresponding to pixel electrode.Public electrode 14 is arranged on black matrix" 12 and the chromatic filter layer 13, and its material is ITO.Among the figure, symbol 4 expression active areas, symbol 5 expression etch stop layers, and symbol 6 expression ohmic contact layers.

Making aspect the Thin Film Transistor-LCD, having a production line to be used for making assembly on the infrabasal plate 1, its technology is as described below.Thin film transistor (TFT) 15 is arranged on the infrabasal plate 1.During formation thin film transistor (TFT) 15, and before forming source electrode 7a and drain electrode 7b, on infrabasal plate 1, form pixel electrode 8.Afterwards, form protective seam 9 above it, in order to protective film transistor 15.Online in another production, be used on upper substrate 11, forming black matrix" 12 corresponding to thin film transistor (TFT) 15 and capacitor 17.And on upper substrate 11, form chromatic filter layer 13 corresponding to pixel electrode 8.Afterwards, on whole black matrix" 12 and chromatic filter layer 13, form public electrode 14.

According to above-mentioned manufacture method, making Thin Film Transistor-LCD must two production line, and one in order to make thin film transistor (TFT) 15 on infrabasal plate 1, and another is in order to make chromatic filter layer 13 and black matrix" 12 on upper substrate 11.Therefore the cost of investment and manufacturing is quite expensive.

In addition, the infrabasal plate 1 that has the upper substrate 11 of chromatic filter layer 13 and black matrix" 12 and have a thin film transistor (TFT) in combination must provide and can fill the alignment error scope of being permitted when forming display panels.Therefore, it is quite difficult making pixel openings (pixel opening, i.e. aperture opening ratio (opening ratio)) that maximum area is arranged.

Summary of the invention

In view of this, fundamental purpose of the present invention provides a kind of special construction with active array base plate of chromatic filter layer and light-shielding structure.

The invention provides a kind of LCD, it comprises first substrate, have a public electrode second substrate relative with first substrate, be arranged at switch module on first substrate, and the switch module that couples of data line and pixel electrode, the chromatic filter layer between the switch module and first substrate is set and be arranged at chromatic filter layer and first substrate between data line.

Above-mentioned data line also is used for shading.Above-mentioned have chromatic filter layer and light-shielding structure and be arranged at structure between switch module (for example TFT) and the glass substrate, is referred to as the TFT-ON-CF substrate.

The source electrode and the data line (M1) that are arranged at the switch module on the chromatic filter layer are connected to local lead.This local lead can be the independently lead that is arranged on the protective seam, connects source electrode and data line via two openings.It can also be the local lead that extends to source electrode.

If local lead is a lead independently, then this local lead all is identical transparent conductive materials with pixel electrode.Gate insulator can be positioned between protective seam and the overlayer.

For extending for the local lead of source electrode, source electrode can be metal material or transparent conductive material.

If source electrode is a metal material, i.e. M3, then drain electrode can be placed on the pixel electrode or under.In the case, gate insulator should roughly be positioned on the whole base plate.

If source electrode is a transparent conductive material, then drain electrode has extension as pixel electrode usefulness (as the 8th embodiment).In the case, gate insulator should roughly be positioned on the whole base plate.

The present invention also provides a kind of method of making LCD, it comprises provides a substrate, square thereon one-tenth one data line, and on data line and substrate, form chromatic filter layer, then cover an overlayer on chromatic filter layer, and on overlayer, form switch module, and this switch module is coupled between data line and the pixel electrode.

The source electrode that is arranged at the switch module on the chromatic filter layer is electrically connected with data line by local lead.This local lead can be by the M3 technology with an opening, or the pixel electrode technology with one or two openings is made.

If local lead is defined by the 3rd metal level M3, then this local lead extension that is source electrode extends to the contact data line.The opening that exposes the data line surface is formed in overlayer and the gate insulator, and gate insulator does not define the active area pattern.Moreover pixel electrode can form before M3 technology, or forms after M3 technology.

If local lead is defined by the transparency conducting layer in the pixel electrode technology, and this local lead needs one opening, then this local lead and pixel electrode define formation simultaneously.This local lead is the extension of source electrode, extends to the contact data line; And pixel electrode has extension, as drain electrode.Therefore, save M3 technology one.Moreover the opening that exposes data line is formed in the overlayer, and gate insulator is not patterned in the active area Patternized technique.

If local lead is defined by the transparency conducting layer in the pixel electrode technology, and these local lead needs two openings, then this local lead and pixel electrode define formation simultaneously, and this two opening exposes the surface of source electrode and the surface of data line respectively.This two opening can by together or the twice opening form technology and make.With regard to the former one opening formation technology; this opening forms technology and just carries out after forming protective seam; and opening is formed in protective seam and the overlayer; perhaps be formed in protective seam, gate insulator and the overlayer, whether and decide whether its grid utmost point insulation course carry out patterning in the active area Patternized technique.With regard to the latter's twice opening formation technology, the first road opening forms technology and carries out after forming overlayer and before forming gate line; The second road opening forms technology and carries out after forming protective seam, and is formed in the protective seam, or is formed in protective seam and the gate insulator, and whether whether its grid utmost point insulation course carries out patterning in the active area Patternized technique decides.

Because chromatic filter layer and light-shielding structure are formed on the active array base plate, therefore need not consider the combination nargin of upper and lower base plate, so can simplify technology and improve pixel aperture ratio.

Description of drawings

For above and other objects of the present invention, feature and advantage can be become apparent, cited below particularlyly go out preferred embodiment, and conjunction with figs., be described in detail below, wherein:

Fig. 1 is the sectional view that traditional Thin Film Transistor-LCD (TFT LCD) is shown;

Fig. 2 A to Fig. 2 G is the diagrammatic cross-section of formation method of TOC substrate of the LCD of expression first embodiment of the invention;

Fig. 3 A to Fig. 3 G is the diagrammatic cross-section of formation method of TOC substrate of the LCD of expression second embodiment of the invention;

Fig. 4 A to Fig. 4 G is the diagrammatic cross-section of formation method of TOC substrate of the LCD of expression third embodiment of the invention;

Fig. 5 A to Fig. 5 E is the diagrammatic cross-section of formation method of TOC substrate of the LCD of expression fourth embodiment of the invention;

Fig. 6 A to Fig. 6 H is the diagrammatic cross-section of formation method of TOC substrate of the LCD of expression fifth embodiment of the invention;

Fig. 7 A to Fig. 7 H is the diagrammatic cross-section of formation method of TOC substrate of the LCD of expression sixth embodiment of the invention, and wherein the protective seam of Fig. 7 H is that thickness is thicker and have a smooth surface;

Fig. 8 is the diagrammatic cross-section of formation method of TOC substrate of the LCD of sixth embodiment of the invention, and wherein profile of square structure is conformal down for protective seam and its;

Fig. 9 A is the LCD structure top view with TOC substrate of expression seventh embodiment of the invention;

Fig. 9 B is the B-B tangential profile figure of Fig. 9 A;

Fig. 9 C is the C-C tangential profile figure of Fig. 9 A;

Figure 10 A is the LCD structure top view with TOC substrate of expression eighth embodiment of the invention;

Figure 10 B is the B-B tangential profile figure of Figure 10 A;

Figure 10 C is the C-C tangential profile figure of Figure 10 A;

Figure 11 A is the LCD structure top view with TOC substrate of expression ninth embodiment of the invention;

Figure 11 B is the B-B tangential profile figure of Figure 11 A;

Figure 11 C is the C-C tangential profile figure of Figure 11 A;

Figure 12 A is the LCD structure top view with TOC substrate of expression tenth embodiment of the invention;

Figure 12 B is the B-B tangential profile figure of Figure 12 A; And

Figure 12 C is the C-C tangential profile figure of Figure 12 A.

Description of reference numerals in the accompanying drawing is as follows:

1～infrabasal plate, 4～active area

2a～grid 2b～storage electrode

3～insulation course, 5～etch stop layer

6～ohmic contact layer 7a～source electrode

7b～drain electrode 8～pixel electrode

9～protective seam, 12～black matrix"

13～chromatic filter layer, 14～public electrode

15～thin film transistor (TFT), 17～capacitor

100,200,300,400,500,600～substrate

102,202,302,402,502,602～data line

104,204,304,404,504,604～chromatic filter layer

106,206,306,406,506,606～overlayer

108,208,308,408,508,608～gate line

110,210,310,410,510,610～gate insulator

112,212,312,412,512,612～semiconductor layer

114,214,314,414,514,614～n-doped layer

116,216,316,516,616～metal level

118,218,318,418,518,618～protective seam

120,122,123,230,220,222,223～opening

320,322,323,430,530,630～opening

116D, 216D, 316D, 516D, 616D～drain electrode

116S, 216S, 316S, 516S, 616S～source electrode

124,224,324,424,524,624～pixel electrode

126,226,326,426～local lead

708,808,908,1008～gate electrode

710,810,910,1010～gate insulator

716S, 916S, 1016S～source electrode

716D, 916D, 1016D～drain electrode

712,812,912,1012～semiconductor layer

718,818,918,1018～protective seam

702,802,902,1002～data line

704,804,904,1004～chromatic filter layer

700,800,900,1000～infrabasal plate

706,806,906,1006～overlayer

724,824,924,1024～pixel electrode

726,826～local lead

720,722,723,920～opening

740,840,940,1040～relatively substrates

742,842,942,1042～transparent common electrode

750,850,950,1050～liquid crystal layer

Embodiment

The invention provides a kind of structure with active array base plate of chromatic filter layer and light shield layer, and it is arranged between thin film transistor (TFT) (TFT) and the glass substrate, this structure is called chromatic filter layer upper film transistor-type (TFT-ON-CF) substrate, is designated hereinafter simply as the TOC substrate.

Among the following embodiment, the structure and the manufacture method thereof of TOC substrate will be introduced in detail.

Form the method for TOC substrate

First embodiment

Fig. 2 A to Fig. 2 G represents the diagrammatic cross-section of formation method of TOC substrate of the LCD of first embodiment of the invention.

Please refer to Fig. 2 A, a substrate 100 at first is provided, its material is transparent insulating material, for example glass.Afterwards, form data line 102 on substrate 100, this data line is formed by the first metal layer (M1) definition, and it is also used as shading.This data line 102 can be the alloy of Al, Cr, Mo, Ta, Ti, Cu or its combination.Chromatic filter layer 104 is formed on data line 102 and the substrate 100, and wherein chromatic filter layer 104 comprises three kinds of main colors: red (R), blue (B) and green (G), and correspond respectively to pixel region.

Then please refer to Fig. 2 B, data line 102 and chromatic filter layer 104 are covered by an overlayer 106, and its material is high temperature resistant organic or siliceous dielectric materials.Wherein, thin film transistor (TFT) is formed on overlayer 106 tops, and with as switch module usefulness, its formation method is shown in Fig. 2 C to Fig. 2 E.

Then please refer to Fig. 2 C, form second metal level (M2) above overlayer 106, its material for example is Al or Al alloy.After utilizing the photoetching etching to define this second metal level, form gate line 108.This gate line 108 has teat, uses as the gate electrode of thin film transistor (TFT).

Then please refer to Fig. 2 D, on gate line 108 and overlayer 106, form a gate insulator 110.Then, on gate insulator 110, form semiconductor layer 112 and n-doped layer 114 in regular turn.Wherein the material of gate insulator 110 can be a silicon nitride, and the material of semiconductor layer 112 can be amorphous silicon or polysilicon.Then, by photoetching etching definition n-doped layer 114/ semiconductor layer 112, to define the assembly district.

Then please refer to Fig. 2 E, form the 3rd metal level (M3) 116 on the n-of patterning doped layer 114 and gate insulator 110, its material can be Cr or Cr alloy.Then, with metal level 116 and n-doped layer 114 patternings,, and therefore expose a part of semiconductor layer 112 with formation source electrode/drain electrode and source/drain.

Then please refer to Fig. 2 F, form protective seam 118 on metal level 116, semiconductor layer 112 and gate insulator 110, its material for example is a silicon nitride.

Please refer to Fig. 2 G; then carry out etch process; with formation opening 120 and 123 in protective seam 118, and in protective seam 118, gate insulator 110 and overlayer 106, form opening 122, use the surface that exposes drain electrode 116D, source electrode 116S and data line 102 respectively.Form the layer of transparent conductive layer in protective seam 118

upper sheds

120 and 122, its material for example is an indium tin oxide (ITO).Then transparency conducting layer is carried out etching, be connected to the pixel electrode 124 of drain electrode 116D via opening 120, and form the local lead 126 that is connected source electrode 116S and data line 102 via opening 122 with 123 with formation.Therefore make the TOC substrate.

Then carry out the follow-up upper substrate technology and the technology of filling liquid crystal with public electrode.

Second embodiment

Fig. 3 A to Fig. 3 G represents the diagrammatic cross-section of formation method of TOC substrate of the LCD of second embodiment of the invention.

Please refer to Fig. 3 A, a substrate 200 at first is provided, its material is transparent insulation material, for example glass.Afterwards, form data line 202 on substrate 200, this data line is formed by the first metal layer (M1) definition, and it is also used as shading.This data line 202 can be the alloy of Al, Cr, Mo, Ta, Ti, Cu or its combination.Chromatic filter layer 204 is formed on data line 202 and the substrate 200, and wherein chromatic filter layer 204 comprises three kinds of main colors: red (R), blue (B) and green (G), and correspond respectively to pixel region.

Then please refer to Fig. 3 B, data line 202 and chromatic filter layer 204 are covered by an overlayer 206, and its material is sensitization or non-sensitization dielectric materials.Then this overlayer 206 is carried out patterning, to form the surface that opening 230 exposes segment data line 202.Then, thin film transistor (TFT) is formed on overlayer 206 tops, and with as switch module usefulness, its formation method is shown in Fig. 3 C to Fig. 3 D.

Then please refer to Fig. 3 C, form second metal level (M2) above overlayer 206, its material for example is Al or Al alloy.After utilizing the photoetching etching to define this second metal level, form gate line 208.This gate line 208 has teat, uses as the gate electrode of thin film transistor (TFT).Afterwards, on gate line 208 and overlayer 206, form a gate insulator 210.Then, on gate insulator 210, form semiconductor layer 212 and n-doped layer 214 in regular turn.Wherein the material of gate insulator 210 can be a silicon nitride, and the material of semiconductor layer 212 can be amorphous silicon or polysilicon.Then, by photoetching etching definition n-doped layer 214/ semiconductor layer 212, to define the assembly district.

Then please refer to Fig. 3 D, form the 3rd metal level (M3) 216 on the n-of patterning doped layer 214 and gate insulator 210, its material can be Cr or Cr alloy.Then, with metal level 216 and n-doped layer 214 patternings, forming source electrode/drain electrode and source/drain, and the semiconductor layer 212 that therefore exposes a part is raceway groove.

Then please refer to Fig. 3 E, form protective seam 218 on metal level 216, semiconductor layer 212 and gate insulator 210, its material for example is a silicon nitride.

Please refer to Fig. 3 F; then carry out etch process; with formation opening 220 and 223 in protective seam 218, and in protective seam 218 and gate insulator 210, form opening 222, use the surface that exposes drain electrode 216D, source electrode 216S and data line 202 respectively.Form the layer of transparent conductive layer and insert in opening 220,223 and 222 on protective seam 218, its material for example is an indium tin oxide (ITO).Then transparency conducting layer is carried out etching, be connected to the pixel electrode 224 of drain electrode 216D via opening 220, and form the local lead 226 that is connected source electrode 216S and data line 202 via opening 222 with 223 with formation.Therefore make the TOC substrate.

The 3rd embodiment

Fig. 4 A to Fig. 4 G represents the diagrammatic cross-section of formation method of TOC substrate of the LCD of third embodiment of the invention.

Please refer to Fig. 4 A, a substrate 300 at first is provided, its material is transparent insulating material material, for example glass.Afterwards, form data line 302 on substrate 300, this data line is formed by the first metal layer (M1) definition, and it is also used as shading.This data line 302 can be the alloy of Al, Cr, Mo, Ta, Ti, Cu or its combination.Chromatic filter layer 304 is formed on data line 302 and the substrate 300, and wherein chromatic filter layer 304 comprises three kinds of main colors: red (R), blue (B) and green (G), and correspond respectively to pixel region.

Then please refer to Fig. 4 B, data line 302 and chromatic filter layer 304 are covered by an overlayer 306, and its material can be sensing optical activity or non-sensing optical activity dielectric materials.Then this overlayer 306 is carried out patterning, to form the surface that opening 330 exposes segment data line 302.Then, thin film transistor (TFT) is formed on overlayer 306 tops, and with as switch module usefulness, its formation method is shown in Fig. 4 C to Fig. 4 D.

Then please refer to Fig. 4 C, form second metal level (M2) above overlayer 306, its material for example is Al or Al alloy.After utilizing the photoetching etching to define this second metal level, form gate line 308.This gate line 308 has teat, uses as the gate electrode of thin film transistor (TFT).Afterwards, on gate line 308 and overlayer 306, form a gate insulator 310.Then, on gate insulator 310, form semiconductor layer 312 and n-doped layer 314 in regular turn.Wherein the material of gate insulator 310 can be a silicon nitride, and the material of semiconductor layer 312 can be amorphous silicon or polysilicon.Then, by photoetching etching definition n-doped layer 314/ semiconductor layer 312/ gate insulator 310, to define the assembly district.

Then please refer to Fig. 4 D, form the 3rd metal level (M3) 316 on the n-of patterning doped layer 314 and gate insulator 310, its material can be Cr or Cr alloy.Then, with metal level 316 and n-doped layer 314 patternings,, and therefore expose a part of semiconductor layer 312 with formation source electrode/drain electrode and source/drain.

Then please refer to Fig. 4 E, form protective seam 318 on metal level 316, semiconductor layer 312 and gate insulator 310, its material for example is a silicon nitride.

Please refer to Fig. 4 F, then carry out etch process,, use the surface that exposes drain electrode 316D, source electrode 316S and data line 302 respectively in protective seam 318, to form opening 320,323 and 322.

Then please refer to Fig. 4 G, form the layer of transparent conductive layer and insert in opening 320,323 and 322 on protective seam 318, its material for example is an indium tin oxide (ITO).Then transparency conducting layer is carried out etching, be connected to the pixel electrode 324 of drain electrode 316D via opening 320, and form the local lead 326 that is connected source electrode 316S and data line 302 via opening 322 with 323 with formation.Therefore make the TOC substrate.

The 4th embodiment

Fig. 5 A to Fig. 5 E represents the diagrammatic cross-section of formation method of TOC substrate of the LCD of fourth embodiment of the invention.

Please refer to Fig. 5 A, a substrate 400 at first is provided, its material is transparent insulation material, for example glass.Afterwards, form data line 402 on substrate 400, this data line is formed by the first metal layer (M1) definition, and it is also used as shading.This data line 402 can be the alloy of Al, Cr, Mo, Ta or its combination.Chromatic filter layer 404 is formed on data line 402 and the substrate 400, and wherein chromatic filter layer 404 comprises three kinds of main colors: red (R), blue (B) and green (G), and correspond respectively to pixel region.

Then please refer to Fig. 5 B, data line 402 and chromatic filter layer 404 are covered by an overlayer 406, and its material can be sensing optical activity or non-sensing optical activity dielectric materials.Then, form second metal level (M2) above overlayer 406, its material for example is Al or Al alloy.After utilizing the photoetching etching to define this second metal level, form gate line 408.This gate line 408 has teat, uses as the gate electrode of thin film transistor (TFT).Afterwards, on gate line 408 and overlayer 406, form a gate insulator 410.Then, on gate insulator 410, form semiconductor layer 412 and n-doped layer 414 in regular turn.Wherein the material of gate insulator 410 can be a silicon nitride, and the material of semiconductor layer 412 can be amorphous silicon or polysilicon.Then, by photoetching etching definition n-doped layer 414/ semiconductor layer 412, to define the assembly district.

Then please refer to Fig. 5 C, gate insulator 410 and overlayer 406 are carried out patterning, with in wherein forming the surface that opening 430 exposes segment data line 402.

Then please refer to Fig. 5 D, form a transparency conducting layer on the n-of patterning doped layer 414 and gate insulator 410, its material for example is an indium tin oxide (ITO).Then,, and therefore expose a part of semiconductor layer 412, make n-doped layer 414 form source S/drain D transparency conducting layer and n-doped layer 414 patternings.This transparency conducting layer then forms the pixel electrode 424 that directly is covered in drain D surface and directly contacts with drain D, and defines via opening 430 connection data lines 402 and source S and the local lead 426 that directly contacts with source S.

Then please refer to Fig. 5 E, form layer protective layer 418 and cover on the transparency conducting layer of active area, and in order to protect the channel region of semiconductor layer 412.This protective seam 418 can be that thickness is thicker and have the structure of flat surfaces, or thinner thickness and with the profile of its below assembly conformal structure that rises and falls.In the drawings, be to be example with the former.Therefore make the TOC substrate.

In this 4th embodiment, saved M3 technology one.It is that process integration with pixel electrode and source electrode/drain electrode is in same step, make pixel electrode 424 extend to drain D and replace drain electrode, and local lead 426 forms simultaneously with pixel electrode 424, and extends to whole source S surface and the replacement source electrode.

The 5th embodiment

Fig. 6 A to Fig. 6 H is the diagrammatic cross-section of formation method of TOC substrate of the LCD of expression fifth embodiment of the invention.

Please refer to Fig. 6 A, a substrate 500 at first is provided, its material is transparent insulation material, for example glass.Afterwards, form data line 502 on substrate 500, this data line is formed by the first metal layer (M1) definition, and it is also used as shading.This data line 502 can be the alloy of Al, Cr, Mo, Ta or its combination.Chromatic filter layer 504 is formed on data line 502 and the substrate 500, and wherein chromatic filter layer 504 comprises three kinds of main colors: red (R), blue (B) and green (G), and correspond respectively to pixel region.

Then please refer to Fig. 6 B, data line 502 and chromatic filter layer 504 are covered by an overlayer 506, and its material can be sensing optical activity or non-sensing optical activity dielectric materials.Then, thin film transistor (TFT) is formed on overlayer 506 tops, and with as switch module usefulness, its formation method is shown in Fig. 6 C to Fig. 6 F.

Then please refer to Fig. 6 C, form second metal level (M2) above overlayer 506, its material for example is Al or Al alloy.After utilizing the photoetching etching to define this second metal level, form gate line 508.This gate line 508 has teat, uses as the gate electrode of thin film transistor (TFT).Afterwards, on gate line 508 and overlayer 506, form a gate insulator 510.Then, on gate insulator 510, form semiconductor layer 512 and n-doped layer 514 in regular turn.Wherein the material of gate insulator 510 can be a silicon nitride, and the material of semiconductor layer 512 can be amorphous silicon or polysilicon.

Please refer to Fig. 6 D, then, by photoetching etching definition n-doped layer 514/ semiconductor layer 512, to define the assembly district.

Then please refer to Fig. 6 E, in overlayer 516 and gate insulator 510, form opening 530, and expose the surface of segment data line 502.

Then please refer to Fig. 6 F, form the 3rd metal level (M3) 516 on the n-of patterning doped layer 514 and gate insulator 510, and insert opening 530 and contact with data line 502, its material can be Cr or Cr alloy.Then,, and therefore expose a part of semiconductor layer 512, make n-doped layer 514 form source S/drain D metal level 516 and n-doped layer 514 patternings.Roughly form two patterns as for 516 of metal levels, first source electrode 516S, and extend in the opening 530, and directly contact with data line 502; It two is drain electrode 516D.

Then please refer to Fig. 6 G, form protective seam 518 on source electrode 516S, drain electrode 516D, semiconductor layer 512 and gate insulator 510, its material for example is a silicon nitride.

Please refer to Fig. 6 H, then carry out etch process,, use the surface that exposes drain electrode 516D in protective seam 518, to form opening 520.Then, form the layer of transparent conductive layer and insert in the opening 520 on protective seam 518, its material for example is an indium tin oxide (ITO).Then transparency conducting layer is carried out etching, to form the pixel electrode 524 that is connected to drain electrode 516D via opening 520.Therefore make the TOC substrate.

In this 5th embodiment, M3 technology was carried out before forming pixel electrode 524.And the local lead that connects source electrode and data line 502 is the extension of source electrode 516S.

The 6th embodiment

Fig. 7 A to Fig. 7 H is the diagrammatic cross-section of formation method of TOC substrate of the LCD of expression sixth embodiment of the invention.

Please refer to Fig. 7 A, a substrate 600 at first is provided, its material is transparent insulation material, for example glass.Afterwards, form data line 602 on substrate 600, this data line is formed by the first metal layer (M1) definition, and it is also used as shading.This data line 602 can be the alloy of Al, Cr, Mo, Ta or its combination.Chromatic filter layer 604 is formed on data line 602 and the substrate 600, and wherein chromatic filter layer 604 comprises three kinds of main colors: red (R), blue (B) and green (G), and correspond respectively to pixel region.

Then please refer to Fig. 7 B, data line 602 and chromatic filter layer 604 are covered by an overlayer 606, and its material can be sensing optical activity or non-sensing optical activity dielectric materials.

Then please refer to Fig. 7 C, form second metal level (M2) above overlayer 606, its material for example is Al or Al alloy.After utilizing the photoetching etching to define this second metal level, form gate line 608.This gate line 608 has teat, uses as the gate electrode of thin film transistor (TFT).Afterwards, on gate line 608 and overlayer 606, form a gate insulator 610.Then, on gate insulator 610, form semiconductor layer 612 and n-doped layer 614 in regular turn.Wherein the material of gate insulator 610 can be a silicon nitride, and the material of semiconductor layer 612 can be amorphous silicon or polysilicon.

Please refer to Fig. 7 D, then, by photoetching etching definition n-doped layer 614/ semiconductor layer 612, to define the assembly district.Then, in gate insulator 610 and overlayer 606, form opening 630, to expose the surface of segment data line 602.

Then please refer to Fig. 7 E, form a transparency conducting layer on gate insulator 610, its material for example is an indium tin oxide (ITO).Afterwards, define this transparency conducting layer, to form pixel electrode 624 at pixel region.

Then please refer to Fig. 7 F, form the 3rd metal level (M3) 616 on the n-of patterning doped layer 614, pixel electrode 624 and gate insulator 610, and insert opening 630 and contact with data line 602, its material can be Cr or Cr alloy.Then,, and therefore expose a part of semiconductor layer 612, make n-doped layer 614 form source S/drain D metal level 616 and n-doped layer 614 patternings.Roughly form two patterns as for 616 of metal levels, first source electrode 616S, and extend in the opening 630, and directly contact with data line 602; It two is drain electrode 616D, and is connected with pixel electrode 624.

Then please refer to Fig. 7 G, form protective seam 618 and cover whole base plate.At this, protective seam 618 is forming pixel electrode 624 back formation.

Please refer to Fig. 7 H, then define protective seam 618, to expose the surface of pixel electrode 624, anticipate promptly, protective seam 618 covers source electrode 616S, drain electrode 616D and semiconductor layer 612.Therefore make the TOC substrate.

In above-mentioned technology, protective seam 618 thickness are thicker and have a smooth surface.But, protective seam 628 can also be the conformal rete of profile that descends square structure with it, as shown in Figure 8.

In this 6th embodiment, M3 technology is carried out after forming pixel electrode 624.And the local lead that connects source electrode and data line 602 is the extension of source electrode 616S.

Generally speaking, place the source electrode of the switch module of chromatic filter layer top, and define and also in order to the data line of shading, both are connected by local lead by the first metal layer M1.As for the formation of this local lead, can be by M3 technology with an opening, or have the pixel electrode technology of one or two openings.

If local lead is defined by the 3rd metal level M3, then this local lead extension that is source electrode extends to the contact data line.The opening that exposes the data line surface is formed in overlayer and the gate insulator, and gate insulator do not define the active area pattern, for example the disclosed technology of the 5th and six embodiment.Moreover pixel electrode can form (as the 6th embodiment) before M3 technology, or forms (as the 5th embodiment) after M3 technology.

If local lead is defined by the transparency conducting layer in the pixel electrode technology, and this local lead needs one opening, then this local lead and pixel electrode define formation simultaneously.This local lead is the extension of source electrode, extends to the contact data line; And pixel electrode has extension, as drain electrode.Therefore, save M3 technology one.Moreover the opening that exposes data line is formed in the overlayer, and gate insulator is not patterned in the active area Patternized technique.Above situation is the disclosed technology of the 4th embodiment for example.

If local lead is defined by the transparency conducting layer in the pixel electrode technology, and these local lead needs two openings, then this local lead and pixel electrode define formation simultaneously, and this two opening exposes the surface of source electrode and the surface of data line respectively.This two opening can by together or the twice opening form technology and make.With regard to the former one opening formation technology; this opening forms technology and just carries out after forming protective seam; and opening is formed in protective seam and the overlayer; perhaps be formed in protective seam, gate insulator and the overlayer, whether and decide whether its grid utmost point insulation course carry out patterning in the active area Patternized technique.Gate insulator does not have the situation of active area pattern, for example first embodiment.With regard to the latter's twice opening formation technology, the first road opening forms technology and carries out after forming overlayer and before forming gate line; The second road opening forms technology and carries out after forming protective seam, and is formed in the protective seam, or is formed in protective seam and the gate insulator, and whether whether its grid utmost point insulation course carries out patterning in the active area Patternized technique decides.Gate insulator has the situation of active area pattern, for example the 3rd embodiment; Gate insulator does not have the situation of active area pattern, for example second embodiment.

LCD structure with TOC substrate

The 7th embodiment

Fig. 9 A is the LCD structure top view with TOC substrate of expression seventh embodiment of the invention.Fig. 9 B and Fig. 9 C are respectively B-B and the C-C tangential profile figure of Fig. 9 A.

Switch module, thin film transistor (TFT) (TFT) for example, roughly by gate electrode 708, the gate insulator 710 that is positioned at gate electrode 708 tops, source electrode 716S, drain electrode 716D and be positioned at source S/drain D and gate insulator 710 between 712 formations of semiconductor layer (for example amorphous silicon).Wherein, thin film transistor (TFT) is covered by protective seam 718.

Data line 702 and chromatic filter layer (CF) 704 places between TFT and the infrabasal plate 700.Wherein, chromatic filter layer 704 comprises three kinds of main colors: red (R), blue (B) and green (G), and correspond respectively to pixel region.Wherein, data line 702 is also as shading usefulness, and itself and gate line 708 are roughly orthogonal.Gate line 708 has teat P, uses as the gate electrode of thin film transistor (TFT).Data line 702 and chromatic filter layer 704 are covered by overlayer 706, and the TFT of corresponding each pixel places on the overlayer 706.

Shown in Fig. 9 B, gate insulator 710 only places active area, and overlayer 706 directly contacts with protective seam 718.In fact, gate insulator 710 also may extend between overlayer 706 and the protective seam 718.

Pixel electrode 724 by transparent conductive material (for example ITO) is constituted places each pixel region respectively, and is connected to drain electrode 716D via the opening in the protective seam 718 729.The local lead 726 that is made of transparent conductive material (for example ITO), via being connected source electrode 716S and data line 702 at protective seam 718 with opening 722 in the overlayer 706, and each pixel has a corresponding local lead 726.

Shown in Fig. 9 C; because the existence of thick and laminated insulation course (being protective seam 718, overlayer 706 and chromatic filter layer 704) in the structure; make the electric capacity between pixel electrode 724 and the conductive material (being data line 702) below it to reduce; therefore, pixel electrode 724 can overlap with data line 702 parts.So can increase the area of pixel electrode 724, and then increase effective display area.

Aspect the second relative substrate 740, transparent common electrode 742 is covered on whole the

substrate.At substrate

740 and 700 structure top layers alignment film (oriented film) (not shown) is set, and does friction with a specific direction and handle.

Place sept (spacer) between the

substrate

740 and 700, make and keep a specific gap between two substrates, afterwards liquid crystal layer 750 is sealed in therebetween, and

transparency electrode

724 and 742 every liquid crystal layer 750 and alignment film and toward each other.

In this 7th embodiment, data line 702 is M1, and gate line and gate electrode 708 are M2, and source electrode 716S and drain electrode 716D are M3.Local lead 726 and pixel electrode 724 place on the protective seam 718, and are identical transparent conductive material.

The 8th embodiment

Figure 10 A is the LCD structure top view with TOC substrate of expression eighth embodiment of the invention.Figure 10 B and Figure 10 C are respectively B-B and the C-C tangential profile figure of Figure 10 A.

Switch module, thin film transistor (TFT) (TFT) for example, roughly by gate electrode 808, the gate insulator 810 that is positioned at gate electrode 808 tops, source electrode 826, drain electrode 824 and be positioned at source S/drain D and gate insulator 810 between 812 formations of semiconductor layer (for example amorphous silicon).Wherein source electrode 826 and drain electrode 824 are transparent conductive material.The extension of drain electrode 824 is as pixel electrode; And the extension of source electrode 826 extends to data line 802 and contacts.

Thin film transistor (TFT) is covered by protective seam 818, and protective seam 818 for example is SiN.Protective seam 818 among this embodiment only is coated with the source region, and its material can be that thickness is thicker and have the dielectric layer of flat surfaces, or thinner thickness and conform to the SiN that the structure of its below rises and falls.In Figure 10 B, be example with the former.

Data line 802 and chromatic filter layer (CF) 804 places between TFT and the infrabasal plate 800.Wherein, chromatic filter layer 804 comprises three kinds of main colors: red (R), blue (B) and green (G), and correspond respectively to pixel region.Wherein, data line 802 is also as shading usefulness, and itself and gate line 808 are roughly orthogonal.Gate line 808 has teat P, uses as the gate electrode of thin film transistor (TFT).Data line 802 and chromatic filter layer 804 are covered by overlayer 806, and the TFT of corresponding each pixel places on the overlayer 806.

Shown in Figure 10 B, gate insulator 810 only places active area.In fact, gate insulator 810 also may extend to pixel electrode 824 belows.

Shown in Figure 10 C, because the existence of thick and laminated insulation course (being overlayer 806 and chromatic filter layer 804) in the structure, make the electric capacity between pixel electrode 824 and the conductive material (being data line 802) below it to reduce, therefore, pixel electrode 824 can overlap with data line 802 parts.So can increase the area of pixel electrode 824, and then increase effective display area.

Aspect the second relative substrate 840, transparent common electrode 842 is covered on whole the

substrate.At substrate

840 and 800 structure top layers alignment film (oriented film) (not shown) is set, and does friction with a specific direction and handle.

Place sept (spacer) between the

substrate

840 and 800, make and keep a specific gap between two substrates, afterwards liquid crystal layer 850 is sealed in therebetween, and

transparency electrode

824 and 842 every liquid crystal layer 850 and alignment film and toward each other.

In this 8th embodiment, data line 802 is M1, and gate line and gate electrode 808 are M2, and source electrode/local lead 826 and drain electrode/pixel electrode 824 are transparent conductive material layer.

The 9th embodiment

Figure 11 A represents the LCD structure top view with TOC substrate of ninth embodiment of the invention.Figure 11 B and Figure 11 C are respectively B-B and the C-C tangential profile figure of Figure 11 A.

Switch module, thin film transistor (TFT) (TFT) for example, roughly by gate electrode 908, the gate insulator 910 that is positioned at gate electrode 908 tops, source electrode 916S, drain electrode 916D and be positioned at source S/drain D and gate insulator 910 between 912 formations of semiconductor layer (for example amorphous silicon).Thin film transistor (TFT) is covered by protective seam 918.Wherein source electrode 916S and drain electrode 916D are identical materials.The extension of source electrode 916S extends to via gate insulator 910 and contacts with data line 902 with opening 930 in the overlayer 906.

Data line 902 and chromatic filter layer (CF) 904 places between TFT and the infrabasal plate 900.Wherein, chromatic filter layer 904 comprises three kinds of main colors: red (R), blue (B) and green (G), and correspond respectively to pixel region.Wherein, data line 902 is also as shading usefulness, and itself and gate line 908 are roughly orthogonal.Gate line 908 has teat P, uses as the gate electrode of thin film transistor (TFT).Data line 902 and chromatic filter layer 904 are covered by overlayer 906, and the TFT of corresponding each pixel places on the overlayer 906.

Shown in Figure 11 B, gate insulator 910 covers whole base plate.In fact, gate insulator 910 also can only be covered in the active area place.

Shown in Figure 11 C; because the existence of thick and laminated insulation course (being protective seam 918, gate insulator 910, overlayer 906 and chromatic filter layer 904) in the structure; make the electric capacity between pixel electrode 924 and the conductive material (being data line 902) below it to reduce; therefore, pixel electrode 924 can overlap with data line 902 parts.So can increase the area of pixel electrode 924, and then increase effective display area.

Aspect the second relative substrate 940, transparent common electrode 942 is covered on whole the substrate.At substrate 940 and 900 structure top layers alignment film (oriented film) (not shown) is set, and does friction with a specific direction and handle.

Place sept (spacer) between the substrate 940 and 900, make and keep a specific gap between two substrates, afterwards liquid crystal layer 950 is sealed in therebetween, and transparency electrode 924 and 942 every liquid crystal layer 950 and alignment film and toward each other.

In this 9th embodiment, data line 902 is M1, and gate line and gate electrode 908 are M2, and source electrode/local lead 916S and drain electrode 916D are M3.Pixel electrode 924 is disposed on the protective seam 918.

The tenth embodiment

Figure 12 A is the LCD structure top view with TOC substrate of expression tenth embodiment of the invention.Figure 12 B and Figure 12 C are respectively B-B and the C-C tangential profile figure of Figure 12 A.

Switch module, thin film transistor (TFT) (TFT) for example, roughly by gate electrode 1008, the gate insulator 1010 that is positioned at gate electrode 1008 tops, source electrode 1016S, drain electrode 1016D and be positioned at source S/drain D and gate insulator 1010 between 1012 formations of semiconductor layer (for example amorphous silicon).Thin film transistor (TFT) is covered by protective seam 1018.Wherein source electrode 1016S is identical metal material with drain electrode 1016D.The extension of source electrode 1016S extends to data line 1002 and contacts; The extension of drain electrode 1016D extends to the also pixel electrode 1024 of cover part of contact.

Data line 1002 and chromatic filter layer (CF) 1004 places between TFT and the infrabasal plate 1000.Wherein, chromatic filter layer 1004 comprises three kinds of main colors: red (R), blue (B) and green (G), and correspond respectively to pixel region.Wherein, data line 1002 is also as shading usefulness, and itself and gate line 1008 are roughly orthogonal.Gate line 1008 has teat P, uses as the gate electrode of thin film transistor (TFT).Data line 1002 and chromatic filter layer 1004 are covered by overlayer 1006, and the TFT of corresponding each pixel places on the overlayer 1006.

Shown in Figure 12 B, gate insulator 1010 covers whole base plate.In fact, gate insulator 1010 also can only be covered in the active area place.

Pixel electrode 1024 is made of transparent conductive material (for example ITO), and it is arranged on the overlayer 1006 and under drain electrode 1016D.

Shown in Figure 12 C, because the existence of thick and laminated insulation course (being gate insulator 1010, overlayer 1006 and chromatic filter layer 1004) in the structure, make the electric capacity between pixel electrode 1024 and the conductive material (being data line 1002) below it to reduce, therefore, pixel electrode 1024 can overlap with data line 1002 parts.So can increase the area of pixel electrode 1024, and then increase effective display area.

Aspect the second relative substrate 1040, transparent common electrode 1042 is covered on whole the

substrate.At substrate

1040 and 1000 structure top layers alignment film (oriented film) (not shown) is set, and does friction with a specific direction and handle.

Place sept (spacer) between the

substrate

1040 and 1000, make and keep a specific gap between two substrates, afterwards liquid crystal layer 1050 is sealed in therebetween, and

transparency electrode

1024 and 1042 every liquid crystal layer 1050 and alignment film and toward each other.

In this tenth embodiment, data line 1002 is M1, and gate line and gate electrode 1008 are M2, and source electrode/local lead 1016S and drain electrode 1016D are M3.Pixel electrode 1024 is disposed under the drain electrode 1016D.

Generally speaking, place the source electrode of the switch module of chromatic filter layer top, and by the data line of M1 definition, both are connected by local lead.As for this local lead, can be lead independently, be arranged on the protective seam, and be connected to source electrode and data line via two openings; Perhaps, can be the lead that extends from source electrode.

If local lead is a lead independently, then this local lead all is identical transparent conductive materials with pixel electrode.Gate insulator can be positioned over (as the 7th embodiment) between protective seam and the overlayer.

If source electrode is a metal material, i.e. M3, then drain electrode can be placed on (as the 9th embodiment) on the pixel electrode, or is placed on (as the tenth embodiment) under the pixel electrode.In the case, gate insulator should roughly be positioned on the whole base plate.

Though the present invention discloses as above with preferred embodiment; but it is not in order to limit the present invention; under the situation that does not break away from the spirit and scope of the present invention, those skilled in the art can do a little change and retouching, so protection scope of the present invention should be as the criterion so that claims are determined.

Claims

1. Thin Film Transistor-LCD comprises:

One first substrate;

One second substrate, it is relative with this first substrate to have a public electrode;

One switch module is arranged on this first substrate, and is coupled between a data line and the pixel electrode;

One chromatic filter layer is arranged between this switch module and this first substrate; And

This data line is arranged between this chromatic filter layer and this first substrate.

2. Thin Film Transistor-LCD as claimed in claim 1, wherein this data line is a light-shielding structure.

3. Thin Film Transistor-LCD as claimed in claim 1, wherein this switch module is a channel etch pattern thin film transistor (TFT) backlight.

4. Thin Film Transistor-LCD as claimed in claim 1 also comprises: an overlayer is arranged between this chromatic filter layer and this switch module.

5. Thin Film Transistor-LCD as claimed in claim 1 also comprises: a protective seam covers this switch module.

6. Thin Film Transistor-LCD as claimed in claim 1, wherein a local lead connects this switch module and this data line, and should the part lead be transparent conductive material with this pixel electrode.

7. Thin Film Transistor-LCD as claimed in claim 6, wherein this pixel electrode is arranged on this overlayer, and contacts with this overlayer.

8. Thin Film Transistor-LCD as claimed in claim 6, wherein a drain electrode of this switch module has an extension as this pixel electrode usefulness, and the one source pole electrode of this switch module has an extension and contacts with this data line.

9. Thin Film Transistor-LCD as claimed in claim 6, wherein this pixel electrode is arranged on the protective seam, and this protective seam covers this switch module.

10. Thin Film Transistor-LCD as claimed in claim 9, wherein this switch module comprises that a gate insulator is arranged between this protective seam and this overlayer.

11. Thin Film Transistor-LCD as claimed in claim 1, wherein this switch module comprises that a drain electrode is connected to this pixel electrode, and the one source pole electrode extends to this data line and contacts.

12. Thin Film Transistor-LCD as claimed in claim 11, wherein this pixel electrode is arranged under this drain electrode.

13. Thin Film Transistor-LCD as claimed in claim 11, wherein this switch module comprises that a gate insulator is arranged on this overlayer, and this pixel electrode is arranged on this gate insulator, and contacts with this gate insulator.

14. Thin Film Transistor-LCD as claimed in claim 11, wherein this pixel electrode is arranged on this drain electrode.

15. Thin Film Transistor-LCD as claimed in claim 11, wherein this pixel electrode is arranged on the protective seam, and this protective seam covers this switch module.

16. the manufacture method of a Thin Film Transistor-LCD comprises:

One substrate is provided;

On this substrate, form a data line;

On this data line and this substrate, form a chromatic filter layer;

On this chromatic filter layer, form an overlayer; And

On this overlayer, form a switch module, and this switch module is coupled between this data line and the pixel electrode.

17. the manufacture method of Thin Film Transistor-LCD as claimed in claim 16, wherein this data line is a light-shielding structure.

18. the manufacture method of Thin Film Transistor-LCD as claimed in claim 16, wherein this switch module is a channel etch pattern thin film transistor (TFT) backlight.

19. the manufacture method of Thin Film Transistor-LCD as claimed in claim 16 also comprises: form an overlayer between this chromatic filter layer and this switch module.

20. the manufacture method of Thin Film Transistor-LCD as claimed in claim 16 also comprises: form a protective seam and cover this switch module.

21. the manufacture method of Thin Film Transistor-LCD as claimed in claim 16, wherein a local lead connects this switch module and this data line, and should the part lead be transparent conductive material with this pixel electrode.

22. the manufacture method of Thin Film Transistor-LCD as claimed in claim 21, wherein this pixel electrode is arranged on this overlayer, and contacts with this overlayer.

23. the manufacture method of Thin Film Transistor-LCD as claimed in claim 21, wherein a drain electrode of this switch module has an extension as this pixel electrode usefulness, and the one source pole electrode of this switch module has an extension and contacts with this data line.

24. the manufacture method of Thin Film Transistor-LCD as claimed in claim 21, the step that wherein forms this switch module on this overlayer comprises:

On this overlayer, form a gate line;

On this gate line and this overlayer, form a gate insulator, semi-conductor layer and a n-doped layer in regular turn;

Define this n-doped layer and this semiconductor layer;

In this gate insulator and this overlayer, form one first opening, expose the surface of this data line;

On this n-doped layer and this gate insulator, form a transparency conducting layer, and insert in this first opening;

Define this transparency conducting layer and this n-doped layer, to form this pixel electrode and this part lead, wherein this pixel electrode has an extension as a drain electrode, and should have an extension as the one source pole electrode by the part lead; And

Form a protective seam and cover this switch module.

25. the manufacture method of Thin Film Transistor-LCD as claimed in claim 21, wherein this pixel electrode is arranged on the protective seam, and this protective seam covers this switch module.

26. the manufacture method of Thin Film Transistor-LCD as claimed in claim 25, the step that wherein forms this switch module on this overlayer comprises:

On this overlayer, form a gate line;

On this gate line and this overlayer, form a gate insulator in regular turn;

On this gate line and this gate insulator, form a semi-conductor layer and a n-doped layer, and with its patterning;

On this semiconductor layer and this gate insulator, form a metal level;

Define this metal level and this n-doped layer, make this metal level become an one source pole electrode and a drain electrode, and make this n-doped layer become an one source pole and a drain electrode;

Form a protective seam and cover this source electrode, this drain electrode and this gate insulator;

In this protective seam, form one first opening and one second opening, and in this protective seam, this gate insulator and this overlayer, form one the 3rd opening;

On this protective seam, form a transparency conducting layer, and insert this first, second and the 3rd opening in;

And

Define this transparency conducting layer, to form this pixel electrode and this part lead, wherein this pixel electrode is connected to this drain electrode via this first opening, and should be connected to this source electrode and this data line respectively via this second and the 3rd opening by the part lead.

27. the manufacture method of Thin Film Transistor-LCD as claimed in claim 25, the step that wherein forms this switch module on this overlayer comprises:

In this overlayer, form one first opening, to expose the surface of this data line;

On this overlayer, form a gate line;

On this gate line, this data line and this overlayer, form a gate insulator;

On this semiconductor layer and this gate insulator, form a metal level;

In this protective seam, form one second opening and one the 3rd opening, and in this protective seam, this gate insulator and this gate insulator, form one first opening;

And

Define this transparency conducting layer, to form this pixel electrode and this part lead, wherein this pixel electrode is connected to this drain electrode via this second opening, and should be connected to this source electrode and this data line respectively via this first and the 3rd opening by the part lead.

28. the manufacture method of Thin Film Transistor-LCD as claimed in claim 25, the step that wherein forms this switch module on this overlayer comprises:

On this overlayer, form a gate line;

On this gate line and this overlayer, form a gate insulator, semi-conductor layer and a n-doped layer, and with its patterning;

On this semiconductor layer and this overlayer, form a metal level;

Form a protective seam and cover this source electrode, this drain electrode and this overlayer;

In this protective seam, form one second opening and one the 3rd opening, and this first opening is extended in the protective seam;

And

29. the manufacture method of Thin Film Transistor-LCD as claimed in claim 16, wherein this switch module comprises an one source pole electrode and a drain electrode, wherein this source electrode and this pixel electrode electric coupling, this drain electrode has an extension and contacts with this data line.

30. the manufacture method of Thin Film Transistor-LCD as claimed in claim 29, the step that wherein forms this switch module on this overlayer comprises:

On this overlayer, form a gate line;

At this overlayer and online formation one gate insulator of this grid;

In this gate insulator and this overlayer, form one first opening, to expose the surface of this data line;

On this semiconductor layer and this gate insulator, form a metal level, and insert in this first opening;

Define this metal level and this n-doped layer, make this metal level become an one source pole electrode and a drain electrode, and make this n-doped layer become an one source pole and a drain electrode, wherein this source electrode and extending to this data line contacts;

In this protective seam, form one second opening, to expose the surface of this drain electrode;

On this protective seam, form a transparency conducting layer, and insert in this second opening; And

Define this transparency conducting layer, to form this pixel electrode, wherein this pixel electrode is connected to this drain electrode via this second opening.

31. the manufacture method of Thin Film Transistor-LCD as claimed in claim 29, the step that wherein forms this switch module on this overlayer comprises:

On this overlayer, form a gate line;

At this overlayer and online formation one gate insulator of this grid;

On this gate insulator, form a pixel electrode;

On this semiconductor layer, this pixel electrode and this gate insulator, form a metal level, and insert in this first opening;

Define this metal level and this n-doped layer, make this metal level become an one source pole electrode and a drain electrode, and make this n-doped layer become an one source pole and a drain electrode, wherein this source electrode and extending to this data line contacts, and this drain electrode and extending to this pixel electrode contacts;

Form a protective seam and cover this switch module.

32. the manufacture method of Thin Film Transistor-LCD as claimed in claim 29, wherein this pixel electrode is arranged under this drain electrode.

33. the manufacture method of Thin Film Transistor-LCD as claimed in claim 29, wherein this switch module comprises that a gate insulator is arranged on this overlayer, and this pixel electrode is arranged on this gate insulator, and contacts with this gate insulator.

34. the manufacture method of Thin Film Transistor-LCD as claimed in claim 29, wherein this pixel electrode is arranged on this drain electrode.

35. the manufacture method of Thin Film Transistor-LCD as claimed in claim 29, wherein this pixel electrode is arranged on the protective seam, and this protective seam covers this switch module.