CN103577143A - Spliced display screen system based on 8080 buses and control method thereof - Google Patents

Spliced display screen system based on 8080 buses and control method thereof Download PDF

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Publication number
CN103577143A
CN103577143A CN201310583112.XA CN201310583112A CN103577143A CN 103577143 A CN103577143 A CN 103577143A CN 201310583112 A CN201310583112 A CN 201310583112A CN 103577143 A CN103577143 A CN 103577143A
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data
buses
synchronous
control
screen
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CN103577143B (en
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蒋伟
周刚
郎丰伟
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Sichuan CCO Display Technology Co Ltd
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Sichuan CCO Display Technology Co Ltd
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Abstract

The invention provides a spliced display screen system based on 8080 buses. The system is characterized by comprising the 8080 buses, ports, a main control unit and display modules, wherein the 8080 buses and the ports are used for controlling instruction and data transmission, the main control unit is used for executing control instructions, and the display modules are spliced to form a larger display unit through the 8080 buses. The spliced display screen system has the advantages that the spliced display screen system based on the 8080 buses and a control method of the spliced display screen system share one set of the 8080 data buses, write control lines WR and read control lines RD, namely a connection mode that the buses are partially shared is adopted. According to the bus connection mode, on one hand, large quantities of hardware resources are saved, and on the other hand, work efficiency of the system is greatly improved. Ultimately, videos and pictures of a user side can be synchronously displayed on a spliced display screen. The spliced display module is used for synchronously displaying the videos and images.

Description

Mosaic screen system and control method thereof based on 8080 buses
Technical field
The invention belongs to consumer applying electronic field, refer more particularly to the synchronous driving display technique of mosaic screen, particularly the mosaic screen based on 8080 buses synchronously drives display technique.
Background technology
8080 buses are 8080 parallel port agreements that Intel proposes, and are also referred to as Intel bus.Wherein 8080 interfaces are defined as: sheet selects interface CS, data and instruction control interface D6C, read data control interface RD, write Data Control interface WR and parallel data grabbing card DB(data bits comprises: 8,9,16,18) interface.Because 8080 interfaces have without synchronous clock and synchronizing signal, control simple and convenient, so be widely applied on the display screens such as small-medium size LCD/OLED.
Mosaic screen refers to that the display terminal separately with independent driving system by two above (containing two) is spliced into the display screen of a display terminal.By mosaic screen technology, display size/area is greatly enhanced on the basis of original size, display effect shakes more, in fields such as video wall, electronic bill-board, LCD/OLED splicings, has all obtained extensive application.
At present, the data-interface of common LCD and OLED display screen mainly comprises 8080 interfaces and rgb interface.In fields such as oversize video wall, electronic bill-board and middle large-scale LCDs, mosaic screen display system generally adopts SOC or FPGA as system scheme.Meanwhile, data-interface is all generally to use RGB data-interface, but which needs synchronous clock (PCLK), synchronous control signal (HSYNC, VSYNC, DE) and data DB(data bits: 8,16,24).And in small size LCD and OLED field, because the data-interface of the small size LCD as concatenation unit and OLED is all generally to adopt 8080 interface modes, existing mosaic screen technology can not directly be applied mechanically, and causes few in the application of small size LCD and OLED field mosaic screen display system or scheme is complicated.
So the mosaic screen display system based on this class interface (8080 interface) mode becomes the research topic that industry is new.How simultaneous display static images, animation or video in the mosaic screen display system based on 8080 interfaces, become the technological difficulties of mosaic screen drive system.
Summary of the invention
The object of the invention is in order to use mosaic screen technology to solve the difficult problem such as simultaneous display static images, animation or videos in small size LCD and OLED field based on 8080 bus interface, proposed a kind of mosaic screen system based on 8080 buses and the control method of system.
Technical scheme of the present invention is: the mosaic screen system based on 8080 buses, it is characterized in that, and comprise 8080 buses and interface, main control unit and demonstration module; 8080 buses and interface are used as control command and data transmission; Main control unit is used for carrying out steering order; Show that module is spliced into larger display unit by 8080 buses.
Further, described main control unit is one of MCU, SOC or FPGA.
Further, described 8080 interfaces comprise that sheet selects interface CS, data and instruction control interface DC, read data control interface, writes Data Control interface and parallel data grabbing card DB.
Further, above-mentioned write Data Control interface WR data bits comprise 8,9,16 and 18 multiple.
Further, system shows between module and shows and between module and main control unit, shares a set of 8080 buses, write line WR and read control line RD, adopts the connection mode of partial sharing bus.
Mosaic screen system control method based on 8080 buses of the present invention, is characterized in that, comprises the following steps:
S1, initialization system, arrange CPU register, software systems global variable parameter;
S2, the lasting level state that detects CSin, until detect after CSin low level, detect the level state of DCin;
When DCin is low level, control synchronous DCout and synchronous CSout output low level, then jump to S3;
When DCin is high level, control synchronous DCout output high level and control synchronous CSout output low level, then jumping to S4;
S3, command synchronization are exported: detect level state the synchronous output WRout of WRin, read the order that also buffer memory current data interface sends, control synchronous CSout output high level; Then according to 8080 control sequential, to screen 2 to screen N, send the order of current cache successively, after completing, enter S7; Screen 2 and screen N refer to the 2nd and N piece in the N piece screen of composition system;
S4, data are synchronously exported: control synchronous DCout output high level, judge that current data transmission modes is register parameters sending mode or view data sending mode; If register parameters sending mode enters S5; Otherwise enter S6;
S5, register parameters sending mode: control synchronous CSout output low level, detect level state the synchronous output WRout of WRin, read and buffer memory current data mouth on the register parameters value that sends, then control synchronous CSout output high level, according to 8080 control sequential, the register parameters value that sends current cache to screen 2 to screen N successively, enters S7 after completing;
S6, view data sending mode: read row data writing number, if need the synchronous CSout of switching, after CSout has switched, detect level state the synchronous output WRout of WRin; To a row data writing counting number and judge whether full row, if full row returns to S6 circulation and carries out; Otherwise frame data are entered and count and judge whether full frame; If do not have full frame, return to S6 circulation and carry out, otherwise enter S7;
S7, detection CS high level state: continue to detect the level state of CSin until detect after CSin high level, enter S2.
Beneficial effect of the present invention: mosaic screen system and the control method thereof based on 8080 buses of the present invention shares a set of 8080 data buss, write line WR and read control line RD inside and outside system, adopted the connection mode of partial sharing bus.This bus connection mode, on the one hand, has saved great amount of hardware resources, on the other hand, has greatly improved the work efficiency of system.Main control MCU has partly been responsible for the order in front end 8080 buses and the detection and tracking of data-signal, and synchronously drives rear end mosaic screen, finally reaches the video of user side and the function of picture simultaneous display on mosaic screen.Tiled display module is used as the simultaneous display of video and image.
Accompanying drawing explanation
Fig. 1 is system principle diagram of the present invention;
Fig. 2 is method flow diagram of the present invention;
Fig. 3 is the synchronous CS of method of the present invention and the process flow diagram of WR signal.
Embodiment
Below in conjunction with accompanying drawing and specific embodiment, the invention will be further elaborated.
As shown in Figure 1, the mosaic screen system based on 8080 buses of the present embodiment, comprises 8080 buses and interface, main control unit and demonstration module; 8080 buses and interface are used as control command and data transmission; Main control unit is used for carrying out steering order; Show that module is spliced into larger display unit by 8080 buses.Described main control unit is one of MCU, SOC or FPGA.Described 8080 interfaces comprise that sheet selects interface CS, data and instruction control interface DC, read data control interface, writes Data Control interface and parallel data grabbing card DB.Above-mentioned write Data Control interface WR data bits comprise 8,9,16 and 18 multiple.System shows between module and shows and between module and main control unit, shares a set of 8080 buses, write line WR and read control line RD, adopts the connection mode of partial sharing bus.
As shown in Figures 2 and 3, the mosaic screen system control method based on 8080 buses of the present invention, comprises step: S1, initialization system, arrange CPU register, software systems global variable parameter; S2, the lasting level state that detects CSin, until detect after CSin low level, detect the level state of DCin; When DCin is low level, control synchronous DCout and synchronous CSout output low level, then jump to S3; When DCin is high level, control synchronous DCout output high level and control synchronous CSout output low level, then jumping to S4; S3, command synchronization are exported: detect level state the synchronous output WRout of WRin, read the order that also buffer memory current data interface sends, control synchronous CSout output high level; Then according to 8080 control sequential, to screen 2 to screen N, send the order of current cache successively, after completing, enter S7; Screen 2 and screen N refer to the 2nd and N piece in the N piece screen of composition system; S4, data are synchronously exported: control synchronous DCout output high level, judge that current data transmission modes is register parameters sending mode or view data sending mode; If register parameters sending mode enters S5; Otherwise enter S6; S5, register parameters sending mode: control synchronous CSout output low level, detect level state the synchronous output WRout of WRin, read and buffer memory current data mouth on the register parameters value that sends, then control synchronous CSout output high level, according to 8080 control sequential, the register parameters value that sends current cache to screen 2 to screen N successively, enters S7 after completing; S6, view data sending mode: read row data writing number, if need the synchronous CSout of switching, after CSout has switched, detect level state the synchronous output WRout of WRin; To a row data writing counting number and judge whether full row, if full row returns to S6 circulation and carries out; Otherwise frame data are entered and count and judge whether full frame; If do not have full frame, return to S6 circulation and carry out, otherwise enter S7; S7, detection CS high level state: continue to detect the level state of CSin until detect after CSin high level, enter S2.
The present invention is in order to solve the problem of static images and vision signal simultaneous display in the mosaic screen display system based on 8080 buses, proposed a kind of method that novel mosaic screen based on 8080 buses synchronously drives display technique, the method has realized the function of simultaneous display static images and video in the mosaic screen display system based on 8080 buses.
Native system consists of 8080 interfaces, master control (MCU/SOC/FPGA) and three parts of tiled display module.Wherein, 8080 interfaces are as the user interface of whole system, as order and the transmission channel of data, 8080 interfaces comprise: sheet selects interface CS, data and instruction control interface DC, read data control interface RD, write Data Control interface WR and parallel data grabbing card DB(data bits comprises: 8,9,16,18) interface.It needs to be noted, native system is inside and outside to be shared a set of 8080 data buss, write line WR and reads control line RD, has adopted the connection mode of partial sharing bus.This bus connection mode, on the one hand, has saved great amount of hardware resources, on the other hand, has greatly improved the work efficiency of system.Main control MCU has partly been responsible for the order in front end 8080 buses and the detection and tracking of data-signal, and synchronously drives rear end mosaic screen, finally reaches the video of user side and the function of picture simultaneous display on mosaic screen.Tiled display module is used as the simultaneous display of video and image.
Feature for 8080 bus line commands and data, the integrated use of these software systems multi-signal synchronization processing method, specific as follows: to adopt the mode of port scanning, utilize synchronous state machine, port signal is carried out to detection of dynamic and tracking, improve the efficiency of Port detecting; Employing time wheel sheet thought, the time overhead of equalizing system each several part, the work efficiency of raising whole system; In the process of synchronized data signal, the mode of taking system local circulation to process to WR signal, concentrates CPU processing power, and detection and tracking WR signal improves the signal synchronizing capacity of whole system greatly.
In this method, the software flow pattern of synchronous CS and WR signal is shown in Fig. 3 in detail.
In data transmission procedure, the WR pulse signal of take was counted data amount check as the cycle; Counted at every turn, all needed to judge whether to switch CS signal, to shunt follow-up data, flowed to; Counted at every turn, all needed to judge whether data amount check reaches the row data cycle; Reach the row data cycle at every turn, all need to judge whether to reach the Frame cycle; When reaching the Frame cycle, exit at once data-transmission mode.
Those of ordinary skill in the art will appreciate that, embodiment described here is in order to help reader understanding's principle of the present invention, should be understood to that protection scope of the present invention is not limited to such special statement and embodiment.Those of ordinary skill in the art can make various other various concrete distortion and combinations that do not depart from essence of the present invention according to these technology enlightenments disclosed by the invention, and these distortion and combination are still in protection scope of the present invention.

Claims (6)

1. the mosaic screen system based on 8080 buses, is characterized in that, comprises 8080 buses and interface, main control unit and demonstration module; 8080 buses and interface are used as control command and data transmission; Main control unit is used for carrying out steering order; Show that module is spliced into larger display unit by 8080 buses.
2. system according to claim 1, is characterized in that, described main control unit is one of MCU, SOC or FPGA.
3. system according to claim 2, is characterized in that, described 8080 interfaces comprise that sheet selects interface CS, data and instruction control interface DC, read data control interface, writes Data Control interface and parallel data grabbing card DB.
4. system according to claim 3, is characterized in that, write data control interface data bits comprise 8,9,16 and 18 multiple.
5. according to the system described in any one claim of claim 1 to 4, it is characterized in that, system shows between module and shows and between module and main control unit, shares a set of 8080 buses, write line WR and read control line RD, adopts the connection mode of partial sharing bus.
6. the mosaic screen system control method based on 8080 buses, is characterized in that, comprises the following steps:
S1, initialization system, arrange CPU register, software systems global variable parameter;
S2, the lasting level state that detects CSin, until detect after CSin low level, detect the level state of DCin;
When DCin is low level, control synchronous DCout and synchronous CSout output low level, then jump to S3;
When DCin is high level, control synchronous DCout output high level and control synchronous CSout output low level, then jumping to S4;
S3, command synchronization are exported: detect level state the synchronous output WRout of WRin, read the order that also buffer memory current data interface sends, control synchronous CSout output high level; Then according to 8080 control sequential, to screen 2 to screen N, send the order of current cache successively, after completing, enter S7; Screen 2 and screen N refer to the 2nd and N piece in the N piece screen of composition system;
S4, data are synchronously exported: control synchronous DCout output high level, judge that current data transmission modes is register parameters sending mode or view data sending mode; If register parameters sending mode enters S5; Otherwise enter S6;
S5, register parameters sending mode: control synchronous CSout output low level, detect level state the synchronous output WRout of WRin, read and buffer memory current data mouth on the register parameters value that sends, then control synchronous CSout output high level, according to 8080 control sequential, the register parameters value that sends current cache to screen 2 to screen N successively, enters S7 after completing;
S6, view data sending mode: read row data writing number, if need the synchronous CSout of switching, after CSout has switched, detect level state the synchronous output WRout of WRin; To a row data writing counting number and judge whether full row, if full row returns to S6 circulation and carries out; Otherwise frame data are entered and count and judge whether full frame; If do not have full frame, return to S6 circulation and carry out, otherwise enter S7;
S7, detection CS high level state: continue to detect the level state of CSin until detect after CSin high level, enter S2.
CN201310583112.XA 2013-11-19 2013-11-19 Mosaic screen systems based on 8080 buses and control method thereof Expired - Fee Related CN103577143B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116913178A (en) * 2023-09-13 2023-10-20 奥视(天津)科技有限公司 Spliced screen linkage system and video splicing method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0702306A1 (en) * 1994-09-19 1996-03-20 International Business Machines Corporation System and method for interfacing risc busses to peripheral circuits using another template of busses in a data communication adapter
CN103217917A (en) * 2013-03-26 2013-07-24 东南大学 VGA (Video Graphics Array) expansion interface circuit suitable for singlechip system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0702306A1 (en) * 1994-09-19 1996-03-20 International Business Machines Corporation System and method for interfacing risc busses to peripheral circuits using another template of busses in a data communication adapter
CN103217917A (en) * 2013-03-26 2013-07-24 东南大学 VGA (Video Graphics Array) expansion interface circuit suitable for singlechip system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116913178A (en) * 2023-09-13 2023-10-20 奥视(天津)科技有限公司 Spliced screen linkage system and video splicing method
CN116913178B (en) * 2023-09-13 2023-11-28 奥视(天津)科技有限公司 Spliced screen linkage system and video splicing method

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