CN103560791A - Automatic time-drift and temperature-drift calibrating technology for ultra-high speed DAC sampling window - Google Patents
Automatic time-drift and temperature-drift calibrating technology for ultra-high speed DAC sampling window Download PDFInfo
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Abstract
The invention discloses an automatic time-drift and temperature-drift calibrating technology for an ultra-high speed DAC sampling window and provides an automatic correction technology for eliminating drift of the sampling window caused by changes of physical hardware characteristics resulting from temperature and time, power of an automatic calibration single-tone signal is acquired in real time through a signal coupling channel, a signal filtering channel, power control and high-precision acquisition, and finally the sampling window is automatically calibrated through control software. Because a feedback monitoring is carried out on an output signal by the technology, the drift of the sampling window caused by temperature and time can be calibrated in real time, and the method overcomes the defects of time drift, temperature acquisition errors and calibration blindness. The technology has the advantages of being capable of being improved on multiple platforms, high in transferability, low in cost, high in flexibility and the like and makes a high speed modulator platform capable of working in severe environments.
Description
Technical field
The present invention relates to THz communication technology field, while relating in particular to a kind of automatic calibration ultrahigh speed DAC sample window, float with temperature and float technology.
Background technology
At present, in THz communication technology field, base band bit rate is higher than other communications fields, thus after baseband digital signal Direct Digital up-conversion demand baseband portion to realize single-chip sample rate be that 8Gsps, resolution are 12bit and the direct modulation signal of synthetic bandwidth more than 2.5GHz.In high speed circuit, because high-speed chip and printed board material can be along with the changes of the variation generation physical characteristic of temperature and time, so will cause sampling clock to trigger along with useful signal (being sample window), unpredictable skew occurring.
In high-speed modulator in sample rate at 8Gsps, the direct design temperature transducer of traditional mode is in some specific region collecting temperature information, thereby the two-dimentional relation curve that removes to obtain temperature and sample window by a large amount of high low-temperature working experiments, software goes to adjust the IO Delay of FPGA (field programmable gate array) and the calibration of the sampling phase completion system of high-speed chip DAC by this curve again.Obviously, which obtains by great many of experiments that the relation curve of temperature and sample window required experimental period is long, cost is high, cannot accomplish real-time automatic calibrating truly.Temperature sensor cannot obtain each chip internal true temperature, and for the valid data time, within the scope of 0.25ns, error can be very large, and floats problem cannot process time.According to experimental data, calibrate, whether system cannot automatically learn and calibrate successfully, and the signal of ultrahigh speed DAC sample window still may have error.
Summary of the invention
The technical assignment of technical problem to be solved by this invention and proposition is that prior art is improved, when a kind of automatic calibration ultrahigh speed DAC sample window is provided, floats with temperature and float technology, the temperature producing while solving the work of ultrahigh speed DAC sample window in current technology float with time float cannot real-time automatic calibrating problem.
For solving above technical problem, technical scheme of the present invention is:
During a kind of automatic calibration ultrahigh speed DAC sample window, float with temperature and float technology, comprise hardware and control software, it is characterized in that, described hardware comprises signal coupling passage, signal filtering passage, power monitoring and high precision collecting, control software kit synthetic containing single-tone calibrating signal, power is monitored in real time, automatically adjust sampling phase, control software and by transmitting order to lower levels, control the single-tone calibrating signal of the synthetic certain frequency of DDS in FPGA, in high-speed modulator, DAC chip is exported the calibrating signal A of corresponding frequency, calibrating signal A obtains the calibrating signal B for being monitored in real time after by signal coupling passage, calibrating signal B is identical with calibrating signal A characteristic, signal filtering passage completes the filtering of calibrating signal B is obtained to calibrating signal C, power monitoring adopts wave detector to carry out power measurement to calibrating signal C, high precision collecting is sampled and is mapped out the power of calibrating signal A the output of wave detector, thereby realizing control software monitors in real time to the power of calibrating signal A, judge whether to adjust sampling phase.The present invention floats with temperature and floats while having eliminated ultrahigh speed DAC sample window, first by the IP kernel of the inner DDS of FPGA, produce the automatic calibration tone signal of certain frequency, then utilize the power of signal coupling passage, signal filtering passage, power monitoring, high precision collecting Real-time Obtaining calibrating signal, finally by controlling software automatic calibration sample window.Because this technology has been carried out a feedback monitoring to output signal, the skew of the sample window can real time calibration causing due to temperature and time, floats when which has just overcome, temperature acquisition error, and the blindness of conventional calibration mode.
Further, the frequency of the synthetic single-tone calibrating signal of described DDS adopts the frequency outside signal band.Make a distinction and can facilitate follow-up filtering to detect with signal band, avoid signal band to cause interference to testing result, thereby calibration was lost efficacy.
Further, described signal coupling passage comprises Ba Lun and power splitter, and calibrating signal A by signal coupling passage after characteristic do not change.Utilize Ba Lun, with power splitter, calibrating signal A is divided into the signal that two-way is identical, and characteristic is identical, thereby avoid calibrating signal distortion occurrence features to change, makes subsequent power measure error large, finally do not reach the object of calibration.
Further, described signal filtering passage adopts band pass filter, consistent with DDS frequency synthesis to the frequency of the calibrating signal C obtaining after calibrating signal B filtering.By the power of testing calibration signal C, the power that can obtain DDS frequency synthesis changes, thereby further can extrapolate the power situation of change of calibrating signal A, changes difference adjust sampling phase according to the power of calibrating signal A.
Further, it is 46dB that described wave detector adopts exemplary dynamic, the wave detector of temperature stability within the scope of ± 0.5dB, and good stability, avoids environmental change to affect testing result.
Further, it is that 60Msps resolution is the ADC of 12bit that described high precision collecting adopts sample rate, improves the precision of feedback, guarantees the accuracy of calibration.
Further, the data that described control software feeds back to collection are calculated and are inferred calibrating signal power, comparison calibration signal power and lock value, calibrating signal power is less than lock value and adjusts that sampling phase obtains calibrating signal power again until calibrating signal performance number is greater than lock value, completes automatic calibration.Adopt the mode of circulation feedback calibration, constantly adjustment is until calibrating signal performance number stops calibration after being greater than lock value, thereby realized the function of automatic calibration, without manual intervention, also there will not be signal power to reach the phenomenon of also repeatedly calibrating after normal value, improve system works efficiency, avoid invalid calibration to produce, reduce system power dissipation, economize on resources.
Compared with prior art, the invention has the advantages that:
During automatic calibration ultrahigh speed DAC sample window of the present invention, float with the temperature technology of floating output signal is provided with to a feedback monitoring, the variation that signal detected that can be real-time is also calibrated output signal according to changing, adopt the mode of circulation feedback calibration, constantly adjustment is until calibrating signal performance number stops calibration after being greater than lock value, guaranteed the accurate of output signal, after signal reaches normal value, can repeatedly not calibrate waste system resource, thereby effectively avoided the blindness of conventional calibration mode simultaneously;
Adjustment cycle of collimation technique of the present invention is short, cost is low, without draw the relation curves of temperature and sample window by a large amount of experiments for a long time, and without manual intervention, realization automatic calibration truly.
The present invention is without utilizing after temperature sensor measurement temperature calibrating signal again, effectively reduce the manufacture difficulty of calibration system, avoided the impact of the error of temperature detection on signal calibration, the directly variation of comparison calibration signal, according to variable quantity, calibrate output signal, calibration accuracy is high, and reliability is strong;
The present invention floats while also having overcome that conventional calibration technique cannot calibrate simultaneously;
The features such as the present invention can improve in kinds of platform, portability is strong, flexibility is strong, high-speed modulator can in rugged environment, be worked.
Accompanying drawing explanation
Fig. 1 is structural representation of the present invention;
Fig. 2 is control software flow schematic diagram of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is only the present invention's part embodiment, rather than whole embodiment.Embodiment based in the present invention, those of ordinary skills, not making the every other embodiment obtaining under creative work prerequisite, belong to the scope of protection of the invention.
When the embodiment of the present invention discloses a kind of automatic calibration ultrahigh speed DAC sample window, float with temperature and float technology, with solve that prior art can not automatic calibration sample window time float with temperature and float, reduce experimental cost, shorten the R&D cycle, the calibration failure of simultaneously avoiding the error of temperature acquisition to bring, the stability that improves high-speed modulator is object.
Referring to Fig. 1, during a kind of automatic calibration ultrahigh speed DAC sample window, float with temperature and float technology, comprise hardware and control software, it is characterized in that, described hardware comprises signal coupling passage, signal filtering passage, power monitoring and high precision collecting, and control software kit is synthetic containing single-tone calibrating signal, sampling phase is monitored, automatically adjusted to power in real time.FPGA adopts Xilinx company chip, and model is XC6VSX475T, controls software and adopts separate state machine to realize, and DDS adopts the IP kernel of Xilinx company to realize.The signal coupling passage of hardware components comprises Ba Lun and power splitter, and Ba Lun adopts the ETC1-1-13 of mini-circuits company, and power splitter adopts LRPS-2-11A+; Signal filtering passage adopts the band pass filter of mini-circuits company; Power monitoring adopts the AD8313 wave detector of ADI company, and the exemplary dynamic of wave detector is 46dB, and temperature stability is within the scope of ± 0.5dB; It is the high-precision adc that 60Msps, resolution are 12bit that high precision collecting adopts ADI company sample rate, and model is AD9214.
Control software and by transmitting order to lower levels, control the single-tone calibrating signal of the synthetic certain frequency of DDS in FPGA, the frequency of the single-tone calibrating signal that DDS is synthetic adopts the frequency outside signal band, in high-speed modulator, DAC chip is exported the calibrating signal A of corresponding frequency, calibrating signal A obtains the calibrating signal B for being monitored in real time after by signal coupling passage, calibrating signal B is identical with calibrating signal A characteristic, and calibrating signal A by signal coupling passage after characteristic do not change.
Signal filtering passage adopts band pass filter, and signal filtering passage completes the filtering of calibrating signal B is obtained to calibrating signal C, and the frequency of calibrating signal C is consistent with DDS frequency synthesis.Power monitoring adopts wave detector to carry out power measurement to calibrating signal C, high precision collecting is sampled and is mapped out the power of calibrating signal A the output of wave detector, thereby realize control software, the power of calibrating signal A is monitored in real time, judged whether to adjust sampling phase.
As shown in Figure 2, the calibration control flow of controlling software is as follows, controls software and controls DDS nucleosynthesis single-tone calibrating signal in FPGA by transmitting order to lower levels, and in high-speed modulator, DAC chip is exported the single-tone calibrating signal of corresponding frequency; The data that control software feeds back to collection are calculated and are inferred calibrating signal power; Control software by the monitoring to calibrating signal power, comparison calibration signal power and lock value, calibrating signal power is less than lock value and adjusts that sampling phase obtains calibrating signal power again until calibrating signal performance number is greater than lock value, completes automatic calibration.
Below be only the preferred embodiment of the present invention, it should be pointed out that above-mentioned preferred implementation should not be considered as limitation of the present invention, protection scope of the present invention should be as the criterion with claim limited range.For those skilled in the art, without departing from the spirit and scope of the present invention, can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.
Claims (7)
1. float with temperature during an automatic calibration ultrahigh speed DAC sample window and float technology, comprise hardware and control software, it is characterized in that, described hardware comprises signal coupling passage, signal filtering passage, power monitoring and high precision collecting, control software kit synthetic containing single-tone calibrating signal, power is monitored in real time, automatically adjust sampling phase, control software and by transmitting order to lower levels, control the single-tone calibrating signal of the synthetic certain frequency of DDS in FPGA, in high-speed modulator, DAC chip is exported the calibrating signal A of corresponding frequency, calibrating signal A obtains the calibrating signal B for being monitored in real time after by signal coupling passage, calibrating signal B is identical with calibrating signal A characteristic, signal filtering passage completes the filtering of calibrating signal B is obtained to calibrating signal C, power monitoring adopts wave detector to carry out power measurement to calibrating signal C, high precision collecting is sampled and is mapped out the power of calibrating signal A the output of wave detector, thereby realizing control software monitors in real time to the power of calibrating signal A, judge whether to adjust sampling phase.
2. float with temperature during automatic calibration ultrahigh speed DAC sample window according to claim 1 and float technology, it is characterized in that, the frequency of the single-tone calibrating signal that described DDS is synthetic adopts the frequency outside signal band.
3. float with temperature during automatic calibration ultrahigh speed DAC sample window according to claim 1 and float technology, it is characterized in that, described signal coupling passage comprises Ba Lun and power splitter, and calibrating signal A by signal coupling passage after characteristic do not change.
4. float with temperature during automatic calibration ultrahigh speed DAC sample window according to claim 1 and float technology, it is characterized in that, described signal filtering passage adopts band pass filter, consistent with DDS frequency synthesis to the frequency of the calibrating signal C obtaining after calibrating signal B filtering.
5. float with temperature during automatic calibration ultrahigh speed DAC sample window according to claim 1 and float technology, it is characterized in that, it is 46dB that described wave detector adopts exemplary dynamic, and temperature stability is within the scope of ± the 0.5dB.
6. float with temperature during automatic calibration ultrahigh speed DAC sample window according to claim 1 and float technology, it is characterized in that, it is that 60Msps resolution is the ADC of 12bit that described high precision collecting adopts sample rate.
7. float with temperature during automatic calibration ultrahigh speed DAC sample window according to claim 1 and float technology, it is characterized in that, the data that described control software feeds back to collection are calculated and are inferred calibrating signal power, comparison calibration signal power and lock value, calibrating signal power is less than lock value and adjusts that sampling phase obtains calibrating signal power again until calibrating signal performance number is greater than lock value, completes automatic calibration.
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Application publication date: 20140205 |