CN103546164A - Signal collecting device and working method thereof - Google Patents
Signal collecting device and working method thereof Download PDFInfo
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- CN103546164A CN103546164A CN201310537392.0A CN201310537392A CN103546164A CN 103546164 A CN103546164 A CN 103546164A CN 201310537392 A CN201310537392 A CN 201310537392A CN 103546164 A CN103546164 A CN 103546164A
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Abstract
The invention discloses a signal collecting device and a working method of the signal collecting device and relates to the technical field of electronic information, and the signal collecting device and the working method can effectively improve the sampling frequency of a multi-channel synchronous sampling device. The signal collecting device comprises a copying part and a collecting part, wherein one end of the copying part is connected with M channels to input signals, and the other end of the copying part is connected with the collecting part and used for copying the input signals in each of the M channels to be N channels of identical signals and for outputting the N channels of signals to the collecting part, wherein M is a natural number, and N is a natural number larger than one; the collecting part comprises M*N sampling units, and the M*N sampling units correspond to the M*N channels of signals output by the copying part to the collecting part respectively; the N sampling units in each channel are used for sampling the N channels of the input signals in turns so that the equivalent sampling frequency of each channel can be N times that of each sampling unit. The working method is suitable for various signal collecting devices.
Description
Technical field
The present invention relates to telecommunication technology field, particularly relate to a kind of signal pickup assembly and method of work thereof.
Background technology
In telecommunication technology field, in order to understand equipment working condition or data to be processed, often need multi-signal (for example bus type signal or other parallel signals) sample or measure.And due to the quantity of all kinds of buses or parallel signal from two-way Dao Jin hundred tunnels not etc., signal frequency is distributed in several KHz between a few G hertz, therefore, often need the multi-channel synchronous sampling apparatus of upper frequency could meet the sampling request to these bus signals or parallel signal.
Yet, in actual conditions, limit by the performance of the inter-process module of signal collecting device, the raising of multi-channel synchronous sampling apparatus sample frequency is also not easy to realize.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of signal pickup assembly and method of work thereof, and in order to solve in prior art, the sample frequency of multi-channel synchronous sampling apparatus is difficult to the problem improving.
For solving the problems of the technologies described above, on the one hand, the invention provides a kind of signal pickup assembly, comprise: copy portion, one end connects M channel input signal, the other end connects collection portion, for by described M passage described in each the input signal in passage copy as respectively the identical signal in N road to the output of described collection portion; Wherein, M is natural number, and N is greater than 1 natural number; Described collection portion, comprises M * N sampling unit, and described M * N sampling unit is corresponding to M * N road signal of described collection portion output with the described portion of copying respectively; N described in each in a passage sampling unit is respectively used to corresponding N road input signal to sample in turn so that described in each the equivalent sampling frequency of passage be the sample frequency of sampling unit described in each N doubly.
Optionally, the sample frequency of the sampling unit of the N described in each in passage is identical, and sampling phase is followed successively by 2n π/N, and wherein, n equals 0,1 ... N-1.
Optionally, described in the portion of copying comprise cross point switches, described in each, the input signal of passage is from input input of described cross point switches, N output exported.
Optionally, described in the portion of copying comprise buffer, described in each, the input signal of passage is from input input of described buffer, N output exported.
Optionally, described sampling unit comprises parallel series and staticizer SERDES sample circuit.
On the other hand, the present invention also provides a kind of method of work of above-mentioned signal pickup assembly, comprising:
The described portion of copying copies as respectively the identical signal in N road to the output of described collection portion by passage Yi road input signal described in each;
In described collection portion, N sampling unit in passage sampled in turn to corresponding N road input signal respectively described in each so that described in each the equivalent sampling frequency of passage be the sample frequency of sampling unit described in each N doubly.
Optionally, the sample frequency of the sampling unit of the N described in each in passage is identical, and sampling phase is followed successively by 2n π/N, and wherein, n equals 0,1 ... N-1.
Optionally, the described portion of copying copies as respectively the identical signal in N road by the input signal of passage described in each and specifically comprises to the output of described collection portion: described in copy portion's input input from cross point switches by the input signal of passage described in each, N output exported.
Optionally, described in, copy portion's input input from described buffer by the input signal of passage described in each, N output output.
Optionally, in described collection portion, N sampling unit in passage sampled and specifically comprised in turn corresponding N road input signal respectively described in each: in described collection portion, N sampling unit in passage sampled to corresponding N road input signal in turn by parallel series and staticizer SERDES sample circuit respectively described in each.
Signal pickup assembly provided by the invention and method of work thereof, can each passage Nei mono-road input signal be copied as to the identical signal in N road by the portion of copying, and respectively corresponding N road input signal is sampled in turn by N sampling unit, because the N road signal in each passage is identical, the effect that N sampling unit sampled in turn to N road same signal is identical with the effect that sampling rate is sampled to same road signal faster with a sampling unit, therefore, the equivalent sampling frequency of each passage be equivalent to each sampling unit in this passage sample frequency N doubly, thereby under the condition of the performance without improvement sampling unit, realized the remarkable lifting of sample frequency.
Accompanying drawing explanation
Fig. 1 is a kind of structural representation of the signal pickup assembly that provides of the embodiment of the present invention;
Fig. 2 is a kind of structural representation of the duplicate circuit in the signal pickup assembly that provides of the embodiment of the present invention;
Fig. 3 is the another kind of structural representation of the signal pickup assembly that provides of the embodiment of the present invention;
Fig. 4 is a kind of flow chart of the method for work of the signal pickup assembly that provides of the embodiment of the present invention.
Embodiment
Below in conjunction with drawings and Examples, the specific embodiment of the present invention is described in further detail.Following examples are used for illustrating the present invention, but are not used for limiting the scope of the invention.
As shown in Figure 1, embodiments of the invention provide a kind of signal pickup assembly, comprise: copy portion 1, copy portion 1 one end and connect M channel input signal CH1 to CHM, the other end connects collection portion 2, for by described M passage described in each the input signal in passage copy as respectively the identical signal in N road to 2 outputs of described collection portion; Wherein, M is natural number, and N is greater than 1 natural number; Collection portion 2, comprises M * N sampling unit 20, and described M * N sampling unit 20 is corresponding to M * N road signal of collection portion 2 outputs with the portion of copying 1 respectively; N described in each in a passage sampling unit 20 is respectively used to corresponding N road input signal to sample in turn so that described in each the equivalent sampling frequency of passage be the sample frequency of sampling unit 20 described in each N doubly.
Signal pickup assembly provided by the invention, can each passage Nei mono-road input signal be copied as to the identical signal in N road by the portion of copying 1, and respectively corresponding N road input signal is sampled in turn by N sampling unit 20, because the N road signal in each passage is identical, the effect that 20 pairs of N road same signals of N sampling unit are sampled is in turn identical with the effect that sampling rate is sampled to same road signal faster with a sampling unit 20, therefore, the equivalent sampling frequency of each passage be equivalent to each sampling unit 20 in this passage sample frequency N doubly, thereby under the condition of the performance without improvement sampling unit 20, realized the remarkable lifting of sample frequency.
It should be noted that, each sampling unit 20 is all to sample under sampling clock synchronous.In same passage, the sample frequency of N sampling unit 20 is identical, but phase place is different.In order to make sampling more even, preferred, when the sampling unit of the N in same passage 20 is sampled, the phase place of sampling clock is followed successively by 2n π/N, and wherein, n equals 0,1 ... N-1.
Between different passages, sampling clock both can be separate, also can share each other.For example, in one embodiment of the invention, M1-M8 channel transfer bus signals, M9 channel transfer direct current signal.For bus signals is carried out to distortionless recovery, can use the sample frequency that meets Nyquist law to sample to M1 to M8.Meanwhile, to consider that what in M9, transmit is direct current signal, in order economizing on resources, can suitably reduce the sample frequency to M9 passage, and M9 to be used lower sample frequency to sample.
Optionally, copy portion 1 can for can Jiang Yi road signal replication be multiple signals any circuit structure, functional module or FPGA (Field Programmable Gate Array) etc., embodiments of the invention are not restricted this.For example, in one embodiment of the invention, copy portion 1 and can pass through the realization of cross point switches (crosspoint switch) structure.Concrete, Figure 2 shows that the structural representation of the portion of copying 1 being constructed by cross point switches in one of them passage.Wherein, Ia and Ib are two inputs of the portion of copying 1, and Oa and Ob are two outputs of the portion of copying 1.This cross point switches has output controllability, that is to say that Ia both can export by Oa or Ob Zhong mono-tunnel, also can export by Oa and this two-way of Ob simultaneously.Equally, Ib also has same characteristic.So, only need make input signal to be sampled input from Ia or Ib, output simultaneously from Oa and Ob, can realize Jiang Yi road signal replication is identical two paths of signals.If cross point switches has more output (as, N), naturally also just can realize more copying of multichannel (N road) signal.
Optionally, copying portion 1 can also realize by buffer.In other embodiment of the present invention, copy portion 1 and can comprise buffer, described in each, the input signal of passage is from an input input of described buffer, and N output exported, thereby realizes copying of N road signal.
Concrete, collection portion 2 can comprise the M * N corresponding with an input signal sampling unit 20.Input signal is inputted by M passage, and the signal in each passage is replicated again portion 1 and is copied into N road, and total like this signal way is M * N road.N road signal in each passage carries out signal sampling by corresponding sampling unit 20 to it, this N sampling unit 20 need to have different sampling time sequences, this can realize by controlling the sampling clock of each sampling unit 20, thereby the N road signal copying in each passage is sampled in turn.
Optionally, collection portion 2 both can realize by ASIC Design, also can realize by various FPGA (Field Programmable Gate Array) or other circuit structures, and embodiments of the invention are not construed as limiting this.When collection portion 2 adopts FPGA(Field-Programmable Gate Array, when field programmable gate array) device is realized, sampling unit 20 specifically can comprise SERDES(SERializer/DESerializer, parallel series and staticizer) sample circuit, and the phase-locked loop by FPGA inside provides sampling clock for each sampling unit 20.Although FPGA can sample to external signal as 1GHz with very high frequency, the speed of carrying out data processing is relatively slow, can only reach hundred megahertz levels, as 500MHz.And by SERDES circuit, serial signal is converted into after parallel signal, FPGA gets final product each road signal of parallel processing, has accelerated the processing speed to signal, therefore, can greatly subtract small signal process for the restriction of sample frequency.Coordinate again upper LVDS(Low Voltage Differential Signaling, Low Voltage Differential Signal) use of level, can make the synchronized sampling frequency upgrading of single passage to 1.6GHz.
Below by specific embodiment, signal pickup assembly provided by the invention is described in detail.As shown in Figure 3, in one embodiment of the invention, use FPGA device to realize a kind of sample frequency and reach 2.5GHz, can Dui16 road signal (CH0～CH15) carry out the device of synchronized sampling.
Consider that the internal logic of FPGA is for the restriction of sample frequency, in order to realize the sample frequency of 2.5GHz, in the present embodiment, copy portion 1 signal Dou You mono-tunnel in each passage in these 16 passages is copied as to two tunnels, thereby form 32 road signal S0a, S0b, S1a, S1b ... S15a, S15b, the two paths of signals after copying is identical with original Yi road signal, the sample frequency that copies Hou 32 signal Zhong，Mei road, road signals is 1.25GHz.
Gai32 road signal enters subsequently in the collection portion 2 of the SERDES circuit structure one-tenth of FPGA and samples.The sampling clock of concrete ，Zhe 32 road signals is all to be realized by the phase-locked loop 3 of FPGA inside, has identical sample frequency.But clock signal C lk1 and the Clk2 of output have different phase places from phase-locked loop 3, optional, in the present embodiment, the two phase difference of pi.These two clock signals offer respectively two sampling units 20 of same channel interior, thereby two sampling units 20 in a passage can be sampled in turn.Like this, although the sample frequency of each sampling unit 20 is only 1.25GHz, see on the whole, each passage can reach 2 * 1.25GHz=2.5GHz for the sample frequency of signal, thereby has effectively promoted the sample frequency of signal pickup assembly.
It should be noted that, in the present embodiment, when utilizing SERDES circuit structure collection portion 2, need to bypass the DPA(Dynamic Phase Alignment of SERDES circuit, dynamic phasing alignment) pattern, in order to avoid SERDES circuit is adjusted clock phase automatically, affects multichannel synchronized sampling.
The signal pickup assembly providing in the present embodiment, has utilized a plurality of SERDES circuit to sample to signal, has broken through the restriction of high sample frequency of single channel SERDES circuit, has greatly improved the sample frequency of signal pickup assembly.And because this installs available FPGA and the realization of conventional integrated circuit (IC) chip, do not need to develop asic chip, therefore can effectively reduce costs, shorten the construction cycle.
Accordingly, as shown in Figure 4, embodiments of the invention also provide a kind of method of work of aforementioned signal pickup assembly, comprising:
S11, described in the portion of copying passage Yi road input signal described in each is copied as respectively to the identical signal in N road to the output of described collection portion;
S12, in described collection portion, N sampling unit in passage sampled in turn to corresponding N road input signal respectively described in each so that described in each the equivalent sampling frequency of passage be the sample frequency of sampling unit described in each N doubly.
The method of work of signal pickup assembly provided by the invention, can each passage Nei mono-road input signal be copied as to the identical signal in N road by the portion of copying, and respectively this N road input signal is sampled in turn by N sampling unit, because the N road signal in each passage is identical, the effect that N sampling unit sampled in turn to N road same signal is identical with the effect that sampling rate is sampled to same road signal faster with a sampling unit, therefore, the equivalent sampling frequency of each passage be equivalent to each sampling unit in this passage sample frequency N doubly, thereby under the condition of the performance without improvement sampling unit, realized the remarkable lifting of sample frequency.
It should be noted that, each sampling unit is specifically sampled under sampling clock synchronous.In same passage, the sample frequency of N sampling unit is identical, but phase place is different.In order to make sampling more even, preferred, when the sampling unit of the N in same passage is sampled, the phase place of sampling clock is followed successively by 2n π/N, and wherein, n equals 0,1 ... N-1.
Concrete, in step S11, described in the portion of copying specifically can utilize cross point switches, the input signal of passage described in each is copied as respectively to the identical signal in N road to the output of described collection portion.Particularly, can be by the input signal of passage described in each to be inputted from an input of cross point switches, N output exported to realize.
Optionally, described in, the portion of copying can also copy as respectively the identical signal in N road by the input signal of passage described in each by buffer and exports to described collection portion.Particularly, the input signal of passage described in each can be inputted from an input of described buffer, N output exported to realize.
Optionally, in step S12, in described collection portion, N sampling unit in passage can be sampled to corresponding N road input signal in turn by SERDES sample circuit respectively described in each.
The detailed working theory and processing of relevant signal pickup assembly is illustrated above, repeats no more herein.
Although be example object, the preferred embodiments of the present invention are disclosed, it is also possible those skilled in the art will recognize various improvement, increase and replacement, therefore, scope of the present invention should be not limited to above-described embodiment.
Claims (10)
1. a signal pickup assembly, is characterized in that, comprising:
Copy portion, one end connects M channel input signal, and the other end connects collection portion, for by described M passage described in each the input signal in passage copy as respectively the identical signal in N road to the output of described collection portion; Wherein, M is natural number, and N is greater than 1 natural number;
Described collection portion, comprises M * N sampling unit, and described M * N sampling unit is corresponding to M * N road signal of described collection portion output with the described portion of copying respectively; N described in each in a passage sampling unit is respectively used to corresponding N road input signal to sample in turn so that described in each the equivalent sampling frequency of passage be the sample frequency of sampling unit described in each N doubly.
2. device according to claim 1, is characterized in that, the sample frequency of the sampling unit of the N described in each in passage is identical, and sampling phase is followed successively by 2n π/N, and wherein, n equals 0,1 ... N-1.
3. device according to claim 1, is characterized in that, described in the portion of copying comprise cross point switches, described in each, the input signal of passage is from input input of described cross point switches, N output exported.
4. device according to claim 1, is characterized in that, described in the portion of copying comprise buffer, described in each, the input signal of passage is from input input of described buffer, N output exported.
5. device according to claim 1, is characterized in that, described sampling unit comprises parallel series and staticizer SERDES sample circuit.
6. a method of work for signal pickup assembly as claimed in claim 1, is characterized in that, comprising:
The described portion of copying copies as respectively the identical signal in N road to the output of described collection portion by passage Yi road input signal described in each;
In described collection portion, N sampling unit in passage sampled in turn to corresponding N road input signal respectively described in each so that described in each the equivalent sampling frequency of passage be the sample frequency of sampling unit described in each N doubly.
7. method according to claim 6, is characterized in that, the sample frequency of the sampling unit of the N described in each in passage is identical, and sampling phase is followed successively by 2n π/N, and wherein, n equals 0,1 ... N-1.
8. method according to claim 6, is characterized in that, described in the portion of copying the input signal of passage described in each copied as respectively to the identical signal in N road to the output of described collection portion, specifically comprise:
The described portion of copying inputs the input signal of passage described in each from an input of cross point switches, N output output.
9. method according to claim 6, is characterized in that, described in copy portion's input input from described buffer by the input signal of passage described in each, N output exported.
10. method according to claim 6, it is characterized in that, in described collection portion, N sampling unit in passage sampled and specifically comprised in turn corresponding N road input signal respectively described in each: in described collection portion, N sampling unit in passage sampled to corresponding N road input signal in turn by parallel series and staticizer SERDES sample circuit respectively described in each.
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| CN106827835A (en) * | 2015-12-07 | 2017-06-13 | 北大方正集团有限公司 | Synchronizing signal control method and synchronizing signal Control card |
| CN109738681A (en) * | 2018-12-26 | 2019-05-10 | 中电科仪器仪表有限公司 | Double-channel collection access multiplex circuit, sampling control method and data joining method |
| CN112652277A (en) * | 2020-12-22 | 2021-04-13 | 北京奕斯伟计算技术有限公司 | Sampler, display driving chip and display device |
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