CN103532686A - Serial data transceiver circuit with line sequence self-adaptive function, and control method thereof - Google Patents
Serial data transceiver circuit with line sequence self-adaptive function, and control method thereof Download PDFInfo
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Abstract
The invention discloses a serial data transceiver circuit with a line sequence self-adaptive function, and a control method thereof. The circuit comprises a serial data sending end signal processing module and a serial data receiving end signal processing module, wherein the front end of the serial data sending end signal processing module is connected with a serial data sending end signal generating module, the rear end of the serial data sending end signal processing module is connected with a serial signal transmission channel, the front end of the serial data receiving end signal processing module is connected with the serial signal transmission channel, and the rear end of the serial data receiving end signal processing module is connected with a serial data receiving end signal receiving module. By using the serial data transceiver circuit with the line sequence self-adaptive function, and the control method thereof, not only can line sequence errors in serial signal transmission be better detected, the serial signal line sequence can also be adjusted in an self-adaptive mode, data can be correctly transmitted through data receiving and sending ends, and at the same time, quite good versatility is exhibited, therefore, the circuit and control method can be applied to the serial data transmission with various standards in various transmission channels including wired and wireless transmission channels.
Description
Technical field
The application relates to Circuits System technical field, relates in particular to a kind of serial data transmission circuit and control method thereof with wired order adaptation function.
Background technology
Serial data communication transmission obtains a wide range of applications because its line number signal is less, Universal Asynchronous Receiver & dispensing device (Universal Asynchronous Receiver/Transmitter for example, UART), Serial Peripheral Interface (SPI) (Serial Peripheral Interface, SPI) and other implementations (as I2C), wherein UART is asynchronous serial communication mode, and usage data sends (TxD) and data receiver (RxD) two paths of signals line conventionally; SPI is synchronous serial communication mode, conventionally uses three lines (CLK, DATA HeEN tri-road holding wires) or four lines (CLK, MOSI, MISO HeEN tetra-road holding wires) pattern.
Because serial data signal line is less, its line order problem just seems particularly important, and the mistake of line order will directly cause the data of transmission not to be correctly received.In the transmission of serial signal realizes, due to situations such as fly line mistake, design mistake and wireless channel frequency errors, often there will be line order Problem-Error.
For detecting and modified line order relevant issues, there have been some patents to propose solution.
Application number is 201010002667.7 patent " a kind of line order method of testing ", has proposed a kind of method that ethernet line carries out the test of line order.But this method can only be tested ethernet line; And only have sniffing function, and there is no self adaptation error correction; This method, based on electric resistance partial pressure, needs modulus conversion chip (hereinafter referred ADC) simultaneously, and the stability of resistance and ADC all can affect line order test result.With it similarly patent to also have application number be 200820029252.7 patent " network wiring fault simulation test instrument ", equally whether have error correction, can only be based on RJ-45 defect.
Application number is 200910154166.8 patent " a kind of multicore communication cable comprehensive tester ", a kind of multicore communication cable comprehensive tester has been proposed, use encoding and decoding CPU to carry out the test of line order information, but this method equally need to be based on ADC, and need independent CPU, and test function can only be provided, and not have from error correction.Similarly patent also has the patent " for the detection method that at least one cable is detected " that application number is 94223771.4 patent " multiple conductor cable line order and fault locator ", application number is 200610146680.3 patent " detection method " and application number are 200610166865.0 with it, has equally the independent CPU of needs, test function can only be provided and not have the defect from error correction.
Application number is 200620036870.5 patent " network line sequence converter ", a kind of network line sequence converter has been proposed, can carry out the conversion of line order to the netting twine based on RJ-45, but this network line sequence converter can only convert the netting twine based on RJ-45, and can only be fixed the conversion of line order, and there is no error detection and self adaptation error correction.
Sum up above-mentioned patent, can find out that current patent and implementation method thereof all exist to detect maybe can only be fixed line order and switch, and shortcoming that mostly can only be based on special interface (RJ-45).
As shown in Figure 1, Fig. 1 is existing serial data signal transmission schematic diagram.Existing serial signal transmitting-receiving mode is: the data that transmitting terminal treatment circuit need to be sent by serial signal transmitting terminal become serial data signal by protocol conversion, serial data signal transmits at serial data signal transmission channel, Serial data receiving end will convert back serial data signal by agreement the serial data of legacy data form after receiving serial data signal, and the serial data that converts back legacy data form will send receiving terminal treatment circuit to and be for further processing.Wherein, transmitting terminal treatment circuit can be processor (CPU or MCU), digital signal processor (DSP) or other treatment circuits (FPGA, CPLD etc.), serial data signal transmission channel can be wired cable or PCB circuit board metal wire, can be also wireless signal channel.
Take base band control signal form as SPI standard signal be example, SPI signal is a kind of interface bus of synchronous serial peripheral hardware, it can make processor and various peripheral apparatus communicate with serial mode, working method is master-slave mode.SPI transmission means is divided into three-wire system and two kinds of implementations of four-wire system, Fig. 2 the first half has shown that a normal three-wire system SPI realizes, and three-wire system SPI generally has following three road signals: clock signal (CLK), enable signal (EN) and data-signal (DATA).Wherein CLK signal is sampled signal, when CLK signal is rising edge, signal is sampled, when when sampling EN stabilize to high level the currency of DATA will be used as valid data and read, if DATA is that low level reads as data ' 0 ', if DATA is high level, does as data ' 1 ' and read.As shown in Figure 2, in order to guarantee CLK rising edge, can sample accurately, EN signal and DATA all should be ready to before CLK rises, before CLK rises, be referred to as during this period of time " settling time (Setup Time) " in digital circuit, in the example shown in Fig. 2, set up more in advance by some times for the relative DATA signal of EN.Example as shown in Fig. 2 the first half, receiving terminal is sampled at rising edge clock, in the situation that EN is high level, samples successively ' 0 ', ' 1 ', ' 0 ', ' 1 ', ' 1 ', ' 0 ', ' 1 ' and ' 0 '.In current example, use MSB transmission mechanism (Most Significant Bit, highest significant position) at first, be also first ' 0 ' for MSB, 8 bit result of sampling are 0b01011010, take decimal representation as 90, hexadecimal representation is 0x5A.
Fig. 2 the latter half has been shown the data transmission fault that three line SPI cause due to the line order mistake of EN signal and the exchange of DATA signal error.Because being used as EN, the data level of the former DATA of should be processes, and the data level of the former EN of should be is used as DATA processing, make rising edge clock only when former DATA signal (being now wrong EN signal) is for ' 1 ', just can assert valid data, and when DATA signal is ' 1 ', EN signal one is decided to be ' 1 ', this signal that just causes that SPI adopts is all ' 1 ', adopting resulting signal numerical value time 8 valid data is 8 bit binary data 0b11111111 (take hexadecimal representation as 0xFF, take decimal representation as 255).
Fig. 3 the latter half has been shown the data transmission fault that three line SPI cause due to the line order mistake of CLK signal and the exchange of DATA signal error.Because being used as CLK, the data level of the former DATA of should be processes, and the data level of the former CLK of should be is used as DATA processing, while making clock (DATA signal originally) rising edge, EN signal one is decided to be ' 1 ' (as previously mentioned, EN signal than DATA signal (being used as CLK signal), set up in advance by some times), and DATA signal (CLK signal originally) is decided to be ' 0 ' (due to the cause of settling time, DATA signal is set up in advance than CLK signal, and when DATA signal is during as clock signal (CLK), before in the time of its rising edge sampling, DATA signal (former CLK) is in rising edge, one is decided to be ' 0 '), this signal that just causes that SPI adopts is all ' 0 ', adopting resulting signal numerical value time 8 valid data is that 8 bit binary data 0b00000000 (be take hexadecimal representation as 0x00, take decimal representation as 0).
Summary of the invention
(1) technical problem that will solve
For the above-mentioned one or more problems that exist in prior art, main purpose of the present invention is to provide a kind of serial data transmission circuit and control method thereof with wired order adaptation function, so that line order mistake is detected, self adaptation is adjusted line order and the relative time delay of serial signal, makes data transmit-receive two ends be able to correct transmission data.
(2) technical scheme
According to an aspect of the present invention, the invention provides a kind of serial data transmission circuit with wired order adaptation function, this circuit comprises serial data transmitting terminal signal processing module 100 and Serial data receiving end signal processing module 200, wherein, these serial data transmitting terminal signal processing module 100 front ends are connected with serial data transmitting terminal signal generation module 300, and rear end is connected with serial signal transmission channel; These Serial data receiving end signal processing module 200 front ends are connected with serial signal transmission channel, and rear end is connected with Serial data receiving end signal receiver module 400.
In such scheme, described serial data transmitting terminal signal processing module 100 comprises serial signal pattern generation unit 101, serial signal transmitting terminal control unit 104, feedback signal receiving element 105 and error model identifying unit 106, wherein, serial signal pattern generation unit 101 respectively with serial data transmitting terminal signal generation module 300, serial signal transmission channel is connected with serial signal transmitting terminal control unit 104, serial signal transmitting terminal control unit 104 respectively with serial signal pattern generation unit 101, error model identifying unit 106 is connected with feedback signal receiving element 105.
In such scheme, described serial signal pattern generation unit 101, comprise serial signal cross matrix subelement 103, for receiving the original serial data signal that serial data transmitting terminal signal generation module 300 sends, receive the control signal of serial signal transmitting terminal control unit 104, and by original serial data signal after its serial signal cross matrix subelement 103 is processed, serial data signal has been revised in output.Described serial signal cross matrix subelement 103 is for carrying out signal cross according to the instruction of serial signal transmitting terminal control unit.
In such scheme, the Serial data receiving feedback signal that described serial signal transmitting terminal control unit 104 transmits for receiving feedback signals receiving element 105, and be sent to error model identifying unit 106, receive the type of error that error model identifying unit 106 returns, according to this type of error, control the mode of operation of serial signal pattern generation unit 101, if type of error is unknown, serial signal transmitting terminal control unit 104 will send warning message to serial data transmitting terminal signal generation module 300.
In such scheme, described feedback signal receiving element 105 is for Serial data receiving end feedback signal is carried out to preliminary treatment, and sends the signal after processing to serial signal transmitting terminal control unit 104.
In such scheme, described error model identifying unit 106, comprise error model storing sub-units 107, the wrong decision request and the Serial data receiving end feedback signal that for receiving serial signal transmitting terminal control unit 104, send, by with error model storing sub-units 107 in the comparing and analyzing of model of storage, analyze current error model, send result to serial signal transmitting terminal control unit 104.
In such scheme, described Serial data receiving end signal processing module 200 comprises: serial signal receiving terminal control unit 201, for receiving the serial data signal of correction on serial signal transmission channel, and this signal is sent to Serial data receiving end signal receiver module 400 and feedback signal generation unit 202, and enables feedback signal generation unit 202 and on feedback channel, produce Serial data receiving end feedback signal; Feedback signal generation unit 202, the serial data signal and the feedback signal instruction that for receiving serial signal receiving terminal control unit 201, transmit, generate Serial data receiving end feedback signal, exports to feedback signal receiving element 105.Described feedback signal generation unit 202 adds entry identification signal in the feedback signal generating.
According to another aspect of the present invention, the present invention also provides a kind of serial data receiving and sending control method, is applied to the described serial data transmission circuit with wired order adaptation function, and the method comprises:
Steps A: serial signal transmitting terminal control unit 104 is controlled serial signal pattern generation unit 101 and sent test serial data signal;
Step B: serial signal transmitting terminal control unit 104 receives Serial data receiving end feedback signal and sends decision request and data to error model identifying unit 106;
Step C, when serial signal transmitting terminal control unit 104 receives after " normally " signal of error model identifying unit 106, controls serial signal pattern generation unit 101 original serial data signal is directly sent to serial signal transmission channel;
Step D, when serial signal transmitting terminal control unit 104 receives after " known error model " signal of error model identifying unit 106, control serial signal pattern generation unit 101 and carry out signal demonstration and signal cross by AD HOC, the signal after processing is sent to serial signal transmission channel;
Step e, when serial signal transmitting terminal control unit 104 receives after " unknown error model " signal of error model identifying unit 106, sends warning message products for further processing instruction to serial data transmitting terminal signal generation module 300.
(3) beneficial effect
Serial data transmission circuit and control method thereof with wired order adaptation function provided by the invention, not only can detect preferably due to the line order mistake in serial signal transmission, and can self adaptation adjust serial signal line order, make data transmit-receive two ends correctly be transmitted data.The present invention simultaneously has good versatility, can be applied to the various wired or wireless various standard serial data transmissions that wait in transmission channel.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of existing serial data signal transmission;
Fig. 2 is existing schematic diagram of take the data transmission fault that three line SPI cause due to line order mistake (EN exchanges with DATA signal error) as example explanation.
Fig. 3 is existing schematic diagram of take the data transmission fault that three line SPI cause due to line order mistake (CLK exchanges with DATA signal error) as example explanation.
The hardware structure schematic diagram of Fig. 4 serial data transmission circuit with wired order adaptation function provided by the invention.
Fig. 5 is that the serial data transmission circuit with wired order adaptation function provided by the invention is realized schematic diagram in unidirectional serial data transmission system.
Fig. 6 is that the serial data transmission circuit with wired order adaptation function provided by the invention is realized schematic diagram in bidirectional linked list data transmission system.
Fig. 7 is the flow chart of the error model judgement of the serial data transmission circuit with wired order adaptation function provided by the invention.
Fig. 8 is the schematic diagram of serial signal cross matrix subelement work functions.
Fig. 9 is the flow chart that generation, feedback and the error model of test signal judged.
Embodiment
For making the object, technical solutions and advantages of the present invention clearer, below in conjunction with specific embodiment, and with reference to accompanying drawing, the present invention is described in more detail.
In described embodiment, the form of supposing serial data signal is SPI standard signal below, and those skilled in the art should understand, and for the signal of other standards, the present invention is applicable equally.
In one exemplary embodiment of the present invention, a kind of serial data signal transmission circuit with wired order adaptation function has been proposed.As shown in Figure 4, the hardware structure schematic diagram of Fig. 4 serial data transmission circuit with wired order adaptation function provided by the invention, this serial data signal transmission circuit comprises serial data transmitting terminal signal processing module 100 and Serial data receiving end signal processing module 200.According to system, realize demand, if system is one-way data transmission demand, can implement respectively transmitting terminal signal processing module and receiving end signal processing module by transmitting terminal that Fig. 5 is shown in and receiving terminal.If system is bidirectional data transfers requirement, by side a and b that Fig. 6 is shown in, all realize described transmitting terminal signal processing module and receiving end signal processing module.Serial data transmitting terminal signal generation module 300 and Serial data receiving end signal receiver module 400 in Fig. 4 are the part of the existing serial data transmission shown in Fig. 1.
Wherein, serial data transmitting terminal signal processing module 100, its front end is connected with serial data transmitting terminal signal generation module 300, its rear end is connected with serial signal transmission channel, and this module comprises serial signal pattern generation unit 101, serial signal transmitting terminal control unit 104, feedback signal receiving element 105 and error model identifying unit 106.Wherein:
Serial signal pattern generation unit 101, comprise serial signal cross matrix subelement 103, be connected with serial data transmitting terminal signal generation module 300, serial signal transmission channel and serial signal transmitting terminal control unit 104 respectively, for receiving the original serial data signal that serial data transmitting terminal signal generation module 300 sends, receive the control signal of serial signal transmitting terminal control unit 104, and by original serial data signal after its serial signal cross matrix subelement 103 is processed, serial data signal has been revised in output.
Serial signal transmitting terminal control unit 104, respectively with serial signal pattern generation unit 101, error model identifying unit 106 is connected with feedback signal receiving element 105, the Serial data receiving feedback signal transmitting for receiving feedback signals receiving element 105, and be sent to error model identifying unit 106, receive the type of error that error model identifying unit 106 returns, according to this type of error, control the mode of operation of serial signal pattern generation unit 101, if type of error is unknown, serial signal transmitting terminal control unit 104 will send warning message to serial data transmitting terminal signal generation module 300.
Feedback signal receiving element 105, for Serial data receiving end feedback signal is carried out to preliminary treatment, and sends the signal after processing to serial signal transmitting terminal control unit 104.
Error model identifying unit 106, comprise error model storing sub-units 107, be connected with serial signal transmitting terminal control unit 104, receive wrong decision request and Serial data receiving end feedback signal that serial signal transmitting terminal control unit 104 sends, by with error model storing sub-units 107 in the comparing and analyzing of model of storage, analyze current error model, send result to serial signal transmitting terminal control unit 104.
Serial data receiving end signal processing module 200, its front end is connected with serial signal transmission channel, and its rear end is connected with Serial data receiving end signal receiver module 400, and this module comprises serial signal receiving terminal control unit 201 and feedback signal generation unit 202.Wherein:
Serial signal receiving terminal control unit 201, receives the serial data signal of correction on serial signal transmission channel, and this signal is sent to Serial data receiving end signal receiver module 400 and feedback signal generation unit 202.
Feedback signal generation unit 202, receives serial data signal and feedback signal instruction that serial signal receiving terminal control unit 201 transmits, generates Serial data receiving end feedback signal, exports to feedback signal receiving element 105.
The present invention will be described with exemplary embodiment to divide 3 trifles below: " serial data transmitting terminal signal processing module 100 parts " and " Serial data receiving end end signal processing module 200 parts " have illustrated hardware circuit of the present invention, i.e. " a kind of serial data transmission circuit " described in aforementioned summary of the invention; " generation of test signal, feedback and error model determination flow " illustrated the flow process of the present invention aspect error model judgement, i.e. " a kind of serial data receiving and sending control method " described in aforementioned summary of the invention.
Serial data transmitting terminal signal processing module 100 parts
Serial signal pattern generation unit 101, inside comprises serial signal cross matrix subelement 103, front end is connected with serial data transmitting terminal signal generation module 300, receive original serial data signal, rear end is connected with serial signal transmission channel, for original serial data signal being processed to (modified line order) and being exported and revised serial data signal.
Serial signal cross matrix subelement 103, is included in serial signal pattern generation unit 101, can carry out signal cross according to the instruction of serial signal transmitting terminal control unit.In the present embodiment, port 0,1,2 is defined as respectively EN, CLK and the DATA signal in normal transmission.As shown in Figure 8, the present invention explains the operational mode of serial signal cross matrix subelement with the signal problem of misalignment in Fig. 3: for four road signals (in order to support three-wire type SPI and four-wire type SPI simultaneously, we take the better four line cross matrixes of versatility is example), serial signal transmitting terminal control unit 104 provides 4 pairs of configuration datas to serial signal pattern generation unit 101, form is as follows: (input port, output port), as representing, (2,1) in Fig. 8 by port one, exported after matrix from the signal of port 2 inputs.Serial signal cross matrix subelement 103 reads this configuration data corrected signal line order when work, as shown in Figure 8, by the port one of wrong exchange and port 2 signals (DATA and CLK signal), by serial signal cross matrix subelement 103, revised, revert to correct signal and connect.Serial signal cross matrix subelement 103 can be exported serial data test signal simultaneously under the instruction of serial signal transmitting terminal control unit 104, as shown in Figure 9, " generation of test signal, feedback and error model determination flow " one joint that vide infra of the concrete handling process in current embodiment.
Serial signal transmitting terminal control unit 104, be connected with error model identifying unit 106 with feedback signal receiving element 105, serial signal pattern generation unit 101, for receiving feedback signals receiving element 105, carry out pretreated feedback signal, and send above-mentioned signal to error model identifying unit 106, after receiving the returning results of error model identifying unit 106, if result is " normally " or " known error model ", press the configuration data of accordingly result configuration modifications serial signal cross matrix subelement 103; If result is " unknown error model ", serial signal transmitting terminal control unit 104 will send warning message to serial data transmitting terminal signal generation module 300.Simultaneously, serial data transmitting terminal control unit 104 can also be controlled serial signal pattern generation unit 101 and generate serial data test signal, as shown in Figure 9, " generation of test signal, feedback and error model determination flow " one joint that vide infra of the concrete handling process in current embodiment.
Feedback signal receiving element 105, is connected with serial signal transmitting terminal control unit 104 with feedback channel, for receiving the signal on feedback channel, and is the manageable signal of each several part in serial data transmitting terminal signal processing module by its preliminary treatment.For example on feedback channel, signal is 5V Transistor-Transistor Logic level, and in serial data transmitting terminal signal processing module 100, uses 1.8V COMS level, and feedback signal receiving element 105 need to and be converted to 1.8V CMOS level signal by the signal sampling in feedback signal.For example signal and serial data transmitting terminal signal processing module 100 are 1.8V CMOS level on feedback channel again, but the signal attenuation due to feedback channel, when the actual level that arrives feedback signal receiving element 105 only has 1.2V left and right, feedback signal receiving element 105 will be sampled and re-generate signal on channel, revert to the 1.8V CMOS level of standard.
Error model identifying unit 106, be connected with serial signal transmitting terminal control unit 104, receive feedback signal and error model decision request that serial signal transmitting terminal control unit 104 transmits, and the signal in this feedback signal and error model storing sub-units 107 is contrasted, draw error model result of determination (" normally ", " known error model " or " unknown error model ") and error model code (particular type of " known error model "), send this error model result of determination to serial signal transmitting terminal control unit 104, and do further processing by serial signal transmitting terminal control unit 104.As shown in Figure 9, error model decision process in current embodiment vide infra " generation of test signal, feedback and error model determination flow " joint.
Serial data is sent out receiving end signal processing module 200 parts
Serial signal receiving terminal control unit 201, be connected with serial signal transmission channel, feedback signal generation unit 202 and Serial data receiving end signal receiver module 400, for receive and preliminary treatment serial signal transmission channel on the serial data signal of correction (to level pretreatment mode with described feedback signal receiving element 105), simultaneously, send reception pretreated signal to feedback signal generation unit 202, and enable feedback signal generation unit 202 and on feedback channel, produce Serial data receiving end feedback signal.
Feedback signal generation unit 202, be connected with feedback channel with serial signal receiving terminal control unit 201, the data-signal and the enable command that for receiving serial signal receiving terminal control unit 201, transmit, and on feedback channel, generate Serial data receiving end feedback signal.In order to make each unit of serial data transmitting terminal signal processing module 100 can Recognition feedback signal, feedback signal generation unit 202 need to add entry identification signal in feedback signal, it in current embodiment, is targeting signal, as shown in Figure 9, " generation of test signal, feedback and error model determination flow " joint vide infra in the generation of feedback signal.
The generation of test signal, feedback and error model determination flow
As shown in Figure 7, the serial data transmission circuit with wired order adaptation function that the present invention proposes is when carrying out a data transfer, flow process is as follows: first, serial signal transmitting terminal control unit 104 is controlled serial signal pattern generation unit 101 and sent test serial data signal (steps A); After receiving test signal, serial signal receiving terminal control unit 201 sends data to feedback signal generation unit 202, and enable feedback signal generation unit 202 and on feedback channel, generate Serial data receiving end feedback signal, this feedback signal will add indications, for 105 identifications (current embodiment leading character is as indications) of feedback signal receiving element.Serial signal transmitting terminal control unit 104 is receiving after the pretreated signal of feedback signal receiving element 105, send signal data and request to error model identifying unit 106, error model identifying unit 106 is compared the condition code in this signal data and error model storing sub-units 107, and show that error model result of determination (" normally ", " known error model " or " unknown error model " and judgement code) returns to serial signal transmitting terminal control unit 104 (step B); Serial signal transmitting terminal control unit 104 will be controlled serial signal pattern generation unit 101 and set the configuration data (step C, step D or step e) of serial signal cross matrix subelement 103 according to result of determination; Step C, when serial signal transmitting terminal control unit 104 receives after " normally " signal of error model identifying unit 106, controls serial signal pattern generation unit 101 original serial data signal is directly sent to serial signal transmission channel; Step D, when serial signal transmitting terminal control unit 104 receives after " known error model " signal of error model identifying unit 106, control serial signal pattern generation unit 101 and carry out signal demonstration and signal cross by AD HOC, the signal after processing is sent to serial signal transmission channel; Step e, when serial signal transmitting terminal control unit 104 receives after " unknown error model " signal of error model identifying unit 106, sends warning message products for further processing instruction to serial data transmitting terminal signal generation module 300.
Fig. 9 has illustrated generation, feedback and the error model determination flow of test signal with concrete example.As shown in Figure 9, in a data transfer at first, serial signal transmitting terminal control unit 104 is controlled serial signal pattern generation unit 101 and produce test signal on serial signal transmission channel, test signal in the present embodiment is Binary Zero b01011010 (hexadecimal 0x5A), serial signal receiving terminal control unit 201 is sent to feedback unit generation unit 202 by signal and enable command after receiving test signal, feedback unit generation unit 202 the most before adds 2bit leading character (being 0b01 in current embodiment) as indications the once output after leading character using the front 8bit receiving as feedback signal in feedback data.
If when front order is correct, add the 10bit data of leading character to be followed successively by: " 0 ", " 1 ", " 0 ", " 1 ", " 0 ", " 1 ", " 1 ", " 0 ", " 1 ", " 0 ", (remove 2bit leading character after numerical value be 0x5A).
If when EN as shown in Figure 2 and the mistake of DATA signal error exchange have appearred in front order, add the 10bit data of leading character to be followed successively by: " 0 ", " 1 ", " 1 ", " 1 ", " 1 ", " 1 ", " 1 ", " 1 ", " 1 ", " 1 ", (remove 2bit leading character after numerical value be 0xFF).
If when CLK as shown in Figure 3 and the mistake of DATA signal error exchange have appearred in front order, add the 10bit data of leading character to be followed successively by: " 0 ", " 1 ", " 0 ", " 0 ", " 0 ", " 0 ", " 0 ", " 0 ", " 0 ", " 0 ", (remove 2bit leading character after numerical value be 0x00).
If first EN signal of test signal is not correctly sampled, cause first " 0 " not to be sampled, add the 10bit data of leading character to be followed successively by: " 0 ", " 1 ", " 1 ", " 0 ", " 1 ", " 1 ", " 0 ", " 1 ", " 0 ", " 0 ", as " unknown error " that indicate in Fig. 9, (remove 2bit leading character after numerical value be 0xB8).
Feedback signal receiving element 105 is receiving the feedback signal of feedback channel and is confirming after leading character, remaining 8bit will be decoded and be sent to serial signal transmitting terminal control unit 104, serial signal transmitting terminal control unit 104 will send error model identifying unit 106 to the data value of remaining 8bit, and error model identifying unit 106 is compared the condition code in this data value and error model storing sub-units draw result of determination.As shown in Figure 9, if feedback numerical value is 0x5A, be judged to be " normally ", to serial signal transmitting terminal control unit 104, return to judgement code " 0 ", representative " normally "; If feedback numerical value is 0x00, be judged to be " known error model ", to serial signal transmitting terminal control unit 104, return to judgement code " 1 ", representative " known error model, the exchange of CLK/DATA signal error "; If feedback numerical value is 0xFF, be judged to be " known error model ", to serial signal transmitting terminal control unit 104, return to judgement code " 2 ", representative " known error model, the exchange of EN/DATA signal error "; If feedback numerical value, for other values, is judged to be " unknown error model ", to serial signal transmitting terminal control unit 104, return to judgement code " 4 ", representative " unknown error model ";
According to the result of determination of error model identifying unit 106,104 pairs of Different Results of serial signal transmitting terminal control unit are made different disposal:
If result of determination is " normally " (judgement code " 0 "), the configuration numerical value of serial signal cross matrix subelement 103 is configured to ((0,0), (1,1), (2,2), (3,3)) and continues subsequent data transmission;
If result of determination is " known error model; CLK/DATA signal error exchange " (judgement code " 1 "), the configuration numerical value of serial signal cross matrix subelement 103 is configured to ((0,0), (1,2), (2,1), (3,3)) and continue subsequent data transmission, as described in as described in Fig. 8;
Similar with the exchange of CLK/DATA signal error, if result of determination is " known error model; EN/DATA signal error exchange " (judgement code " 2 "), the configuration numerical value of serial signal cross matrix subelement 103 is configured to ((0,2), (1,1), (2,0), (3,3)) and continue subsequent data transmission;
If result of determination is " unknown error model " (judgement code " 4 "), to transmitting terminal signal generation module 300, report to the police.
In sum, serial data transmission circuit and control method thereof with wired order adaptation function provided by the invention, not only can detect preferably due to the line order mistake in serial signal transmission, and can self adaptation adjust serial signal line order, make data transmit-receive two ends correctly be transmitted data.The present invention simultaneously has good versatility, can be applied to the various wired or wireless various standard serial data transmissions that wait in transmission channel.
Above-described specific embodiment; object of the present invention, technical scheme and beneficial effect are further described; institute is understood that; the foregoing is only specific embodiments of the invention; be not limited to the present invention; within the spirit and principles in the present invention all, any modification of making, be equal to replacement, improvement etc., within all should being included in protection scope of the present invention.
Claims (10)
1. the serial data transmission circuit with wired order adaptation function, it is characterized in that, this circuit comprises serial data transmitting terminal signal processing module (100) and Serial data receiving end signal processing module (200), wherein, this serial data transmitting terminal signal processing module (100) front end is connected with serial data transmitting terminal signal generation module (300), and rear end is connected with serial signal transmission channel; This Serial data receiving end signal processing module (200) front end is connected with serial signal transmission channel, and rear end is connected with Serial data receiving end signal receiver module (400).
2. the serial data transmission circuit with wired order adaptation function according to claim 1, it is characterized in that, described serial data transmitting terminal signal processing module (100) comprises serial signal pattern generation unit (101), serial signal transmitting terminal control unit (104), feedback signal receiving element (105) and error model identifying unit (106), wherein, serial signal pattern generation unit (101) respectively with serial data transmitting terminal signal generation module (300), serial signal transmission channel is connected with serial signal transmitting terminal control unit (104), serial signal transmitting terminal control unit (104) respectively with serial signal pattern generation unit (101), error model identifying unit (106) is connected with feedback signal receiving element (105).
3. the serial data transmission circuit with wired order adaptation function according to claim 2, it is characterized in that, described serial signal pattern generation unit (101), comprise serial signal cross matrix subelement (103), be used for receiving the original serial data signal that serial data transmitting terminal signal generation module (300) sends, receive the control signal of serial signal transmitting terminal control unit (104), and by original serial data signal after its serial signal cross matrix subelement (103) is processed, serial data signal has been revised in output.
4. the serial data transmission circuit with wired order adaptation function according to claim 3, is characterized in that, described serial signal cross matrix subelement (103) is for carrying out signal cross according to the instruction of serial signal transmitting terminal control unit.
5. the serial data transmission circuit with wired order adaptation function according to claim 2, it is characterized in that, the Serial data receiving feedback signal that described serial signal transmitting terminal control unit (104) transmits for receiving feedback signals receiving element (105), and be sent to error model identifying unit (106), receive the type of error that error model identifying unit (106) returns, according to this type of error, control the mode of operation of serial signal pattern generation unit (101), if type of error is unknown, serial signal transmitting terminal control unit (104) will send warning message to serial data transmitting terminal signal generation module (300).
6. the serial data transmission circuit with wired order adaptation function according to claim 2, it is characterized in that, described feedback signal receiving element (105) is for Serial data receiving end feedback signal is carried out to preliminary treatment, and sends the signal after processing to serial signal transmitting terminal control unit (104).
7. the serial data transmission circuit with wired order adaptation function according to claim 2, it is characterized in that, described error model identifying unit (106), comprise error model storing sub-units (107), be used for receiving wrong decision request and the Serial data receiving end feedback signal that serial signal transmitting terminal control unit (104) sends, by comparison and the analysis of the model with the middle storage of error model storing sub-units (107), analyze current error model, send result to serial signal transmitting terminal control unit (104).
8. the serial data transmission circuit with wired order adaptation function according to claim 1, is characterized in that, described Serial data receiving end signal processing module (200) comprising:
Serial signal receiving terminal control unit (201), for receiving the serial data signal of correction on serial signal transmission channel, and this signal is sent to Serial data receiving end signal receiver module (400) and feedback signal generation unit (202), and enables feedback signal generation unit (202) and on feedback channel, produce Serial data receiving end feedback signal;
Feedback signal generation unit (202), be used for receiving serial data signal and the feedback signal instruction that serial signal receiving terminal control unit (201) transmits, generate Serial data receiving end feedback signal, export to feedback signal receiving element (105).
9. the serial data transmission circuit with wired order adaptation function according to claim 8, is characterized in that, described feedback signal generation unit (202) adds entry identification signal in the feedback signal generating.
10. a serial data receiving and sending control method, is applied to the serial data transmission circuit with wired order adaptation function described in any one in claim 1 to 9, it is characterized in that, the method comprises:
Steps A: serial signal transmitting terminal control unit (104) is controlled serial signal pattern generation unit (101) and sent test serial data signal;
Step B: serial signal transmitting terminal control unit (104) receives Serial data receiving end feedback signal and sends decision request and data to error model identifying unit (106);
Step C, when serial signal transmitting terminal control unit (104) receives after " normally " signal of error model identifying unit (106), control serial signal pattern generation unit (101) original serial data signal is directly sent to serial signal transmission channel;
Step D, when serial signal transmitting terminal control unit (104) receives after " known error model " signal of error model identifying unit (106), control serial signal pattern generation unit (101) and carry out signal demonstration and signal cross by AD HOC, the signal after processing is sent to serial signal transmission channel;
Step e, when serial signal transmitting terminal control unit (104) receives after " unknown error model " signal of error model identifying unit (106), to serial data transmitting terminal signal generation module (300), send warning message products for further processing instruction.
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| CN108347393A (en) * | 2017-01-22 | 2018-07-31 | 华为技术有限公司 | Intersect processing method, equipment and the system of line sequence |
| CN110166082A (en) * | 2019-04-01 | 2019-08-23 | 深圳市速腾聚创科技有限公司 | Magnet ring line sequence adaptive approach, device, equipment and storage medium |
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| CN111158335A (en) * | 2019-11-19 | 2020-05-15 | 潍柴动力股份有限公司 | Stitch function matching method of multi-ECU system and storage medium |
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| CN103532686B (en) | 2016-09-28 |
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