CN103531622A - 高压快速晶闸管 - Google Patents

高压快速晶闸管 Download PDF

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CN103531622A
CN103531622A CN201210232183.0A CN201210232183A CN103531622A CN 103531622 A CN103531622 A CN 103531622A CN 201210232183 A CN201210232183 A CN 201210232183A CN 103531622 A CN103531622 A CN 103531622A
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张桥
颜家圣
吴拥军
杨宁
邹宗林
林煜凤
张明辉
肖彦
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HUBEI TECH SEMICONDUCTORS Co Ltd
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    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
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Abstract

本发明高压快速晶闸管。属于功率半导体器件技术领域。它主要是解决现有快速晶闸耐压不够高的问题。它的主要特征是:包括管壳下封接件、定位环、半导体芯片、垫片、门极组件、上封接件,硅片包括PNPN三端结构,分为阳极区P1、长基区N1、短基区P2和阴极区N2,三端分别为阳极A、阴极K和门极G,在阳极区P1表面增设阳极区P+,使硅片为P+PNPN三端结构;所述的阴极区N2为均匀分布有旋转环绕门极G的区域,门极G为与阴极区N2对应的渐开线指条。本发明具有能明显提高器件的耐压、保持原设计晶闸管的开通时间不变、并降低通态压降、改善器件的阻断电压水平和通态能力的特点,主要应用于大功率变流电源、串联逆变电源装置。

Description

高压快速晶闸管
技术领域
本发明属于功率半导体器件技术领域。具体涉及一种高压半导体快速晶闸管器件,主要应用于大功率变流电源、串联逆变电源装置。
背景技术
目前,感应加热电源绝大多数采用并联逆变技术,所用半导体器件为快速晶闸管。输入的三相交流电经过整流后经电抗器输出为直流电流,由4只快速晶闸管组成的逆变桥接收控制单元发出的触发信号,将直流电流进行变换,输出高频率的单相交流电流。而现在一种更高效、稳定和输出能力更大的方案是串联逆变技术,典型电路如图7所示。与并联逆变技术不同的是,逆变桥将整流桥输出的直流电压变换为高频交流电压输出。为达到更大功率输出往往需多只高压快速晶闸管串联实现,如图8所示组件,由3只4000V快速晶闸管串联形成单一桥臂,输出电压峰值可达7000V以上。
常规快速晶闸管是一种PNPN四层三端结构器件,通常制造方法是在N型硅处两端直接进行P型扩散,形成对称的PNP结构,然后在阴极端P区进行N型选择性扩散,最终形成PNPN结构,P1阳极区与P2阴极端区的掺杂结深和杂质浓度分布相同,此种结构快速晶闸管器件常规阻断电压在1200V∽2500V,此时通态压降已达到3.2V左右。按此工艺再提高耐压将直接导致通态压降的上升,且动态特性同时恶化,已不具备实用性。
在一些要求满足快开通和高电压阻断的电气系统中,上述结构的晶闸管因耐压太低,而必须多只串联,电压要求越高,串联要求越多,对均压要求及同步开通配对要求更难。
发明内容
本发明的目的就是针对上述不足,提出一种可应用于较高耐压快速大功率半导体开关器件,即高压快速晶闸管。能明显提高器件的耐压,保持原设计晶闸管的开通时间不变,并降低通态压降,从而改善器件的阻断电压水平和通态能力,提高工作可靠性,同时亦可改善特性。
本发明高压快速晶闸管的技术解决方案是:高压快速晶闸管,由管壳下封接件、定位环、半导体芯片、垫片、门极组件、上封接件封装而成,半导体芯片由硅片、钼片烧结而成,硅片包括PNPN三端结构,分为阳极区P1、长基区N1、短基区P2和阴极区N2,半导体芯片三个端子分别为阳极A、阴极K和门极G,其特征在于:在所述的阳极区P1表面增设阳极区P+,使硅片为P+PNPN三端结构;所述的阴极区N2为均匀分布有旋转环绕门极G的区域,门极G为与阴极区N2对应的渐开线指条。
本发明技术解决方案中所述的阳极区P1与短基区P2的结深相同。
本发明技术解决方案中所述的阳极区P1结深小于短基区P2结深。
本发明技术解决方案中所述的旋转环绕门极G为圆弧形渐开线区域,渐开线指条为对应的圆弧形渐开线指条。
本发明技术解决方案中所述的旋转环绕门极G为分段渐开线区域,渐开线指条为对应的分段渐开线指条。
本发明技术解决方案中所述的旋转环绕门极G的渐开线指条为4∽6条。
本发明技术解决方案中所述的半导体芯片台面正斜角磨负度大小为:20o≤θ1≤60o,负斜角磨角角度θ2大小为:1.5o≤θ2≤5o。
本发明技术解决方案中所述的硅片厚度为500-950μm,其中阳极区P+表面杂质浓度2∽9×1020/cm3,阳极区P1、短基区P2表面杂质浓度为2∽8×1017/cm3,阴极区N2表面杂质浓度为3∽9×1020/cm3,阳极区P+结深为10∽30μm,阳极区P1、短基区P2结深为80∽140μm,阴极区N2的结深为15∽30μm。
本发明技术解决方案中所述的硅片厚度为500-950μm,其中阳极区P+表面杂质浓度2∽9×1020/cm3,阳极区P1、短基区P2表面杂质浓度为2∽8×1017/cm3,阴极区N2表面杂质浓度为3∽9×1020/cm3,阳极区P+结深为15∽30μm,阳极区P1结深为50∽90μm,短基区P2结深为80∽140μm,阴极区N2的结深为15∽30μm,阳极区P1比短基区P2浅30∽50μm。
本发明制造高压快速晶闸管工艺方法的技术解决方案是:包括以下步骤:
①选用厚度为500-950μm、电阻率为180∽320Ω·cm、晶向<111>或<100>的N型NTD单晶硅片,硅片双面采用磷吸收工艺处理;
②硅片双面通过Al、Ga双杂质分布扩散形成阳极区P1、短基区P2,阳极区P1与短基区P2的结深为80∽140μm,阳极区P1、短基区P2表面杂质浓度为2∽8×1017/cm3
或者硅片双面通过Al、Ga双杂质分布扩散形成阳极区P1、短基区P2,将阳极区P1进行减薄处理,短基区P2的结深为80∽140μm,阳极区P1的结深为50∽90μm;
③对未减薄处理的阳极区P1进行硼扩散后形成阳极区P+,阳极区P+结深为10∽30μm,阳极区P+表面杂质浓度2∽9×1020/cm3
或者对减薄处理的阳极区P1进行硼扩散后形成阳极区P+,阳极区P+结深为15∽30μm,阳极区P+表面杂质浓度2∽9×1020/cm3
④对短基区P2上进行选择性磷扩散形成阴极区N2,阴极区N2表面浓度为3∽9.5x1020,阴极区N2结深为15∽30μm;
⑤对硅片和钼片进行高温焊接,对短基区P2、阴极区N2表面进行金属蒸镀后再选择性刻蚀,形成门极G、阴极K,钼片作为芯片的阳极A;
⑥对芯片采用电子辐照的方法控制少子寿命为10∽30μs,调节关断时间为40∽120μs;
⑦对半导体芯片台面进行机械磨角造型,正斜角磨负度大小为:30o≤θ1≤60o,负斜角磨角角度θ2大小为:1.5o≤θ2≤5o;
⑧最后将半导体芯片与管壳下封接件1、定位环2、垫片4、门极组件5、上封接件6封装。
本发明由于在现有常规快速晶闸管PNPN四层三端结构的基础上,在阳极区P1表面增设阳极区P+,使硅片为P+PNPN三端结构,阴极区N2为均匀分布有旋转环绕门极G的区域,门极G为与阴极区N2对应的渐开线指条,因而可提高开通速度,降低了欧姆接触压降和体压降,提高耐压,并具有快开通效果,使本发明的耐压提高到3.0KV以上,通态压降降低到3.2V以下。本发明对阳极区P1减薄后,更提高了阳极区P+离子注入效果,同时再次降低了体压降,保持动态特性不变,又提高阻断耐压500V。本发明具有能明显提高器件的耐压、保持原设计晶闸管的开通时间不变、并降低通态压降、改善器件的阻断电压水平和通态能力的特点。本发明主要应用于大功率变流电源、串联逆变电源装置。
附图说明
图1是本发明的产品结构示意图。
图2是本发明实施例1的单晶硅片的对称结构示意图。
图3是本发明实施例2的单晶硅片的非对称结构示意图。
图4是本发明的晶闸管硅芯片制造工艺流程图。
图5是本发明实施例1芯片的阴极示意图。
图6是本发明实施例2芯片的阴极示意图。
图7是是本发明应用原理图。
图8是是本发明组件结构示意图。
具体实施方式
实施例1如图1、图2、图5所示。本发明高压快速晶闸管是一种大功率快速半导体开关器件,由管壳下封接件1、定位环2、半导体芯片3、垫片4、门极组件5、上封接件6封装而成。半导体芯片3由硅片、钼片烧结而成。
硅片为P+PNPN三端对称结构,结构分为阳极区P+、阳极区P1、长基区N1、短基区P2和阴极区N2。硅片采用晶向<111>或<100>、N型NTD单晶硅片,硅片厚度为500-950μm,电阻率180∽320Ω·cm。阴极区N2为均匀分布有圆弧形渐开线旋转环绕门极G的区域,渐开线指条为对应的圆弧形渐开线指条,渐开线指条为6条。阳极区P1-1与短基区P2长度相同。阳极区P+表面杂质浓度2∽9×1020/cm3,阳极区P1-1、短基区P2表面杂质浓度为2∽8×1017/cm3,阴极区N2表面杂质浓度为3∽9×1020/cm3,阳极区P+结深为10∽30μm,阳极区P1-1、短基区P2结深为80∽140μm,阴极区N2的结深为15∽30μm。半导体芯片3台面正斜角磨负度大小为:20o≤θ1≤60o,负斜角磨角角度θ2大小为:1.5o≤θ2≤5o。
实施例2如图1、图3、图6所示。与实施例1的不同在于阳极区P1结深小于短基区P2结深,阳极区P1-2结深为50∽90μm。阳极区P+结深为15∽30μm,,阳极区P1-2比短基区P2浅30∽50μm。阴极区N2为分布有分段渐开线旋转环绕门极G的区域,渐开线指条为对应的分段渐开线指条。阳极区P1-2减薄后,更提高了阳极区P+离子注入效果,同时再次降低了体压降,保持动态特性不变,又提高阻断耐压500V。
本发明制造工艺流程如图4所示。
硅单晶选用NTD材料,硅片采用晶向<111>或<100>、N型NTD单晶硅片,硅片厚度为500-950μm,电阻率180∽320Ω·cm,硅片双面采用磷吸收工艺处理,提高少子寿命。根据不同的应用要求选择硅片的电阻率和厚度,总厚度的选取既要求保证实现器件正向耐压的要求,又不至于增加压降。
双面P型扩散:对硅片双面同时进行Al、Ga双杂质源扩散形成阳极区P1-1、短基区P2。阳极区P1-1与短基区P2结深80∽140μm,表面浓度2.0∽8.0×1017cm-3
单面减薄:通过研磨、喷砂和化学腐蚀等方法,去除阳极区P1-1厚度30∽50μm形成阳极区P1-2,阳极区P1-2的结深为50∽90μm。
N+扩散:经过氧化、光刻处理,对阴极端P2区表面做选择性高浓度N型杂质扩散,形成N+高浓度区。即为阴极区N+,结深15∽30μm,表面浓度3∽9x1020
P+扩散:对阳极端P1区表面作高浓度P型扩散,形成P高浓度区。即为阳极区P+,结深15∽30μm,表面浓度为2∽9.0x1020
将做好的晶闸管硅晶片高温焊接在钼片上,对短基区P2、阴极区N2表面进行金属蒸镀后再选择性刻蚀,形成门极G、阴极K,钼片作为芯片的阳极A。
少子寿命控制:对芯片采用电子辐照的方法控制少子寿命为10∽30μS;根据使用要求,调节关断时间为40∽120μs。
对半导体芯片台面进行机械磨角造型,正斜角磨负度大小为:20o≤θ1≤60o,负斜角磨角角度θ2大小为:1.5o≤θ2≤5o。
最后将半导体芯片与管壳下封接件1、定位环2、垫片4、门极组件5、上封接件6封装,完成本发明快速晶闸管的最终封装和测试。并可根据用户需求可装配成图10型组件,提供用户使用。 
按照上述技术方案制作了Φ100mm圆弧形渐开线快速晶闸管方案(TS11D01)与分段渐开线快速晶闸管方案(TS12D03)产品,其测试参数对比如下:
Figure 2012102321830100002DEST_PATH_IMAGE001
Figure 846493DEST_PATH_IMAGE002
数据表明,按照2个方案制作的快速晶闸管其动态开通参数、通态压降比较接近,但使用分段渐开线快速晶闸管方案生产的产品,其阻断电压可提高500V。
Figure 2012102321830100002DEST_PATH_IMAGE003
以上试验结果表明,两种方案制作的快速晶闸管器件,动态参数、通流能力等无明显区别,其它特性参数大体相当。分段渐开线与圆弧形渐开线门极可以达到同样的快开通效果。
在本发明的门极G和阴极K之间施加较小的触发电流时(通常50∽400mA),晶闸管开通。半导体芯片直径为Φ76.2∽Φ100,阻断电压达3000∽5000V、平均通态电流IT(AV)达1800A∽4000A。电流上升率di/dt可达1000A/μs。关断时间为40∽120μs。适用频率200∽2kHz。

Claims (10)

1.高压快速晶闸管,由管壳下封接件(1)、定位环(2)、半导体芯片(3)、垫片(4)、门极组件(5)、上封接件(6)封装而成,半导体芯片由硅片、钼片烧结而成,硅片包括PNPN三端结构,分为阳极区P1、长基区N1、短基区P2和阴极区N2,半导体芯片三个端子分别为阳极A、阴极K和门极G,其特征在于:在所述的阳极区P1表面增设阳极区P+,使硅片为P+PNPN三端结构;所述的阴极区N2为均匀分布有旋转环绕门极G的区域,门极G为与阴极区N2对应的渐开线指条。
2.根据权利要求1所述的高压快速晶闸管,其特征在于:所述的阳极区P1与短基区P2的结深相同。
3.根据权利要求1所述的高压快速晶闸管,其特征在于:所述的阳极区P1结深小于短基区P2结深。
4.根据权利要求1、2或3所述的高压快速晶闸管,其特征在于:所述的旋转环绕门极G为圆弧形渐开线区域,渐开线指条为对应的圆弧形渐开线指条。
5.根据权利要求1、2或3所述的高压快速晶闸管,其特征在于:所述的旋转环绕门极G为分段渐开线区域,渐开线指条为对应的分段渐开线指条。
6.根据权利要求1、2或3所述的高压快速晶闸管,其特征在于:所述的旋转环绕门极G的渐开线指条为4∽6条。
7.根据权利要求1、2或3所述的高压快速晶闸管,其特征在于:所述的半导体芯片台面正斜角磨负度大小为:20o≤θ1≤60o,负斜角磨角角度θ2大小为:1.5o≤θ2≤5o。
8.根据权利要求1或2所述的高压快速晶闸管,其特征在于:所述的硅片厚度为500-950μm,其中阳极区P+表面杂质浓度2∽9×1020/cm3,阳极区P1、短基区P2表面杂质浓度为2∽8×1017/cm3,阴极区N2表面杂质浓度为3∽9×1020/cm3,阳极区P+结深为10∽30μm,阳极区P1、短基区P2结深为80∽140μm,阴极区N2的结深为15∽30μm。
9.根据权利要求1、2或3所述的高压快速晶闸管,其特征在于:所述的硅片厚度为500-950μm,其中阳极区P+表面杂质浓度2∽9×1020/cm3,阳极区P1、短基区P2表面杂质浓度为2∽8×1017/cm3,阴极区N2表面杂质浓度为3∽9×1020/cm3,阳极区P+结深为15∽30μm,阳极区P1结深为50∽90μm,短基区P2结深为80∽140μm,阴极区N2的结深为15∽30μm,阳极区P1比短基区P2浅30∽50μm。
10.一种制造权利要求1、2或3所述的高压快速晶闸管的工艺方法,包括以下步骤:
①选用厚度为500-950μm、电阻率为180∽320Ω·cm、晶向<111>或<100>、N型NTD单晶硅片,硅片双面采用磷吸收工艺处理;
②硅片双面通过Al、Ga双杂质分布扩散形成阳极区P1、短基区P2,阳极区P1与短基区P2的结深为80∽140μm,阳极区P1、短基区P2表面杂质浓度为2∽8×1017/cm3
或者硅片双面通过Al、Ga双杂质分布扩散形成阳极区P1、短基区P2,将阳极区P1进行减薄处理,短基区P2的结深为80∽140μm,阳极区P1的结深为50∽90μm;
③对未减薄处理的阳极区P1进行硼扩散后形成阳极区P+,阳极区P+结深为10∽30μm,阳极区P+表面杂质浓度2∽9×1020/cm3
或者对减薄处理的阳极区P1进行硼扩散后形成阳极区P+,阳极区P+结深为15∽30μm,阳极区P+表面杂质浓度2∽9×1020/cm3
④对短基区P2上进行选择性磷扩散形成阴极区N2,阴极区N2表面浓度为3∽9.5x1020,阴极区N2结深为15∽30μm;
⑤对硅片和钼片进行高温焊接,对短基区P2、阴极区N2表面进行金属蒸镀后再选择性刻蚀,形成门极G、阴极K,钼片作为芯片的阳极A;
⑥对芯片采用电子辐照的方法控制少子寿命为10∽30μs,调节关断时间为40∽120μs;
⑦对半导体芯片台面进行机械磨角造型,正斜角磨负度大小为:20o≤θ1≤60o,负斜角磨角角度θ2大小为:1.5o≤θ2≤5o;
⑧最后将半导体芯片与管壳下封接件1、定位环2、垫片4、门极组件5、上封接件6封装。
CN201210232183.0A 2012-07-06 2012-07-06 高压快速晶闸管 Pending CN103531622A (zh)

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CN109494206A (zh) * 2017-09-12 2019-03-19 株洲中车时代电气股份有限公司 一种晶闸管
CN111128931A (zh) * 2018-10-30 2020-05-08 株洲中车时代电气股份有限公司 一种整流管管壳

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CN109494206A (zh) * 2017-09-12 2019-03-19 株洲中车时代电气股份有限公司 一种晶闸管
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