CN103514313A - Method for processing information - Google Patents

Method for processing information Download PDF

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Publication number
CN103514313A
CN103514313A CN201210227003.XA CN201210227003A CN103514313A CN 103514313 A CN103514313 A CN 103514313A CN 201210227003 A CN201210227003 A CN 201210227003A CN 103514313 A CN103514313 A CN 103514313A
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China
Prior art keywords
parts
information
circuit diagram
components
top layer
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Pending
Application number
CN201210227003.XA
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Chinese (zh)
Inventor
王睿智
慕少宁
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Lenovo Beijing Ltd
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Lenovo Beijing Ltd
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Application filed by Lenovo Beijing Ltd filed Critical Lenovo Beijing Ltd
Priority to CN201210227003.XA priority Critical patent/CN103514313A/en
Publication of CN103514313A publication Critical patent/CN103514313A/en
Pending legal-status Critical Current

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Abstract

The invention discloses a method for processing information. According to the method, a circuit diagram net list of a PCB is led in, then whether the circuit diagram net list comprises packaging information of top layer component and parts in package on package or not can be judged, and if yes, the packaging information is read and a PCB circuit diagram is generated according to the packaging information. Due to the fact that the PCB circuit diagram can be directly generated according to the packaging information under the condition that the packaging information of the top layer components and parts exists in the circuit diagram net list, manual confirmation is not needed any more, and the process of generating an electronic product is accelerated.

Description

A kind of information processing method
Technical field
The present invention relates to technical field of information processing, particularly relate to a kind of information processing method.
Background technology
Along with scientific and technical development, the electronic product more and more miniaturization that also becomes.
In the production run of electronic product, for the large batch of commercial production of carrying out, often use automatic processing device (as mechanical arm) to realize assembling and the welding of each components and parts in electronic product.Concrete, automatic processing device need to be placed on corresponding components and parts on the position of stipulating in pcb board according to manufacturability information such as the components and parts coordinate in printed circuit board (PCB) (PCB, Printed Circuit Board), directions, and carries out installation process.
Due to the needs of miniaturization of electronic products, during relating to, present circuit board there is stacked package technology (POP, Package on Package).POP technology can be placed components and parts on the components and parts of bottom again, and the stacked package of a plurality of storage-type components and parts can reach 8 layers, can significantly dwindle the size of electronic product.But owing to using after POP technology, the components and parts above bottom components and parts are not and pcb board is direct is electrically connected, so prior art does not embody and is positioned at the components and parts above bottom components and parts in circuit theory diagrams.This has also caused circuit theory diagrams to be output as after PCB figure, there is no components and parts and the packaging information such as coordinate, direction thereof above bottom components and parts in PCB figure.If there is no these packaging information, automatic processing device just cannot be realized the Auto-mounting to these components and parts.Therefore, existing electronic product production method can only be carried out the packaging information such as the coordinate of these components and parts of manual confirmation and direction by slip-stick artist, make the production run of electronic product slow, is unfavorable for that the high-efficient automatic of electronic product is produced.
Summary of the invention
For solving the problems of the technologies described above, the embodiment of the present invention provides a kind of information processing method, to realize the high-efficient automatic of electronic product, produces, and technical scheme is as follows:
, for generating pcb board circuit diagram, the pcb board that described pcb board is stacked package, described method comprises:
Import the circuit diagram net list of described pcb board;
Judge that whether described circuit diagram net list comprises the packaging information of the top layer components and parts part in described stacked package, if so, reads described packaging information;
According to described packaging information, generate described pcb board circuit diagram.
Preferably, described packaging information at least comprises or any number of combinations in dimension information, directional information and coordinate information.
Preferably, in the described pcb board circuit diagram generating, other components and parts electrical isolation in the top layer components and parts part in described stacked package and described pcb board circuit diagram.
Preferably, when described circuit diagram net table does not comprise the packaging information of the top layer components and parts part in described stacked package, generate the first information.
Preferably, described dimension information is consistent with the physical size of top layer components and parts part in described stacked package.
Preferably, described directional information is corresponding with the direction of bottom components and parts in described stacked package.
Preferably, described coordinate information is corresponding with the coordinate of bottom components and parts in described stacked package.
Preferably, also comprise: according to the described pcb board circuit diagram generating, the top layer components and parts in described stacked package are partly carried out to installation process.
By applying above technical scheme, a kind of information processing method that the embodiment of the present invention provides, can be after importing the circuit diagram net list of pcb board, whether decision circuitry figure net list comprises the packaging information of the top layer components and parts part in stacked package, if so, read packaging information and generate pcb board circuit diagram according to packaging information.Due to can be in the situation that circuit diagram net list exists top layer components and parts part packaging information, directly according to this packaging information, generate pcb board circuit diagram, so the present invention need not carry out manual confirmation again, accelerated the generative process of electronic product.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, to the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described below, apparently, the accompanying drawing the following describes is only some embodiment that record in the present invention, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
The schematic flow sheet of a kind of information processing method that Fig. 1 provides for the embodiment of the present invention;
The schematic flow sheet of the another kind of information processing method that Fig. 2 provides for the embodiment of the present invention;
The schematic flow sheet of the another kind of information processing method that Fig. 3 provides for the embodiment of the present invention.
Embodiment
In order to make those skilled in the art person understand better the technical scheme in the present invention, below in conjunction with the accompanying drawing in the embodiment of the present invention, technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is only the present invention's part embodiment, rather than whole embodiment.Embodiment based in the present invention, those of ordinary skills, not making the every other embodiment obtaining under creative work prerequisite, should belong to the scope of protection of the invention.
A kind of information processing method that the embodiment of the present invention provides, for generating pcb board circuit diagram, the pcb board that described pcb board is stacked package, as shown in Figure 1, described method can comprise:
S100, import the circuit diagram net list of described pcb board;
Be understandable that, circuit diagram net list can be converted to by circuit theory diagrams.In the whole production run of electronic equipment, schematic diagram design is a link on basis.Concrete, can in circuit theory diagrams, add top layer components and parts in stacked package is also that top layer components and parts add packaging information.Like this, when circuit theory diagrams being converted to after circuit diagram net list, the packaging information of top layer components and parts will be added in circuit diagram net list.In actual applications, the top layer components and parts that add in circuit theory diagrams can be only schematic components and parts.Because top layer components and parts are superimposed upon on the components and parts of bottom, therefore as long as obtain the packaging information of top layer components and parts, top layer components and parts can be correctly installed.In order not make the existence of top layer components and parts in circuit diagram that other components and parts in circuit theory diagrams are formed and disturbed, preferred, other components and parts electrical isolation in top layer components and parts and circuit theory diagrams.
S200, judge that whether described circuit diagram net list comprises the packaging information of top layer components and parts in described stacked package part, if so, performs step S300;
Be understandable that, different components and parts all have different names, as the first electric capacity called after C1, and the second electric capacity called after C2.After obtaining the name of top layer components and parts, just can search this and name corresponding packaging information.
Wherein, described packaging information can at least comprise or any number of combinations in dimension information, directional information and coordinate information.
Concrete, described dimension information can be consistent with the physical size of top layer components and parts part in described stacked package.Be understandable that, when the physical size of dimension information and top layer components and parts part in stacked package is consistent, electron device installing mechanism (as mechanical arm) just can directly capture and install components and parts according to the dimension information of components and parts, more convenient.Certainly, when electron device installing mechanism is elasticity installing mechanism or while having the installing mechanism of detection means magnitude function, in packaging information, also can not comprise dimension information.
Concrete, described directional information can be corresponding with the direction of bottom components and parts in described stacked package.Be understandable that, because a lot of components and parts have a plurality of pins, the corresponding electric attribute of each pin might not be identical, while therefore installing, need to electronic devices and components, install according to the lead-in wire having defined in printed circuit board (PCB).In actual applications, only need to install according to directional information (as direction signs).Certainly, for devices such as picture resistance, electric capacity, in its packaging information, also can not comprise directional information.
Concrete, coordinate information can be corresponding with the coordinate of bottom components and parts in described stacked package.Be understandable that, in the autoinstall procedure of components and parts, electron device installing mechanism need to be learned the installation site of components and parts, components and parts are placed on its corresponding position, realizes correct electrical connection.
S300, read described packaging information;
In actual applications, the packaging information of the packaging information of described top layer components and parts and other components and parts together can be read, to shorten the time of reading.
S400, according to described packaging information, generate described pcb board circuit diagram.
Be understandable that, according to the packaging information of electronic devices and components, electron device mounting structure just can be installed to electronic devices and components on corresponding position.
Because the top layer components and parts part in stacked package does not have direct electrical connection (top layer components and parts part is directly connected on its lower floor's components and parts) with generated pcb board circuit diagram, therefore, in the described pcb board circuit diagram generating, the top layer components and parts part in described stacked package can with other components and parts electrical isolation in described pcb board circuit diagram.
A kind of information processing method that the embodiment of the present invention provides, can be after importing the circuit diagram net list of pcb board, whether decision circuitry figure net list comprises the packaging information of the top layer components and parts part in stacked package, if so, read packaging information and generate pcb board circuit diagram according to packaging information.Due to can be in the situation that circuit diagram net list exists top layer components and parts part packaging information, directly according to this packaging information, generate pcb board circuit diagram, so the present invention need not carry out manual confirmation again, accelerated the generative process of electronic product.
As shown in Figure 2, in the another kind of information processing method that the embodiment of the present invention provides, can also comprise:
S500, when described circuit diagram net table does not comprise the packaging information of top layer components and parts in described stacked package part, generate the first information.
Concrete, the first information can be: in cue circuit figure net list, do not have the information of top layer components and parts part packaging information, also can add for prompting the information of top layer components and parts part packaging information.Wherein, the first information can be exported by output devices such as display, loudspeakers, and the present invention does not limit at this.
While being understandable that the information that does not have top layer components and parts part packaging information in the figure net list of ,Dang road, technician is pointed out, can prevent the situation of top layer components and parts packaging information disappearance, further guaranteed the Fast Installation to top layer components and parts.
As shown in Figure 3, in the another kind of information processing method that the embodiment of the present invention provides, can also comprise:
S600, according to the described pcb board circuit diagram generating, the top layer components and parts in described stacked package are partly carried out to installation process.
Be understandable that, in obtaining stacked package, after the packaging information of top layer components and parts part, just can control components and parts installing mechanism top layer components and parts are partly installed.
As seen through the above description of the embodiments, those skilled in the art can be well understood to the mode that the present invention can add essential general hardware platform by software and realizes.Understanding based on such, the part that technical scheme of the present invention contributes to prior art in essence in other words can embody with the form of software product, this computer software product can be stored in storage medium, as ROM/RAM, magnetic disc, CD etc., comprise that some instructions are with so that a computer equipment (can be personal computer, server, or the network equipment etc.) carry out the method described in some part of each embodiment of the present invention or embodiment.
Each embodiment in this instructions all adopts the mode of going forward one by one to describe, between each embodiment identical similar part mutually referring to, each embodiment stresses is the difference with other embodiment.The present invention can be used in numerous general or special purpose computingasystem environment or configuration.For example: personal computer, server computer, handheld device or portable set, plate equipment, multicomputer system, the system based on microprocessor, set top box, programmable consumer-elcetronics devices, network PC, small-size computer, mainframe computer, comprise distributed computing environment of above any system or equipment etc.
The present invention can describe in the general context of the computer executable instructions of being carried out by computing machine, for example program module.Usually, program module comprises the routine carrying out particular task or realize particular abstract data type, program, object, assembly, data structure etc.Also can in distributed computing environment, put into practice the present invention, in these distributed computing environment, by the teleprocessing equipment being connected by communication network, be executed the task.In distributed computing environment, program module can be arranged in the local and remote computer-readable storage medium that comprises memory device.
It should be noted that, in this article, relational terms such as the first and second grades is only used for an entity or operation to separate with another entity or operational zone, and not necessarily requires or imply and between these entities or operation, have the relation of any this reality or sequentially.
The above is only the specific embodiment of the present invention; it should be pointed out that for those skilled in the art, under the premise without departing from the principles of the invention; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.

Claims (8)

1. an information processing method, is characterized in that, for generating pcb board circuit diagram, and the pcb board that described pcb board is stacked package, described method comprises:
Import the circuit diagram net list of described pcb board;
Judge that whether described circuit diagram net list comprises the packaging information of the top layer components and parts part in described stacked package, if so, reads described packaging information;
According to described packaging information, generate described pcb board circuit diagram.
2. method according to claim 1, is characterized in that, described packaging information at least comprises or any number of combinations in dimension information, directional information and coordinate information.
3. method according to claim 1 and 2, is characterized in that, in the described pcb board circuit diagram generating, and other components and parts electrical isolation in the top layer components and parts part in described stacked package and described pcb board circuit diagram.
4. method according to claim 1, is characterized in that, when described circuit diagram net table does not comprise the packaging information of the top layer components and parts part in described stacked package, generates the first information.
5. method according to claim 2, is characterized in that, described dimension information is consistent with the physical size of top layer components and parts part in described stacked package.
6. method according to claim 2, is characterized in that, described directional information is corresponding with the direction of bottom components and parts in described stacked package.
7. method according to claim 2, is characterized in that, described coordinate information is corresponding with the coordinate of bottom components and parts in described stacked package.
8. method according to claim 1, is characterized in that, also comprises: according to the described pcb board circuit diagram generating, the top layer components and parts in described stacked package are partly carried out to installation process.
CN201210227003.XA 2012-06-29 2012-06-29 Method for processing information Pending CN103514313A (en)

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Application Number Priority Date Filing Date Title
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111475997A (en) * 2020-04-10 2020-07-31 广州通达汽车电气股份有限公司 Bit number arranging method, system, equipment and medium for printed circuit board diagram

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003016132A (en) * 2001-07-03 2003-01-17 Mitsubishi Electric Corp Device for designing circuit diagram of printed circuit board, and method and program for designing circuit diagram
US20090072289A1 (en) * 2007-09-18 2009-03-19 Dae-Ik Kim Semiconductor device having reduced thickness, electronic product employing the same, and methods of fabricating the same
CN101567028A (en) * 2009-06-01 2009-10-28 杭州电子科技大学 Modularized hardware elementary diagram automatic generating method
CN102097333A (en) * 2010-11-01 2011-06-15 华为终端有限公司 Method for designing circuit board, circuit board and electronic device
US20110309468A1 (en) * 2010-06-17 2011-12-22 Samsung Electronics Co., Ltd. Semiconductor chip package and method of manufacturing the same

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003016132A (en) * 2001-07-03 2003-01-17 Mitsubishi Electric Corp Device for designing circuit diagram of printed circuit board, and method and program for designing circuit diagram
US20090072289A1 (en) * 2007-09-18 2009-03-19 Dae-Ik Kim Semiconductor device having reduced thickness, electronic product employing the same, and methods of fabricating the same
CN101567028A (en) * 2009-06-01 2009-10-28 杭州电子科技大学 Modularized hardware elementary diagram automatic generating method
US20110309468A1 (en) * 2010-06-17 2011-12-22 Samsung Electronics Co., Ltd. Semiconductor chip package and method of manufacturing the same
CN102097333A (en) * 2010-11-01 2011-06-15 华为终端有限公司 Method for designing circuit board, circuit board and electronic device

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
宋娜: ""臂式可穿戴计算机的硬件研究与设计"", 《中国优秀硕士学位论文全文数据库 信息科技辑》 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111475997A (en) * 2020-04-10 2020-07-31 广州通达汽车电气股份有限公司 Bit number arranging method, system, equipment and medium for printed circuit board diagram

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Application publication date: 20140115