CN103490765A - Common-mode level stabilizing circuit - Google Patents
Common-mode level stabilizing circuit Download PDFInfo
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- CN103490765A CN103490765A CN201310445171.0A CN201310445171A CN103490765A CN 103490765 A CN103490765 A CN 103490765A CN 201310445171 A CN201310445171 A CN 201310445171A CN 103490765 A CN103490765 A CN 103490765A
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Abstract
The embodiment of the invention provides a common-mode level stabilizing circuit. The common-mode level stabilizing circuit comprises a high-pass filter circuit, a source follower circuit and a voltage lifting circuit, or comprises a high-pass filter circuit, a source follower circuit and a voltage dropping circuit. In the common-mode level stabilizing circuit, N channel insulated gate type field-effect tubes simple in structure and small in size are utilized to form the voltage lifting circuit, or P channel insulated gate type field-effect tubes simple in structure and small in size are utilized to form the voltage dropping circuit, an open-loop structure is adopted to stabilize an SF output common-mode level, therefore design difficulty and risks brought by a negative feedback circuit are reduced, and the problem of instability existing in the circuit is avoided. In addition, in the common-mode level stabilizing circuit, the negative feedback circuit formed by operational amplifiers with high power consumption and large areas are not needed, and the area and power consumption of the circuit are effectively reduced.
Description
Technical field
The embodiment of the present invention relates to circuit engineering, relates in particular to a kind of common mode electrical level stabilizing circuit.
Background technology
In the receiver module of Ethernet chip, often adopt AFE (analog front end) (Analog Front End, AFE) the circuit preliminary treatment receives the Frequency Response of signal, so that follow-up pattern conversion (analog-digital conversion, ADC) circuit and digital circuit can better be processed the reception signal.In the AFE circuit, adopt the circuit structure of high pass filter (High Pass Filter, HPF), source class follower (Source Follower, SF) and low pass filter (Low Pass Filter, LPF) combination.In this structure, in order to stablize AFE circuit output common mode level, make the AFE under different process angle (process corner) that a stable and definite output common mode level be arranged, often between HPF and SF, insert common-mode feedback (Common Mode FeedBack, CMFB) circuit, thereby stablize the common mode electrical level of SF output, then determine the common mode electrical level of AFE circuit output.
The circuit structure that Fig. 1 is stable SF output common mode level of the prior art.As shown in Figure 1, this main circuit will comprise: the HPF circuit is comprised of capacitor C 1, C2, resistance R 1, R2; The SF circuit, be comprised of metal-oxide-semiconductor M1, M2 and current source I1, I2; The CMFB circuit, be comprised of resistance R 3, R4 and operational amplification circuit A1, and this main circuit will be by the control to the CMFB circuit to realize SF output common mode level.Concrete, at first, the output common mode level Vcm that resistance R 3 in the CMFB circuit, R4 detect SF, Vcm=(voutp+voutn)/2, secondly, the difference of amplifying between Vcm and Vref by operational amplifier A 1, A1 will adjust according to the magnitude relationship of Vcm and Vref the common mode electrical level of HPF, thereby change the output common mode level of SF; Finally, after circuit is stable, because the gain of operational amplifier A 1 is very large, make last Vcm ≈ Vref, thereby determine the output common mode level of SF.
Yet, in above-mentioned technology, introduced in circuit and take the negative-feedback circuit that operational amplifier is core, make the stability of negative-feedback circuit become one must careful design problem, increased design difficulty and the risk of circuit.
Summary of the invention
The embodiment of the present invention provides a kind of common mode electrical level stabilizing circuit, adopts open loop structure to stablize SF output common mode level, to reduce design difficulty and the risk that adopts negative-feedback circuit to bring.
First aspect, the embodiment of the present invention provides a kind of common mode electrical level stabilizing circuit, comprising:
Circuit of high pass filter comprises: the first electric capacity, the second electric capacity, the first resistance and the second resistance;
The source class follower circuit comprises: the first field effect transistor, the second field effect transistor, the first current source and the second current source;
Voltage lifting circuit comprises: the 3rd field effect transistor, the 3rd current source and the 4th current source;
Wherein, described the first electric capacity is connected with the grid of described the first field effect transistor, and be connected with the drain electrode of described the 3rd field effect transistor by described the second resistance, described the second electric capacity is connected with the grid of described the second field effect transistor, and is connected with the drain electrode of described the 3rd field effect transistor by described the first resistance;
The grid of described the first field effect transistor is connected with the drain electrode of described the 3rd field effect transistor by described the second resistance, the source electrode of described the first field effect transistor is connected with an end of described the first current source, the other end of described the first current source is connected with ground, and the drain electrode of described the first field effect transistor is connected with supply voltage;
The grid of described the second field effect transistor is connected with the drain electrode of described the 3rd field effect transistor by described the first resistance, the source electrode of described the second field effect is connected with an end of described the second current source, the other end of described the second current source is connected with ground, and the drain electrode of described the second field effect transistor is connected with supply voltage;
The drain electrode of described the 3rd field effect transistor is connected with an end of described the 3rd current source, and the other end of described the 3rd current source is connected with supply voltage; The source electrode of described the 3rd field effect transistor is connected with an end of described the 4th current source, and the grid of described the 3rd field effect transistor is connected with the drain electrode of described the 3rd field effect transistor, and the other end of described the 4th current source is connected with ground;
The source electrode of described the 3rd field effect transistor is connected with input reference voltage, and the mean value of the source voltage of the source voltage of described the first field effect transistor and described the second field effect transistor is the output common mode level.
In the first aspect first, in possible implementation, the current density of the current density of described the first field effect transistor, described the second field effect transistor and the current density of described the 3rd field effect transistor equate.
The possible implementation in conjunction with the first of first aspect, at the second aspect first, in possible implementation, described output common mode level equals described input reference voltage.
The first or the possible implementation of the second in conjunction with first aspect, first aspect, in the third the possible implementation aspect first, described the first field effect transistor, described the second field effect transistor, described the 3rd field effect transistor are N raceway groove insulating gate type field effect tube.
Second aspect, the embodiment of the present invention provides a kind of common mode electrical level stabilizing circuit, comprising:
Circuit of high pass filter comprises: the first electric capacity, the second electric capacity, the first resistance and the second resistance;
Source follower circuit comprises: the first field effect transistor, the second field effect transistor, the first current source and the second current source;
The voltage drop circuit comprises: the 3rd field effect transistor, the 3rd current source and the 4th current source;
Wherein, described the first electric capacity is connected with the grid of described the second field effect transistor, and be connected with the drain electrode of described the 3rd field effect transistor by described the second resistance, described the second electric capacity is connected with the grid of described the first field effect transistor, and is connected with the drain electrode of described the 3rd field effect transistor by described the first resistance;
The grid of described the first field effect transistor is connected with the drain electrode of described the 3rd field effect transistor by described the first resistance, the source electrode of described the first field effect transistor is connected with an end of described the first current source, the other end of described the first current source is connected with supply voltage, and the drain electrode of described the first field effect transistor is connected with ground;
The grid of described the second field effect transistor is connected with the drain electrode of described the 3rd field effect transistor by described the second resistance, the source electrode of described the second field effect transistor is connected with an end of described the second current source, the other end of described the second current source is connected with supply voltage, and the drain electrode of described the second field effect transistor is connected with ground;
The source electrode of described the 3rd field effect transistor is connected with an end of described the 3rd current source, the other end of described the 3rd current source is connected with supply voltage, the drain electrode of described the 3rd field effect transistor is connected with an end of described the 4th current source, the grid of described the 3rd field effect transistor is connected with the drain electrode of described the 3rd field effect transistor, and the other end of described the 4th current source is connected with ground;
The source electrode of described the 3rd field effect transistor is connected with input reference voltage, and the mean value of the source voltage of the source voltage of described the first field effect transistor and described the second field effect transistor is the output common mode level.
In the possible implementation of the first aspect second, the current density of the current density of described the first field effect transistor, described the second field effect transistor, the current density of described the 3rd field effect transistor equate.
The possible implementation in conjunction with the first of second aspect, in the possible implementation of the second aspect second, described output common mode level voltage equals described input reference voltage.
The first or the possible implementation of the second in conjunction with second aspect, second aspect, in the third possible implementation aspect second, described the first field effect transistor, described the second field effect transistor, described the 3rd field effect transistor are P raceway groove insulating gate type field effect tube.
The common mode electrical level stabilizing circuit that the embodiment of the present invention provides, comprise circuit of high pass filter, source follower circuit, voltage lifting circuit; Perhaps, this circuit comprises: circuit of high pass filter, source follower circuit, voltage drop circuit.In the embodiment of the present invention, utilize N raceway groove insulating gate type field effect tube simple in structure, small volume, form voltage lifting circuit; Perhaps, utilize P raceway groove insulating gate type field effect tube simple in structure, small volume, form the voltage drop circuit, adopt open loop structure to stablize SF output common mode level, thereby reduce the design difficulty and the risk that adopt negative-feedback circuit to bring, avoid problem in circuit, the problem includes: unsettled problem.In addition, in this common mode electrical level stabilizing circuit, without adopting all negative-feedback circuits of larger operational amplifier composition of power consumption and area, circuit area and power consumption have been effectively reduced.
The accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, below will the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing.
The circuit structure that Fig. 1 is stable SF output common mode level of the prior art;
The electrical block diagram that Fig. 2 A is a kind of common mode electrical level stabilizing circuit of the present invention embodiment;
The particular circuit configurations schematic diagram that Fig. 2 B is a kind of common mode electrical level stabilizing circuit of the present invention embodiment;
Fig. 3 A invents the electrical block diagram of another kind of common mode electrical level stabilizing circuit embodiment;
The particular circuit configurations schematic diagram that Fig. 3 B is the another kind of common mode electrical level stabilizing circuit of the present invention embodiment.
Embodiment
For the purpose, technical scheme and the advantage that make the embodiment of the present invention clearer, below in conjunction with the accompanying drawing in the embodiment of the present invention, technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is the present invention's part embodiment, rather than whole embodiment.Embodiment based in the present invention, those of ordinary skills, not making under the creative work prerequisite the every other embodiment obtained, belong to the scope of protection of the invention.
The electrical block diagram that Fig. 2 A is a kind of common mode electrical level stabilizing circuit of the present invention embodiment, the particular circuit configurations schematic diagram that Fig. 2 B is a kind of common mode electrical level stabilizing circuit of the present invention embodiment, a kind of concrete circuit structure that Fig. 2 B is the common mode electrical level stabilizing circuit shown in Fig. 2 A.As shown in Figure 2 A and 2 B, the common mode electrical level stabilizing circuit of the present embodiment comprises: circuit of high pass filter comprises: the first capacitor C 1, the second capacitor C 2, the first resistance R 1 and the second resistance R 2; The source class follower circuit comprises: the first field effect transistor M1, the second field effect transistor M2, the first current source I1 and the second current source I2; Voltage lifting circuit comprises: the 3rd field effect transistor M3, the 3rd current source I3 the 4th current source I4, wherein, the first field effect transistor M1, the second field effect transistor M2, the 3rd field effect transistor M3 are N raceway groove insulating gate type field effect tube.
Referring to Fig. 2 A and Fig. 2 B, in the present embodiment, in circuit of high pass filter, the annexation of each element is as follows: an end of the first capacitor C 1 is connected with voltage vinp, the other end is connected with the grid of the first field effect transistor M1, and be connected with the drain electrode of the 3rd field effect transistor M3 by the second resistance R 2, one end of the second capacitor C 2 is connected with voltage vinn, and the other end is connected with the grid of the second field effect transistor M2, and is connected with the drain electrode of the 3rd field effect transistor M3 by the first resistance R 1.
The annexation of each element in the source class follower circuit is as follows: the grid of the first field effect transistor M1 is connected with the drain electrode of the 3rd field effect transistor M3 by the second resistance R 2, the source electrode of the first field effect transistor M1 is connected with the end of the first current source I1, the other end of this first current source I1 is connected with ground, and the drain electrode of the first field effect transistor M1 is connected with supply voltage; The grid of the second field effect transistor M2 is connected with the drain electrode of the 3rd field effect transistor M3 by the first resistance R 1, the source electrode of the second field effect transistor M2 is connected with the end of the second current source I2, the other end of this second current source I2 is connected with ground, and the drain electrode of the second field effect transistor M2 is connected with supply voltage;
The annexation of each element in voltage lifting circuit is as follows: the source electrode of the 3rd field effect transistor M3 is connected with the end of the 4th current source I4, the other end of the 4th current source I4 is connected with ground, the drain electrode of the 3rd field effect transistor M3 is connected with the end of the 3rd current source I3, the other end of the 3rd current source I3 is connected with supply voltage, and the drain and gate of the 3rd field effect transistor M3 connects.After the drain and gate of the 3rd field effect transistor M3 is joined together, the function of the 3rd field effect transistor M3 is equivalent to diode in the present embodiment.
In the present embodiment, the input reference voltage that the source electrode of the 3rd field effect transistor M3 connects, it is the output common mode level set point that shown in Fig. 2 B, Vref is source follower circuit, also be referred to as reference voltage, the mean value of the source voltage of the source voltage of the first field effect transistor M1 and the second field effect transistor M2 is the output common mode level in the present embodiment.
Concrete, the operation principle of the present embodiment is as follows: at first, input reference voltage Vref is as the output common mode level set point of source follower circuit, in the voltage lifting circuit that the 3rd current source I3, the 4th current source I4 and the 3rd field effect transistor M3 form, because the 3rd current source I3 is identical with the current value size that the 4th current source I4 provides, does not have electric current to flow into or flow out Vref.Therefore, the large young pathbreaker of Vref determines by outside voltage reference, and irrelevant with voltage lifting circuit.Reference voltage Vref after the overvoltage lifting, the drain voltage of the 3rd field effect transistor M3, shown in Fig. 2 B, the size of Vcm_HPF is: Vcm_HPF=vref+V
gs3, V
gs3it is the gate source voltage of the 3rd field effect transistor M3.Secondly, as Vcm_HPF after the SF circuit, the output common mode level Vcm_SF of SF circuit, the i.e. mean value of the source voltage of the source voltage of the first field effect transistor M1 and the second field effect transistor M2 V that will descend on the basis of Vcm_HPF
gs1or V
gs2, wherein, V
gs1be the gate source voltage of the first field effect transistor M1, V
gs2be the gate source voltage of the second field effect transistor M2,
Therefore, in actual implementation process, the first current source I1 and the second current source I2 are designed to provide to the current source of equal and opposite in direction current value, the 3rd current source I3 and the 4th current source I4 are designed to provide to the current source of equal and opposite in direction current value, and guarantee that the first field effect transistor M1, the second field effect transistor M2 are consistent with the current density of the 3rd field effect transistor M3,
can make Vgs1=Vgs2=Vgs3.After meeting above-mentioned condition, the output common mode level Vcm_SF=Vref of source class follower circuit.Wherein, i
1for the current value that the first current source I1 provides, i
2for the current value that the second current source I2 provides, i
3for the current value that the 3rd current source I3 provides, W
1, W
2, W
3be respectively the channel width of the first field effect transistor M1, the second field effect transistor M2, the 3rd field effect transistor M3; L
1, L
2, L
3be respectively the channel length of the first field effect transistor M1, the second field effect transistor M2, the 3rd field effect transistor M3.
The common mode electrical level stabilizing circuit that the embodiment of the present invention provides, utilize N raceway groove insulating gate type field effect tube simple in structure, small volume, form voltage lifting circuit, adopt open loop structure to stablize SF output common mode level, thereby reduce the design difficulty and the risk that adopt negative-feedback circuit to bring, avoid problem in circuit, the problem includes: unsettled problem.In addition, in this common mode electrical level stabilizing circuit, without adopting all negative-feedback circuits of larger operational amplifier composition of power consumption and area, circuit area and power consumption have been effectively reduced.
Fig. 3 A invents the electrical block diagram of another kind of common mode electrical level stabilizing circuit embodiment, the particular circuit configurations schematic diagram that Fig. 3 B is the another kind of common mode electrical level stabilizing circuit of the present invention embodiment, a kind of concrete circuit structure that Fig. 3 B is the common mode electrical level stabilizing circuit shown in Fig. 3 A.As shown in Fig. 3 A and Fig. 3 B, the common mode electrical level stabilizing circuit of the present embodiment comprises: circuit of high pass filter comprises: the first capacitor C 1, the second capacitor C 2, the first resistance R 1 and the second resistance R 2; The source class follower circuit comprises: the first field effect transistor M1, the second field effect transistor M2, the first current source I1 and the second current source I2; The voltage drop circuit comprises: the 3rd field effect transistor M3, the 3rd current source I3 the 4th current source I4, wherein, the first field effect transistor M1, the second field effect transistor M2, the 3rd field effect transistor M3 are P raceway groove insulating gate type field effect tube.
Referring to Fig. 3 A and Fig. 3 B, in the present embodiment, in circuit of high pass filter, the annexation of each element is as follows: an end of the first capacitor C 1 is connected with voltage vinp, the other end is connected with the grid of the second field effect transistor M2, and be connected with the drain electrode of the 3rd field effect transistor M3 by the second resistance R 2, one end of the second capacitor C 2 is connected with voltage vinn, and the other end is connected with the grid of the first field effect transistor M1, and is connected with the drain electrode of the 3rd field effect transistor M3 by the first resistance R 1.
The annexation of each element in the source class follower circuit is as follows: the grid of the first field effect transistor M1 connects by the drain electrode of the first resistance R 1 the 3rd field effect transistor M3, the source electrode of the first field effect transistor M1 is connected with the end of the first current source I1, the other end of the first current source I1 is connected with supply voltage, and the drain electrode of the first field effect transistor M1 is connected with ground; The grid of the second field effect transistor M2 is connected with the drain electrode of the 3rd field effect transistor M3 by the second resistance R 2, the source electrode of the second field effect transistor M2 is connected with the end of the second current source I2, the other end of this second current source I2 is connected with supply voltage, and the drain electrode of the second field effect transistor M2 is connected with ground.
The annexation of each element in the voltage drop circuit is as follows: the 3rd field effect transistor M3 source electrode is connected with the end of the 3rd current source I3, the other end of the 3rd current source I3 is connected with supply voltage, the drain electrode of the 3rd field effect transistor M3 is connected with the end of the 4th current source I4, and the other end of the 4th current source I4 is connected with ground.And the grid of the 3rd field effect transistor M3 is connected with drain electrode.After the drain and gate of the 3rd field effect transistor M3 is joined together, the function of the 3rd field effect transistor M3 is equivalent to diode in the present embodiment.
In the present embodiment, the input reference voltage that the source electrode of the 3rd field effect transistor M3 connects, it is the output common mode level set point that shown in Fig. 3 B, Vref is source follower circuit, also be referred to as reference voltage, the mean value of the source voltage of the source voltage of the first field effect transistor M1 and the second field effect transistor M2 is the output common mode level in the present embodiment.
Concrete, the operation principle of the present embodiment is as follows: at first, input reference voltage Vref is as the output common mode level set point of source follower circuit, in the voltage drop circuit that the 3rd current source I3, the 4th current source I4 and the 3rd field effect transistor M3 form, because the 3rd current source I3 is identical for the current value size provided with the 4th current source I4, and the grid of the 3rd field effect transistor M3 is connected with drain electrode, makes and do not have electric current to flow into or flow out Vref.Therefore, the large young pathbreaker of Vref determines by outside voltage reference, and irrelevant with the voltage drop circuit.Reference voltage Vref after voltage drop, the drain voltage of the 3rd field effect transistor M3, shown in Fig. 3 B, the size of Vcm_HPF is: Vcm_HPF=vref-|V
gs3|, the gate source voltage that Vgs3 is the 3rd field effect transistor M3.Secondly, as Vcm_HPF after the SF circuit, the output common mode level Vcm_SF of SF circuit, the mean value of the source voltage of the source voltage of the first field effect transistor M1 and the second field effect transistor M2 will rise on the basis of Vcm_HPF | V
gs1| or | V
gs2|, wherein, the gate source voltage that Vgs1 is the first field effect transistor M1, the gate source voltage that Vgs2 is the second field effect transistor M2.
Therefore, in actual implementation process, the first current source I1 and the second current source I2 are designed to provide to the current source of equal and opposite in direction current value, the 3rd current source I3 and the 4th current source I4 are designed to provide to the current source of equal and opposite in direction current value, and guarantee that the first field effect transistor M1, the second field effect transistor M2 are consistent with the current density of the 3rd field effect transistor M3,
can make Vgs1=Vgs2=Vgs3.After meeting above-mentioned condition, the output common mode level Vcm_SF=Vref of source class follower circuit.Wherein, i
1for the current value that the first current source I1 provides, i
2for the current value that the second current source I2 provides, i
3for the current value that the 3rd current source I3 provides, W
1, W
2, W
3be respectively the channel width of the first field effect transistor M1, the second field effect transistor M2, the 3rd field effect transistor M3; L
1, L
2, L
3be respectively the channel length of the first field effect transistor M1, the second field effect transistor M2, the 3rd field effect transistor M3.
The common mode electrical level stabilizing circuit that the embodiment of the present invention provides, utilize P raceway groove insulating gate type field effect tube simple in structure, small volume, form the voltage drop circuit, adopt open loop structure to stablize SF output common mode level, thereby reduce the design difficulty and the risk that adopt negative-feedback circuit to bring, avoid problem in circuit, the problem includes: unsettled problem.In addition, in this common mode electrical level stabilizing circuit, without adopting all negative-feedback circuits of larger operational amplifier composition of power consumption and area, circuit area and power consumption have been effectively reduced.
One of ordinary skill in the art will appreciate that: realize that the hardware that all or part of step of above-mentioned each embodiment of the method can be relevant by program command completes.Aforesaid program can be stored in a computer read/write memory medium.This program, when carrying out, is carried out the step that comprises above-mentioned each embodiment of the method; And aforesaid storage medium comprises: various media that can be program code stored such as ROM, RAM, magnetic disc or CDs.
Finally it should be noted that: above each embodiment, only in order to technical scheme of the present invention to be described, is not intended to limit; Although with reference to aforementioned each embodiment, the present invention is had been described in detail, those of ordinary skill in the art is to be understood that: its technical scheme that still can put down in writing aforementioned each embodiment is modified, or some or all of technical characterictic wherein is equal to replacement; And these modifications or replacement do not make the essence of appropriate technical solution break away from the scope of various embodiments of the present invention technical scheme.
Claims (8)
1. a common mode electrical level stabilizing circuit, is characterized in that, comprising:
Circuit of high pass filter comprises: the first electric capacity, the second electric capacity, the first resistance and the second resistance;
The source class follower circuit comprises: the first field effect transistor, the second field effect transistor, the first current source and the second current source;
Voltage lifting circuit comprises: the 3rd field effect transistor, the 3rd current source and the 4th current source;
Wherein, described the first electric capacity is connected with the grid of described the first field effect transistor, and be connected with the drain electrode of described the 3rd field effect transistor by described the second resistance, described the second electric capacity is connected with the grid of described the second field effect transistor, and is connected with the drain electrode of described the 3rd field effect transistor by described the first resistance;
The grid of described the first field effect transistor is connected with the drain electrode of described the 3rd field effect transistor by described the second resistance, the source electrode of described the first field effect transistor is connected with an end of described the first current source, the other end of described the first current source is connected with ground, and the drain electrode of described the first field effect transistor is connected with supply voltage;
The grid of described the second field effect transistor is connected with the drain electrode of described the 3rd field effect transistor by described the first resistance, the source electrode of described the second field effect is connected with an end of described the second current source, the other end of described the second current source is connected with ground, and the drain electrode of described the second field effect transistor is connected with supply voltage;
The drain electrode of described the 3rd field effect transistor is connected with an end of described the 3rd current source, and the other end of described the 3rd current source is connected with supply voltage; The source electrode of described the 3rd field effect transistor is connected with an end of described the 4th current source, and the grid of described the 3rd field effect transistor is connected with the drain electrode of described the 3rd field effect transistor, and the other end of described the 4th current source is connected with ground;
The source electrode of described the 3rd field effect transistor is connected with input reference voltage, and the mean value of the source voltage of the source voltage of described the first field effect transistor and described the second field effect transistor is the output common mode level.
2. common mode electrical level stabilizing circuit according to claim 1, is characterized in that, the current density of the current density of described the first field effect transistor, described the second field effect transistor and the current density of described the 3rd field effect transistor equate.
3. common mode electrical level stabilizing circuit according to claim 2, is characterized in that, described output common mode level equals described input reference voltage.
4. according to the described common mode electrical level stabilizing circuit of claim 1～3 any one, it is characterized in that, described the first field effect transistor, described the second field effect transistor, described the 3rd field effect transistor are N raceway groove insulating gate type field effect tube.
5. a common mode electrical level stabilizing circuit, is characterized in that, comprising:
Circuit of high pass filter comprises: the first electric capacity, the second electric capacity, the first resistance and the second resistance;
Source follower circuit comprises: the first field effect transistor, the second field effect transistor, the first current source and the second current source;
The voltage drop circuit comprises: the 3rd field effect transistor, the 3rd current source and the 4th current source;
Wherein, described the first electric capacity is connected with the grid of described the second field effect transistor, and be connected with the drain electrode of described the 3rd field effect transistor by described the second resistance, described the second electric capacity is connected with the grid of described the first field effect transistor, and is connected with the drain electrode of described the 3rd field effect transistor by described the first resistance;
The grid of described the first field effect transistor is connected with the drain electrode of described the 3rd field effect transistor by described the first resistance, the source electrode of described the first field effect transistor is connected with an end of described the first current source, the other end of described the first current source is connected with supply voltage, and the drain electrode of described the first field effect transistor is connected with ground;
The grid of described the second field effect transistor is connected with the drain electrode of described the 3rd field effect transistor by described the second resistance, the source electrode of described the second field effect transistor is connected with an end of described the second current source, the other end of described the second current source is connected with supply voltage, and the drain electrode of described the second field effect transistor is connected with ground;
The source electrode of described the 3rd field effect transistor is connected with an end of described the 3rd current source, the other end of described the 3rd current source is connected with supply voltage, the drain electrode of described the 3rd field effect transistor is connected with an end of described the 4th current source, the grid of described the 3rd field effect transistor is connected with the drain electrode of described the 3rd field effect transistor, and the other end of described the 4th current source is connected with ground;
The source electrode of described the 3rd field effect transistor is connected with input reference voltage, and the mean value of the source voltage of the source voltage of described the first field effect transistor and described the second field effect transistor is the output common mode level.
6. common mode electrical level stabilizing circuit according to claim 5, is characterized in that, the current density of the current density of described the first field effect transistor, described the second field effect transistor, the current density of described the 3rd field effect transistor equate.
7. common mode electrical level stabilizing circuit according to claim 6, is characterized in that, described output common mode level voltage equals described input reference voltage.
8. according to the described common mode electrical level stabilizing circuit of claim 5～7 any one, it is characterized in that, described the first field effect transistor, described the second field effect transistor, described the 3rd field effect transistor are P raceway groove insulating gate type field effect tube.
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| CN106227287A (en) * | 2016-08-18 | 2016-12-14 | 四川和芯微电子股份有限公司 | There is the low pressure difference linear voltage regulator of protection circuit |
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|---|---|---|---|---|
| US8106700B2 (en) * | 2009-05-01 | 2012-01-31 | Analog Devices, Inc. | Wideband voltage translators |
| US8390335B2 (en) * | 2009-06-24 | 2013-03-05 | Futurewei Technologies, Inc. | Signal buffer amplifier |
| JP2013090136A (en) * | 2011-10-18 | 2013-05-13 | Asahi Kasei Electronics Co Ltd | Source follower circuit |
-
2013
- 2013-09-26 CN CN201310445171.0A patent/CN103490765B/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106227287A (en) * | 2016-08-18 | 2016-12-14 | 四川和芯微电子股份有限公司 | There is the low pressure difference linear voltage regulator of protection circuit |
| CN106227287B (en) * | 2016-08-18 | 2018-06-22 | 四川和芯微电子股份有限公司 | Low pressure difference linear voltage regulator with protection circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103490765B (en) | 2016-03-30 |
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