JP2013090136A - Source follower circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a multistage source follower circuit that ensures an input/output range.SOLUTION: A connection section 11 comprising a MOS transistor M13 having a gate and a drain diode-connected together and having the same channel type as MOS transistors M11 and M12 constituting source follower sections SF11 and SF12, and a current source C13 connected to the drain is disposed between the source follower sections SF11, SF12, an output end of the upstream source follower section SF11 is connected to a source of the MOS transistor M13, and the drain of the MOS transistor M13 is connected to an input end of the downstream source follower section SF12. The direction of an input-output voltage level shift in the connection section 11 is opposite to the direction of an input-output voltage level shift in the source follower sections SF11, SF12, and can act in a direction to cancel the voltage shift to whereby keep the voltage level shift from narrowing down an input/output range.

Description

  The present invention relates to a source follower circuit, and more particularly to a source follower circuit in which a plurality of source follower sections are connected.

Conventionally, a source follower circuit is used in many applications as an output circuit of a solid-state imaging device, an input buffer of a CCD interface AFE, and the like because of its simplicity of structure and small input capacity.
These source follower circuits suppress the increase of input capacity due to the increase in size due to speedup and the kickback to the input from the load circuit connected to the output of the source follower via the source-gate parasitic capacitance. For this purpose, it is often configured by a plurality of stages of source follower units connected in series (see, for example, Patent Document 1).

FIG. 3 shows an example of a multi-stage source follower circuit 30 according to the prior art, and shows a case in which two stages of N-type source follower sections are connected in series.
A source follower circuit 30 having a multi-stage configuration shown in FIG. 3 includes an N-type MOS transistor (hereinafter also simply referred to as a MOS transistor) M31 and a current source C31 constituting the first-stage source follower part SF31, and a second-stage source follower. An N-type MOS transistor (hereinafter also simply referred to as a MOS transistor) M32 and a current source C32 constituting the part SF32.

The drain of the MOS transistor M31 is connected to the power supply VDD, and the current source C31 is connected to the source. Similarly, the drain of the MOS transistor M32 is connected to the power supply VDD, and the current source C32 is connected to the source.
The input signal Vin to the source follower circuit 30 is input to the gate of the MOS transistor M31, and the source voltage of the MOS transistor M31 is output as the output signal Vout1 corresponding to the input signal Vin. This output signal Vout1 is input to the gate of the MOS transistor M32, and the source voltage of the MOS transistor M32 is output as the output signal Vout2 corresponding to the output signal Vout1. A load circuit (not shown) is connected to the source of the MOS transistor M32, and an output signal Vout2 is supplied to the load circuit.

  Here, the size and current amount of the second-stage source follower unit SF32 are determined by the output load that must be driven by the source follower unit SF32. On the other hand, since the first-stage source follower part SF31 only needs to drive the second-stage source follower part SF32, at least the size and current amount of the source follower part SF32 may be significantly smaller than at least the source follower part SF32. As a result, the input capacitance of the first-stage source follower portion SF31 can be made very small, and the parasitic capacitance between the input and output is also connected to the series connection of the parasitic capacitance between the source and gate of each of the two-stage source follower portions SF31 and SF32. Therefore, it becomes very small and kickback can be greatly suppressed.

Japanese Patent No. 3309464

However, in general, in the source follower circuit, the output level is shifted from the input level by ΔV (≈overdrive voltage + threshold voltage of the input MOS transistor) and output.
Therefore, the input / output possible range of the source follower circuit is a range in which the MOS transistors constituting the source follower circuit (including the MOS transistor for current bias of the source follower circuit) can operate in the saturation region even if this ΔV shift occurs. It becomes.

Here, in the case of the source follower circuit 30 having a multi-stage configuration shown in FIG. 3, in each source follower part SF31, SF32, a shift of ΔV1, ΔV2 occurs between the input and output. The transfer function at this time is expressed by the following equation (1).
Vout2 = Vin−ΔV1−ΔV2 (1)
As can be seen from the equation (1), the output (Vout2) is shifted to the lower voltage side by “ΔV1 + ΔV2” with respect to the input (Vin), so that the input / output possible range of the entire source follower circuit 30 is greatly increased. It will decrease.

  In order to secure the input / output range, for example, as shown in FIG. 4, an N-type source follower section SF41 including an N-type MOS transistor M41 and a current source C41 connected to the source thereof, and a P-type MOS transistor M42 In addition, a method of configuring a source follower circuit 40 having a multi-stage configuration by alternately connecting in series with P-type source follower portions SF42 including current sources C42 connected to the sources thereof has been proposed.

  In this case, if the configuration is such that the input-output level differences ΔV1 and ΔV2 of the source follower portions SF41 and SF42 have the same value, in principle, the operation is performed so as to cancel the shift of ΔV1 and ΔV2. The range is the same as a one-stage source follower circuit. However, in reality, P-type MOS transistors and N-type MOS transistors have large variations in MOS transistor manufacturing, so it is difficult to sufficiently offset each other's shift, and as a result, a large input / output range is secured. There is a problem that it cannot be done.

For this reason, a source follower circuit capable of ensuring a sufficient input / output range even when configured in a plurality of stages has been desired.
The present invention has been made in view of the above points, and an object of the present invention is to provide a source follower circuit having a multi-stage configuration capable of ensuring a sufficient input / output range.

  The source follower circuit according to claim 1 of the present invention is a source follower circuit in which a plurality of source follower units are connected in series, and an output voltage adjusting MOS transistor interposed between the source follower units and the output voltage adjusting unit. A current source for supplying current to the drain of the MOS transistor, the source of the output voltage adjusting MOS transistor is connected to the output terminal of the former source follower, and the drain of the MOS transistor is the latter source follower It is characterized by being connected to the input terminal.

  A source follower circuit according to a second aspect is the source follower circuit according to the first aspect, wherein an input MOS transistor to which an input signal to the source follower section of the plurality of source follower sections is input to a gate and the output voltage The adjustment MOS transistors have the same channel type, and the input MOS transistor and the output voltage adjustment MOS transistor in the source follower section in the previous stage are (gate length / gate width) × (drain-source current) The values are set so as to be the same.

  A source follower circuit according to claim 3 is the source follower circuit according to claim 1, wherein an input signal to the source follower section of the plurality of source follower sections is input to the gate and the output voltage The adjustment MOS transistors have the same channel type, and the input MOS transistor and the output voltage adjustment MOS transistor in the source follower section in the subsequent stage are (gate length / gate width) × (drain-source current) The values are set so as to be the same.

  Furthermore, the source follower circuit according to claim 4 is the source follower circuit according to claim 1, wherein the output voltage adjusting MOS transistor is configured such that an input signal to the source follower part of the source follower part in the previous stage is input to the gate. The channel type is the same as that of the input MOS transistor or the input MOS transistor of the source follower section in the subsequent stage.

  According to the present invention, the voltage level shift direction between the input and output in the output voltage adjustment MOS transistor inserted between the source follower parts is the same as the voltage level shift direction between any input and output of the source follower part. On the contrary, it acts in a direction to cancel the voltage level shift in the source follower part, so that the increase in the source follower part and the narrowing of the input / output range due to the voltage level shift can be suppressed.

  In particular, the input MOS transistor that constitutes the source follower part of the preceding stage or the subsequent stage and the output voltage adjusting MOS transistor that is interposed between the source follower parts have the same channel type and (gate length / gate width) × ( Since the drain-source current) is set to be the same value, the voltage shift of the input MOS transistor in the source follower section at the front stage or the rear stage and the voltage shift in the output voltage adjustment MOS transistor are comparable and cancel each other. become. For this reason, a voltage shift due to one stage of the source follower section can be accurately suppressed, and even a two-stage source follower circuit can be suppressed to a voltage shift of one stage.

  In addition, since the channel type is the same between the input MOS transistor in the source follower section at the preceding stage or the output voltage adjusting MOS transistor inserted between the source follower sections, the source follower section at the preceding stage and the source at the subsequent stage are configured. Even when the channel type of the input MOS transistor differs between the follower part and the input MOS transistor in the source follower part of the preceding stage or the subsequent stage, the voltage shift can be suppressed accurately.

It is a block diagram which shows an example of the source follower circuit in the 1st Embodiment of this invention. It is a block diagram which shows an example of the source follower circuit in the 2nd Embodiment of this invention. It is an example of the conventional source follower circuit of a multistage structure. It is another example of the source follower circuit of the conventional multistage structure.

Embodiments of the present invention will be described below with reference to the drawings.
First, a first embodiment will be described.
FIG. 1 shows a configuration of a source follower circuit 10 according to an embodiment of the present invention, and this source follower circuit 10 has two stages of source follower sections made up of N-type MOS transistors connected in series. This is a source follower circuit having a multi-stage configuration.

As shown in FIG. 1, the source follower circuit 10 includes a first-stage source follower section SF11, a second-stage source follower section SF12, and a connection section 11 that connects the first-stage and second-stage source follower sections SF11 and SF12. And.
The first-stage source follower portion SF11 includes an N-type MOS transistor (hereinafter also simply referred to as a MOS transistor) M11 as an input MOS transistor and a current source C11 connected to the source of the MOS transistor M11. The MOS transistor M11 Is connected to the power supply VDD.

An input signal Vin to the source follower circuit 10 is input to the gate of the MOS transistor M11, and the source voltage of the MOS transistor M11 is output as an output signal Vout1 corresponding to the input signal Vin.
The second-stage source follower portion SF12 includes an N-type MOS transistor (hereinafter also simply referred to as a MOS transistor) M12 as an input MOS transistor and a current source C12 connected to the source of the MOS transistor M12. The drain of the MOS transistor M12 is connected to the power supply VDD.

The input signal Vin2 from the connection unit 11 is input to the gate of the MOS transistor M12, and the source voltage of the MOS transistor M12 is output as the output signal Vout2 corresponding to the input signal Vin2. This output signal Vout2 is supplied as an output signal of the source follower circuit 10 to a load circuit (not shown).
The connection unit 11 includes a current source C13 and a diode-connected N-type MOS transistor (hereinafter also simply referred to as a MOS transistor) M13 as an output voltage adjusting MOS transistor. The drain of the MOS transistor M13 is a current It is connected to the power supply VDD via the source C13 and is connected to the gate of the MOS transistor M12 of the second-stage source follower part SF12.

  The drain voltage of the MOS transistor M13 is output as a signal corresponding to the output signal Vout1 of the first-stage source follower section SF11, and this is supplied as the input signal Vin2 to the gate of the MOS transistor M12 of the second-stage source follower section SF12. Is done. On the other hand, the source of the MOS transistor M13 is connected to the output terminal of the first source follower part SF11, that is, the source of the MOS transistor M11.

Next, the operation of the source follower circuit 10 in FIG. 1 will be described.
The input signal Vin to the source follower circuit 10 is input to the gate of the MOS transistor M11 of the first-stage source follower part SF11, and is output as the output signal Vout1 with a gain of approximately one.
However, the output level of the output signal Vout1 is shifted to the lower voltage side by ΔV1 with respect to the input level of the input signal Vin and output. The value of ΔV1 is equal to the sum of the overdrive voltage and the threshold voltage of the MOS transistor M11.

On the other hand, since the MOS transistor M13 of the connection unit 11 is diode-connected and the source and the output terminal of the source follower unit SF11 of the first stage are connected, the drain voltage (input signal Vin2) of the MOS transistor M13 is the first stage. This is a value shifted from the output signal Vout1 of the source follower part SF11 to the high voltage side by ΔV3.
This ΔV3 is the voltage difference between the source and drain of the MOS transistor M13, and ΔV3 is the same as the overdrive voltage as the input / output level difference of the first source follower portion SF11 because the MOS transistor M13 is diode-connected. It is the sum of the threshold voltage.

  Further, the drain voltage (input signal Vin2) of the MOS transistor M13 is input to the gate of the MOS transistor M12 of the second-stage source follower part SF12. The input signal Vin2 input to the second-stage source follower unit SF12 has a gain of about 1 and is output as the output signal Vout2. However, the output level of the output signal Vout2 is shifted to the lower voltage side by ΔV2 with respect to the input level of the input signal Vin2. This inter-input / output level difference ΔV2 is equal to the sum of the overdrive voltage and the threshold voltage of the MOS transistor M12.

From the above, the transfer function of the source follower circuit 10 in FIG. 1 can be expressed by the following equation (2).
Vout2 = Vin−ΔV1 + ΔV3−ΔV2 (2)
As can be seen from the equation (2), the input / output level difference ΔV3 in the direction of canceling out the input / output level differences ΔV1 and ΔV2 of the source follower portions SF11 and SF12 as compared with the prior art represented by the equation (1). Is added. For this reason, the input range can be widened as compared with the prior art.

By the way, if the overdrive voltage is the same N-type MOS transistor, the overdrive voltage obtained by dividing the gate length (L) of the MOS transistor by the gate width (W) and the drain-source current (I), that is, If “(L / W) × I” is equal, these MOS transistors have the same value. Further, the threshold voltage varies due to the substrate effect even in the N-type MOS transistor having the same characteristics. However, in the circuit of the present invention, if “(L / W) × I” is equal, the source-substrate potential is changed. Therefore, even if the substrate effect is taken into consideration, the threshold values are approximately equal.
Therefore, if the value of “(L / W) × I” of the MOS transistor M13 is determined to be the same as that of at least one of the MOS transistors M11 and M12, the source follower portion SF11 or one input / output between the SF12 This level shift can be canceled completely.

More specifically, if the sizes are determined so that the values of “(L / W) × I” of the MOS transistors M13 and M11 are equal, the transfer function can be expressed by the following equation (3). That is, the sizes of the MOS transistors M13 and M11 are determined so that (L3 / W3) × I3 = (L1 / W1) × I1.
Vout2 = Vin−ΔV2 (3)
On the other hand, if the sizes are determined so that the values of “(L / W) × I” of the MOS transistors M13 and M12 are equal, the transfer function can be expressed by the following equation (4) (that is, (L3 / W3) × I3 = (L2 / W2) × I2).
Vout2 = Vin−ΔV1 (4)
As described above, although the source follower circuit 10 is configured by connecting a plurality of source follower sections (in the case of FIG. 1, SF11 and SF12) in series, the same input range as the one-stage source follower section is obtained. It can be seen that it can be secured.

Further, with respect to kickback from the load circuit connected to the output of the source follower circuit 10 to the input, by adopting the configuration of FIG. 1, the parasitic capacitance between the input and output becomes the gate-source of the MOS transistors M11, M12, M13. Since the inter-capacitance is connected in series and becomes very small, it is greatly suppressed as compared to the conventional two-stage source follower circuit connected in series.
In addition, since only a high mobility N-type MOS transistor is used to form a multi-stage source follower circuit, it is advantageous for speeding up.

  In the first embodiment, the case where the two-stage source follower units SF11 and SF12 are connected in series has been described. However, the number of source follower units SF connected in series may naturally be two or more. In that case, the connecting portion 11 corresponding to the MOS transistor M13 and the current source C13 of FIG. 1 may be inserted between the preceding and succeeding stages of each source follower SF.

Next, a second embodiment of the present invention will be described.
FIG. 2 shows the source follower circuit 20 in the second embodiment. In the second embodiment, the case where the source follower circuit using the N-type MOS transistor is configured is described in the first embodiment, but the source follower circuit using the P-type MOS transistor is configured. is there.
That is, as shown in FIG. 2, the source follower circuit 20 in the second embodiment includes a first-stage source follower unit SF21, a second-stage source follower unit SF22, and the first-stage and second-stage source follower units SF21. And a connecting portion 21 connected between the SFs 22.

The first-stage source follower portion SF21 includes a current source C21 and a P-type MOS transistor (hereinafter also simply referred to as a MOS transistor) M21 as an input MOS transistor. The source of the MOS transistor M21 is connected via the current source C21. Connected to the power supply VDD.
The input signal Vin to the source follower circuit 20 is input to the gate of the MOS transistor M21, and the source voltage of the MOS transistor M21 is output as the output voltage Vout1 corresponding to the input signal Vin.

On the other hand, the second-stage source follower part SF22 is composed of a current source C22 and a P-type MOS transistor M22 as an input MOS transistor, and the source of the MOS transistor M22 is connected to the power supply VDD via the current source C22. .
The input signal Vin2 from the connection unit 21 is input to the gate of the MOS transistor M22, and the source voltage of the MOS transistor M22 is output as the output signal Vout2 corresponding to the input signal Vin2. This output signal Vout2 is supplied as an output signal of the source follower circuit 20 to a load circuit (not shown).

  The connection unit 21 includes a diode-connected P-type MOS transistor (hereinafter also simply referred to as a MOS transistor) M23 as an output voltage adjusting MOS transistor and a current source C23. The drain of the MOS transistor M23 is a current source. In addition to being connected to C23, it is connected to the gate of the MOS transistor M22 of the second-stage source follower part SF22.

  The source of the MOS transistor M22 is connected to the output terminal of the first-stage source follower unit SF21, that is, the source of the MOS transistor M21, and the drain voltage of the MOS transistor M23 corresponding to the output signal Vout1 of the first-stage source follower unit SF21 is The input signal Vin2 is supplied to the gate of the MOS transistor M22 of the second-stage source follower unit SF22.

  Therefore, in the case of the second embodiment, the input signal Vin to the source follower circuit 20 is input to the gate of the MOS transistor M21 of the first-stage source follower part SF21, and the output signal Vout1 has a gain of almost one. However, the output level of the output signal Vout1 is shifted to the high voltage side by ΔV1 with respect to the input level of the input signal Vin. This ΔV1 is equal to the sum of the overdrive voltage and the threshold voltage of the MOS transistor M21.

On the other hand, since the MOS transistor M23 of the connection unit 21 is diode-connected, and the source and the output terminal of the source follower unit SF21 of the first stage are connected, the drain voltage (input signal Vin2) of the MOS transistor M23 is the first stage. This is a value shifted from the output signal Vout1 of the source follower part SF21 to the low voltage side by ΔV3.
This ΔV3 is the voltage difference between the source and drain of the MOS transistor M23, and ΔV3 is the same as the overdrive voltage as the input / output level difference of the first source follower part SF21 because the MOS transistor M23 is diode-connected. It is the sum of the threshold voltage.

Further, the drain voltage Vin2 of the MOS transistor M23 is input to the gate of the MOS transistor M22 of the second-stage source follower unit SF22, and the gain is almost 1 times from the second-stage source follower unit SF12, and the output signal Vout2 Is output. However, the output level of the output signal Vout2 is shifted to the high voltage side by ΔV2 with respect to the input level of the drain voltage Vin2 as the input signal and output. This input / output level difference ΔV2 is equal to the sum of the overdrive voltage and the threshold voltage of the MOS transistor M22.
From the above, the transfer function of the source follower circuit 20 of FIG. 2 can be expressed by the following equation (5).
Vout2 = Vin + ΔV1-ΔV3 + ΔV2 (5)
As can be seen from the equation (5), the level difference ΔV3 is added in the direction to cancel the input / output level differences ΔV1 and ΔV2 of the source follower portions SF21 and SF22. Therefore, also in this case, the input range can be widened as compared with the prior art.

  Also in this case, if the value of “(L / W) × I” of the MOS transistor M23 is determined to be the same as that of at least one of the MOS transistors M21 and M22, one of the source follower portion SF21 or SF22 is determined. The level shift between input and output can be completely canceled.

From the above, it is possible to ensure the same input range as that of the one-stage source follower, although a plurality of source follower sections (SF21 and SF22 in the case of FIG. 2) are connected in series. In addition, since the parasitic capacitance between the input and output becomes very small due to the series connection of the gate-source capacitances of the MOS transistors M21, M22, and M23, it is significantly suppressed compared to the conventional two-stage series-connected source follower circuit. Is done.
Also in the second embodiment, the number of stages of source follower sections connected in series can be set to two or more. In this case, there is a difference between the front and rear stages of each source follower section. The connecting portion 21 corresponding to the two MOS transistors M23 and the current source C23 may be inserted.
In the first and second embodiments, the MOS transistors constituting each source follower part SF and the MOS transistors constituting the connection part 11 are constituted by MOS transistors of the same channel type. These MOS transistors can be manufactured in the same process.

Therefore, the characteristics of the MOS transistor configuring the connection unit 11 and the MOS transistor configuring each source follower unit SF can be matched with higher accuracy. Therefore, the MOS transistor M13 constituting the connection unit 11 can more reliably cancel the voltage shift in the source follower unit SF.
In each of the above-described embodiments, the case where the source follower section composed of N-channel or P-channel MOS transistors is connected in a plurality of stages has been described. However, the present invention is not limited to this. It is also possible to configure a source follower circuit consisting of a plurality of stages by connecting a source follower portion made of a transistor and a source follower portion made of a P-channel MOS transistor.

  In this case, the MOS transistor M13 is configured so as to be the same as one of the channel types of the MOS transistor constituting the former source follower part and the MOS transistor constituting the latter source follower part. What is necessary is just to comprise so that the MOS transistor M13 may cancel the voltage shift in the source follower circuit of the front | former stage or back | latter stage which consists of MOS transistors of the same channel type as MOS transistor M13.

10, 20 Source follower circuit 11, 21 connection part
SF11, SF12 Source follower part SF21, SF22 Source follower part M11, M12 N-type MOS transistor (input MOS transistor)
M13 N-type MOS transistor (MOS transistor for output voltage adjustment)
M21, M22 P-type MOS transistor (input MOS transistor)
M23 P-type MOS transistor (Output voltage adjustment MOS transistor)
C11 to C13 Current source C21 to C23 Current source

Claims (4)

In a source follower circuit in which a plurality of source follower units are connected in series,
An output voltage adjusting MOS transistor interposed between the source follower sections and a current source for supplying current to the drain of the output voltage adjusting MOS transistor;
A source follower circuit characterized in that a source of the output voltage adjusting MOS transistor is connected to an output terminal of a previous source follower section, and a drain of the MOS transistor is connected to an input terminal of a subsequent source follower section. The input MOS transistor to which the input signal to the source follower section of the plurality of source follower sections is input to the gate and the output voltage adjusting MOS transistor have the same channel type,
The input MOS transistor and the output voltage adjustment MOS transistor in the source follower section of the previous stage are set so that the value of (gate length / gate width) × (drain-source current) is the same. The source follower circuit according to claim 1. The input MOS transistor to which the input signal to the source follower section of the plurality of source follower sections is input to the gate and the output voltage adjusting MOS transistor have the same channel type,
The input MOS transistor and the output voltage adjustment MOS transistor in the source follower section in the subsequent stage are set so that the value of (gate length / gate width) × (drain-source current) is the same. The source follower circuit according to claim 1.   The output voltage adjusting MOS transistor has the same channel type as the input MOS transistor to which the input signal to the source follower section of the preceding source follower section is input to the gate or the input MOS transistor of the subsequent source follower section. The source follower circuit according to claim 1, wherein:

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