CN103490763B - A kind of from energy storage high-power OC driving interface circuit - Google Patents
A kind of from energy storage high-power OC driving interface circuit Download PDFInfo
- Publication number
- CN103490763B CN103490763B CN201310397283.3A CN201310397283A CN103490763B CN 103490763 B CN103490763 B CN 103490763B CN 201310397283 A CN201310397283 A CN 201310397283A CN 103490763 B CN103490763 B CN 103490763B
- Authority
- CN
- China
- Prior art keywords
- transistor
- pulse
- resistance
- circuit
- power
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Electronic Switches (AREA)
- Direct Current Feeding And Distribution (AREA)
Abstract
A kind of drive interface circuit from the high-power OC of energy storage, can under being independent of external condition reliable turn-off own power source, this circuit is made up of anti-string electricity circuit, pulse-generating circuit, pulse driving circuit and corresponding accumulator.It is simple that the present invention has design, and low cost, the retention time is adjustable, the advantage of flexibility and reliability, practical.Employing present invention can ensure that OC instruction sends rear reliable turn-off own power source, improves instruction reliability.
Description
Technical field
The present invention relates to a kind of from energy storage high-power OC driving interface circuit, it is adaptable to require outside being independent of
The application of reliable turn-off power itself power supply under the conditions of portion, belongs to the electronic circuit skill of satellite platform or load
Art field.
Background technology
Lunar surface rover moonlit night and fault-tolerant management module need the most autonomous after receiving surface instruction closedown
Bus of whole device, instructs as OC mode, and driving force is not less than 200mA, has in order to ensure instruction
Effect property, it is desirable to instruction level retention time after a bus is closed is not less than 20ms.
For lunar surface rover moonlit night and fault-tolerant management module autonomous cut-off capacity demand, according to traditional design
Thinking designs, and has a following two processing mode: (1) extra method for power supplying: the method needs additional designs one
Road power supply, this power supply stabilizes to moonlit night and fault-tolerant management module for power supply during a bus power down.The party
The advantage of method is to process simply, and shortcoming is to need to increase extra power supply to develop demand, as new power assembles
To integrated electronics unit, then complete machine mechanism needs change, and the most whole device needs to provide new power installation site,
The whole amount of thinking highly of and power consumption are all increased considerably；(2). module energy storage method: the method is secondary power supply design storage
Energy module, energy-storage module remains to after being necessary to ensure that a bus power down as moonlit night and fault-tolerant management module for power supply
Time is more than 20ms.Changing method advantage is to need not increase extra power supply to develop demand, and shortcoming is energy storage
Circuit space requires that bigger PCB and cabinet need to redesign, and complete machine weight and power consumption all have bigger simultaneously
Increase.
For realizing closing bus function of rover, both the above method all refers to the tune of whole device structure
Whole, too increase the whole amount of thinking highly of simultaneously.
Summary of the invention
The technology of the present invention solves problem: for the deficiencies in the prior art, it is provided that a kind of big from energy storage
Power OC drives interface circuit, solves reliable closedown power itself power issue, reduces system external
The dependency in portion.
The technical solution of the present invention is: a kind of from energy storage high-power OC driving interface circuit, can disobey
Rely external condition reliable turn-off own power source, including: anti-string electricity circuit, pulse-generating circuit, pulse are driven
Galvanic electricity road and accumulator；Anti-string electricity circuit is resistance R3, and pulse-generating circuit is monostable chip U1,
Accumulator includes that R1, R2, C1, C2, D1, D2, pulse driving circuit include transistor Q1～Q4,
R4-R12；To monostable chip U1 after the switching command output string resistance R3 of front end；Externally fed power supply
VCC_IN is connected to the anode of diode D1, D2, and D1 negative electrode is as pulse-generating circuit power supply
VCC_+5V_D is connected to U1 energization pins and is connected by current-limiting resistance R1, storage capacitor C1 simultaneously
To ground, D2 negative electrode as pulse driving circuit power supply VCC_+5V_O be connected to transistor Q1 and
The colelctor electrode of Q2 is connected to ground by current-limiting resistance R2, electric capacity C2 simultaneously；Own power source out code warp
R1 be connected to U1, U1 output by resistance R4 and R5 respectively with the base stage phase of transistor Q1 and Q2
Even；Transistor Q1, Q2 ground level is connected to ground by R6, R7 respectively simultaneously；Transistor Q1 launches
Pole is connected with transistor Q3 ground level by R10, and is connected to the ground by resistance R8；Transistor Q2 sends out
Emitter-base bandgap grading is connected with transistor Q3 ground level by R11, and is connected to the ground by resistance R9；Resistance R12
It is connected between base stage and the emitter-base bandgap grading of transistor Q3；Transistor Q3 emitter stage and transistor Q4 colelctor electrode
It is connected；Transistor Q3 colelctor electrode is as OC instruction output end；Transistor Q4 emitter stage is then as OC
Instruction loop line.Gather exporting after generating the positive pulse that pulse width is Δ T after variable signal of R3 input
To pulse driving circuit, after own power source out code arrives, it is Δ T that pulse-generating circuit produces pulsewidth
Positive pulse, pulse driving circuit along with positive pulse arrive output OC instruction turn off own power source, interface electricity
Road front-end power power supply turns off therewith, and at this moment accumulator starts to substitute front end power supply and carries out to interface circuit
Power supply, OC instruction output is still effective, and after time delay Δ t, the output of accumulator power supply electrical level can not meet
Pulse-generating circuit or drive circuit requirement, OC instruction output is invalid.
The present invention having the beneficial effects that compared with prior art:
(1) present invention is by only to there being delay requirement OC instruction interlock circuit to carry out energy storage process and right
OC command pulse produces circuit and drive circuit energy storage respectively processes, and adjusts drive circuitry parameter simultaneously
Whole, while meeting real-time, farthest reduce the capacitance of storage capacitor；The method major advantage
As follows:
(2) the independent energy storage of circuit-level, reduces accumulator power demands, and then reduces pcb board face
Demand；
(3) dissimilar circuit energy storage respectively, reduces the capacitance of storage capacitor, improves accumulator
Energy；
(4) drive circuitry parameter adjusts, and improves as far as possible and amplify under the saturated working condition of outfan transistor
Ratio, reduces accumulator power demands；
(5) delay time can be arranged by series resistance and storage capacitor parameter, easy to adjust, simple in construction.
Accompanying drawing explanation
Fig. 1 is schematic diagram of the present invention.
Detailed description of the invention
In lunar surface rover moonlit night and fault-tolerant management module development process, for realizing dividing determining power supply
System power failure also receives " enter moonlit night " and sends out afterwards to send after master backup computer, about 1s are closed in pulse and " close
Ka instructs ", close bus of whole device, " close Ka instruction " retention time is not after a bus is closed
Less than 20ms.
Owing to moonlit night and fault-tolerant management module for power supply power supply are changed to whole device primary power source by isotope generator,
Close a bus and also can close moonlit night and fault-tolerant management module for power supply simultaneously.As by traditional design thinking pair
It is designed, either power supply or overall energy storage is provided separately for moonlit night and fault-tolerant management module, all relates to
And to whole device structural adjustment.
According to diode, resistance, electric capacity self character and the locality of energy storage demand, the moonlit night is with fault-tolerant
Management module have employed local energy storage and high magnification ratio OC interface, it is achieved OC after a time bus is closed
The instruction effective time retention time is not less than 20ms.
The most just combine accompanying drawing the present invention is described further.
As shown in Figure 1: the present invention includes four parts: anti-string electricity circuit, pulse-generating circuit, pulse are driven
Galvanic electricity road and accumulator,；Anti-string electricity circuit is resistance R3, and pulse-generating circuit is monostable chip U1,
Accumulator includes that R1, R2, C1, C2, D1, D2, pulse driving circuit include transistor Q1～Q4,
R4-R12；Each several part composition and interconnecting relation are as follows:
VCC_IN is externally fed；VCC_+5V_D is that OC command pulse produces circuit power supply；
VCC_+5V_O is OC command pulse drive circuitry power supply；D1, D2 are accumulator leakproof two
Pole is managed, it can be ensured that during power supply power down, accumulator electric current will not be back to power supply end；R1、R2
For accumulator current-limiting resistance, it is used for limiting accumulator and deposits the velocity of discharge, reduce and power supply is loaded
Require to export with limit accumulator electric current；C1, C2 are accumulator storage capacitor, for energy storage；
Output1 signal is that front-end circuit exports enabled instruction, along change effectively；U1 is monostable chip, is used for
Produce positive pulse；R3 is isolation series resistance, it can be ensured that does not interferes with pulse during front-end circuit power down and produces
Raw circuit power level；R4, R5 are current-limiting resistance, be used for limiting the pulse driving circuit first order penetrate level with
With portion of transistor base current；R6, R7 are resistance to earth, it can be ensured that when front exports without high impulse
One-level is penetrated level and is followed portion of transistor and be in cut-off state；R8, R9 are resistance to earth, it can be ensured that no pulse
During output, pulse driving circuit second level OC portion of transistor Q4 is in cut-off state；Q1, Q2 are arteries and veins
Rush the drive circuit first order to penetrate level and follow portion of transistor, for providing electricity for rear class OC output transistor
Stream；R10, R11 are current-limiting resistance, for being operated in saturated mode meeting second level OC output transistor
Its magnification ratio of Shi Tigao；Q3, Q4 are that pulse driving circuit second level OC exports portion of transistor, directly
Connect output OC instruction；R12 is biasing resistor, coordinates with R8 and is used for guaranteeing transistor when no pulse exports
Q3 is in off-state.
Arrive monostable device U1 after the switching command output string resistance R3 of front end, gather believing along change of R3 input
After generating the positive pulse that pulse width is Δ T after number, output is to pulse driving circuit；
Pulse driving circuit is mainly composite pipe circuit, and front end is for penetrating a grade follow circuit, and rear class is OC circuit,
Its annexation is: receive pulse-generating circuit generate positive pulse by current-limiting resistance R4 and R5 respectively with
The base stage of transistor Q1 with Q2 is connected；Transistor Q1, Q2 ground level is respectively by R6, R7 simultaneously
It is connected to ground；Transistor Q1 emitter stage is connected with transistor Q3 ground level by current-limiting resistance R10, and
It is connected to the ground by resistance R8；Transistor Q2 emitter stage is by current-limiting resistance R11 and transistor Q3 base
Level is connected, and is connected to the ground by resistance R9；Resistance R12 is connected to the base stage of transistor Q3 and penetrates
Between pole；Transistor Q3 emitter stage is connected with transistor Q4 colelctor electrode；Transistor Q3 colelctor electrode conduct
OC instruction output end；Transistor Q4 emitter stage then instructs loop line as output OC；
Accumulator is mainly made up of current-limiting resistance and storage capacitor, and its annexation is: externally fed electricity
Source VCC_IN is connected to the anode of diode D1 and D2, and D1 negative electrode is powered as pulse-generating circuit
Power supply VCC_+5V_D is connected to U1 energization pins simultaneously by current-limiting resistance R1, storage capacitor C1
Being connected to ground, D2 negative electrode is connected to transistor as pulse driving circuit power supply VCC_+5V_O
The colelctor electrode of Q1 and Q2 is connected to ground by current-limiting resistance R2, electric capacity C2 simultaneously.
The operation principle of driving interface circuit is: when module powers up, electric capacity C1 and C2 starts to charge up, and fills
Not in work after Man, after own power source is closed and arrived along variable signal, pulse-generating circuit produces pulsewidth
For the positive pulse of Δ T, pulse driving circuit exports OC instruction and turns off own power source along with positive pulse arrives,
At this moment OC drives interface circuit externally fed power supply VCC_IN to turn off therewith, and at this moment accumulator starts
Substitute front end power supply to be powered to interface circuit, the existence of diode D1, D2 can ensure that electric capacity C1,
C2 electric current will not be back to power supply end and be to maintain the power supply of local accumulator, and OC instructs output
Keep effectively, after time delay Δ t, owing to accumulator power supply electrical level is reduced to meet pulse-generating circuit
Or during drive circuit requirement, OC instruction output is invalid.
In above-mentioned design, Δ T can be arranged by monostable circuit U1: U1 is that general pulse produces circuit, by adjusting
The internal capacitance-resistance parameter adjustment output pulse width of whole circuit；Δ t can be by current-limiting resistance R1, R2 and corresponding storage
Can electric capacity C1, C2 parameter arrange: by formula Q=C × Δ U=I × Δ t can obtain storage capacitor parameter C1,
C2.Meanwhile, OC instruction can be made to meet by resistance R5～R8 parameter adjustment to drive not less than 200mA
Under ability condition, the current needs to VCC_+5V_D and VCC_+5V_O reaches balance, it can be ensured that two
Plant the power supply effective time probably unanimously, be substantially reduced the demand to stored energy capacitance.
The unspecified part of the present invention belongs to general knowledge as well known to those skilled in the art.
Claims (4)
1. one kind drives interface circuit from the high-power OC of energy storage, it is characterised in that including: anti-string electricity circuit,
Pulse-generating circuit, pulse driving circuit and accumulator；Anti-string electricity circuit is resistance R3, pulses generation electricity
Road is monostable chip U1, and accumulator includes current-limiting resistance R1 and R2, storage capacitor C1 and C2, anti-
Leakage diode D1 and diode D2, pulse driving circuit includes transistor Q1～Q4, resistance R4-R12；
Monostable chip U1 is arrived in front end switching command output after resistance R3；Externally fed power supply VCC_IN is connected to
Leakproof diode D1, the anode of diode D2, diode D1 negative electrode is powered electricity as pulse-generating circuit
Source VCC_+5V_D is connected to monostable chip U1 energization pins simultaneously by current-limiting resistance R1, storage capacitor
C1 is connected to ground, and diode D2 negative electrode connects as pulse driving circuit power supply VCC_+5V_O
Colelctor electrode to transistor Q1 and Q2 is connected to ground by current-limiting resistance R2, electric capacity C2 simultaneously；Self
Power-off instruction is connected to monostable chip U1, monostable chip U1 through R1 and exports by resistance R4 and electricity
Hinder the R5 base stage respectively with transistor Q1 and Q2 to be connected；Transistor Q1, Q2 ground level leads to respectively simultaneously
Cross resistance R6, resistance R7 is connected to ground；Transistor Q1 emitter stage is by R10 and transistor Q3 ground level
It is connected, and is connected to the ground by resistance R8；Transistor Q2 emitter stage is by R11 and transistor Q3 base
Level is connected, and is connected to the ground by resistance R9；Resistance R12 is connected to base stage and the emitter-base bandgap grading of transistor Q3
Between；Transistor Q3 emitter stage is connected with transistor Q4 colelctor electrode；Transistor Q3 colelctor electrode is as OC
Instruction output end；Transistor Q4 emitter stage then instructs loop line as OC；Gather the change of resistance R3 input
After generating the positive pulse that pulse width is Δ T after changing signal, output is to pulse driving circuit, when own power source closes
After closing instruction arrival, pulse-generating circuit produces the positive pulse that pulsewidth is Δ T, and pulse driving circuit is along with just
Pulse arrives and exports OC instruction shutoff own power source, and interface circuit front-end power power supply turns off, at this moment therewith
Accumulator starts to substitute front end power supply and is powered to interface circuit, and OC instruction output is still effective, prolongs
Time Δ t after, accumulator power supply electrical level output can not meet pulse-generating circuit or drive circuit requirement, OC
Instruction output is invalid.
2. the one described in claim 1 drives interface circuit from the high-power OC of energy storage, it is characterised in that:
Described Δ T is arranged by monostable chip U1.
3. the one described in claim 1 drives interface circuit from the high-power OC of energy storage, it is characterised in that:
Described Δ T is arranged by electric capacity C1, C2 parameter.
4. the one described in claim 1 drives interface circuit from the high-power OC of energy storage, it is characterised in that:
OC instruction is made to meet not less than under the conditions of 200mA driving force by described resistance R5～R8 parameter adjustment
The current needs of VCC_+5V_D and VCC_+5V_O is reached balance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310397283.3A CN103490763B (en) | 2013-09-04 | 2013-09-04 | A kind of from energy storage high-power OC driving interface circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310397283.3A CN103490763B (en) | 2013-09-04 | 2013-09-04 | A kind of from energy storage high-power OC driving interface circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103490763A CN103490763A (en) | 2014-01-01 |
| CN103490763B true CN103490763B (en) | 2016-08-24 |
Family
ID=49830761
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310397283.3A Active CN103490763B (en) | 2013-09-04 | 2013-09-04 | A kind of from energy storage high-power OC driving interface circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103490763B (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101789633A (en) * | 2010-01-14 | 2010-07-28 | 同济大学 | Electric hoist energy storing device based on ultra capacitor |
| CN101882860A (en) * | 2010-06-23 | 2010-11-10 | 山东大学威海分校 | Novel insulated gate bipolar translator (IGBT) drive and protection circuit |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001015289A (en) * | 1999-04-28 | 2001-01-19 | Mitsubishi Electric Corp | Discharge lamp lighting device |
| US6700763B2 (en) * | 2002-06-14 | 2004-03-02 | Thomson Licensing S.A. | Protected dual-voltage microcircuit power arrangement |
| JP2008115289A (en) * | 2006-11-06 | 2008-05-22 | Unitika Ltd | Method for producing polylactic acid copolymer resin |
-
2013
- 2013-09-04 CN CN201310397283.3A patent/CN103490763B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101789633A (en) * | 2010-01-14 | 2010-07-28 | 同济大学 | Electric hoist energy storing device based on ultra capacitor |
| CN101882860A (en) * | 2010-06-23 | 2010-11-10 | 山东大学威海分校 | Novel insulated gate bipolar translator (IGBT) drive and protection circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103490763A (en) | 2014-01-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN207675825U (en) | A kind of zero cross detection circuit | |
| CN105406542A (en) | Voltage-controlled current-limiting charging circuit for supercapacitor bank | |
| CN102692948A (en) | A real-time low-power consumption clock control circuit realized on a system on chip | |
| CN202749303U (en) | Power control circuit for relay driving module | |
| WO2006036750A3 (en) | Systems and methods for signal generation using limited power | |
| CN102508536A (en) | One-button startup and shutdown circuit in embedded system and control method thereof | |
| CN102131328A (en) | Power-on circuit of LED (light-emitting diode) drive chip | |
| CN102751142A (en) | Power supply control circuit for relay driving module | |
| CN202309652U (en) | Single-key starting-up and shutting-down circuit in embedding system | |
| CN103490763B (en) | A kind of from energy storage high-power OC driving interface circuit | |
| CN103617475A (en) | A system and a method of energy efficiency management used for a micro remote tracker | |
| CN206962745U (en) | A kind of resisting potential induced degradation system for photovoltaic plant | |
| CN103532533A (en) | Power supplying timing sequence management circuit | |
| CN101771338A (en) | Switching power supply module with high reliability and low power consumption | |
| CN206422596U (en) | A kind of robot power supply circuit of dynamic route control | |
| CN102568586A (en) | Electric disk and method utilizing backup power supply to execute data destruction | |
| CN202824897U (en) | Improved electrical process machine pulsed power supply | |
| CN202661919U (en) | Real-time clock low power consumption control circuit realized by system on chip | |
| CN201995164U (en) | Electrifying circuit of LED driving chip | |
| CN209282836U (en) | A kind of control cabinet power supply redundancy power supply unit | |
| CN205015670U (en) | Dual power supply and outage time schedule control device | |
| CN201918787U (en) | Backup power circuit used for logging tool while drilling | |
| CN204119195U (en) | A kind of anti-interference reset circuit | |
| CN204030628U (en) | A kind of solar photovoltaic generation system | |
| CN206442174U (en) | A kind of artificial tree solar power system circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |