CN103489979A - Method for manufacturing semiconductor light emitting devices - Google Patents

Method for manufacturing semiconductor light emitting devices Download PDF

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Publication number
CN103489979A
CN103489979A CN201310414200.7A CN201310414200A CN103489979A CN 103489979 A CN103489979 A CN 103489979A CN 201310414200 A CN201310414200 A CN 201310414200A CN 103489979 A CN103489979 A CN 103489979A
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China
Prior art keywords
epitaxial loayer
light emitting
etching
semiconductor device
preparation
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CN201310414200.7A
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Chinese (zh)
Inventor
朱浩
范振灿
刘国旭
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Shineon Beijing Technology Co Ltd
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Shineon Beijing Technology Co Ltd
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Priority to CN201310414200.7A priority Critical patent/CN103489979A/en
Publication of CN103489979A publication Critical patent/CN103489979A/en
Priority to PCT/CN2014/000838 priority patent/WO2015035736A1/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0095Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0093Wafer bonding; Removal of the growth substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

The invention provides a method for manufacturing semiconductor light emitting devices. Etching technical parameters are changed to enable the dip angle of the side wall of an etched epitaxial layer to be 60-90 degrees, the side wall is almost vertical, and therefore the crack phenomenon of chips in production is avoided, and the productivity is improved.

Description

A kind of preparation method of light emitting semiconductor device
Technical field
The present invention relates to field of photoelectric devices.More specifically, the present invention relates to a kind of preparation method of light emitting semiconductor device.
Background technology
In LED chip preparation technology, Sapphire Substrate is as the epitaxially grown main substrate of GaN base LED, and its conductivity and thermal diffusivity are all poor.Due to the Sapphire Substrate poorly conductive, traditional GaN base LED adopts transversary, causes electric current to stop up and heating.And poor heat conductivility has limited the power of luminescent device.After adopting laser lift-off technique that Sapphire Substrate is removed, light-emitting diode is made to vertical stratification, can effectively solve heat radiation and go out optical issue.In order to improve light efficiency and the power of GaN base LED, proposed laser lift-off Sapphire Substrate technology, after on Sapphire Substrate, preparing epitaxial loayer, epitaxial loayer has been combined with supporting substrate, then adopt laser-stripping method to remove Sapphire Substrate, device is made to vertical stratification.Before Sapphire Substrate is peeled off, the GaN epitaxial loayer of etching epitaxial growth on Sapphire Substrate, to produce a plurality of discrete tube cores, facilitates follow-up chip cutting technique usually, enhances productivity.At present, usually adopt inductively coupled plasma (Inductively Coupled Plasma is called for short ICP) etching method etching epitaxial loayer.The principle of ICP etching is the elect magnetic field at alternation, and the γ-ray emission electric discharge phenomena enter plasma state, and plasma vertically acts on substrate, and reacts with it and generate volatilizable gaseous material, to reach the purpose of etching.In ICP technique, the parameters such as ICP ion source power, radio-frequency power, gas flow, chamber pressure all can exert an influence to etching.But, existing ICP technological parameter often makes plasma can not vertically act on substrate surface, be that the sidewall inclination angle that etching obtains is far smaller than 90 °, make and the phenomenon such as crack in follow-up laser lift-off, reduced the performance of chip and produced yield.
Summary of the invention
Because cracking, laser lift-off causes producing in order to solve in chip production process chips the problem that yield is low, the present invention proposes a kind of preparation method of light emitting semiconductor device, the method is included on Sapphire Substrate grown buffer layer successively, N-type GaN layer, active layer, P type GaN layer, form epitaxial loayer, the method also comprises that the described epitaxial loayer of etching is to exposing Sapphire Substrate to produce a plurality of discrete tube cores, wherein the epitaxial loayer sidewall inclination angle after etching is 60 °~90 °, the method also comprises is combined the epitaxial loayer after etching with supporting substrate, adopt laser-stripping method to remove Sapphire Substrate.
Preferably, described epitaxial loayer sidewall inclination angle is 75 °~85 °.
Preferably, the method that the epitaxial loayer after described etching is combined with supporting substrate is to solidify after eutectic bonding or gluing.
Preferably, between described tube core, all the reserve part epitaxial loayer is as isolation strip, and to have a place at least be disjunct in the isolation strip of tube core surrounding.
Preferably, between described isolation strip and adjacent die edge, the width of groove is the 1-100 micron.
Preferably, the width of described isolation strip is the 5-100 micron.
Beneficial effect of the present invention: compared with prior art, the invention provides a kind of preparation method of light emitting semiconductor device, the method is by changing the technological parameter of etching, making the epitaxial loayer sidewall inclination angle after etching is 60 °~90 °, close to vertically, thereby produce less inclined-plane, more be conducive to follow-up manufacturing process, improved performance and yield.
The accompanying drawing explanation
Fig. 1 a, Fig. 1 b are the partial schematic diagram after the epitaxial loayer etching.
The schematic diagram of the manufacture process that Fig. 2 a-2g is one embodiment of the invention.
The schematic diagram of the manufacture process that Fig. 3 a-3h is another embodiment of the present invention.
The schematic diagram of the manufacture process that Fig. 4 a-4g is another embodiment of the present invention.
The schematic diagram of the manufacture process that Fig. 5 a-5h is another embodiment of the present invention.
Identifier declaration in figure: tube core 1, isolation strip 2, groove 3, Sapphire Substrate 100, epitaxial loayer 110, supporting substrate 120, resin glue 210, assisting base plate 220, the first temporary base 310, the second temporary bases 320.
Embodiment
Below in conjunction with drawings and Examples, the present invention is further described.
Epitaxial layer structure in prior art after etching has two kinds, as shown in Fig. 1 a and Fig. 1 b.Shown in Fig. 1 a, between every two adjacent tube cores 1, all the reserve part epitaxial loayer is as isolation strip 2, and isolation strip 2 is discontinuous, between isolation strip 2 and adjacent tube core 1, is formed with groove 3; Shown in Fig. 1 b, directly be formed with groove 3 between every two adjacent tube cores 1, without isolation strip.
As shown in Figure 2 a, grown buffer layer, N-type GaN layer, active layer, P type GaN layer successively on Sapphire Substrate 100, form epitaxial loayer 110 to embodiment 1.Sapphire Substrate 100 is carried out to mechanical lapping attenuate polishing.As shown in Figure 2 b, adopt ICP etching method etching epitaxial loayer 110, chamber pressure is set to 700mPa, Cl 2, BCl 3be respectively 50sccm, 10sccm and 5sccm with the Ar gas flow, radio-frequency power is 200W, ion source power is 500W, epitaxial loayer 110 is etched to and exposes Sapphire Substrate 100, form a plurality of discrete tube cores 1, simultaneously between every two adjacent described tube cores 1 all reserve part epitaxial loayer 110 as isolation strip 2, isolation strip 2 between different die 1 is discontinuous, the width of isolation strip 2 is 20 microns, and between adjacent tube core 1 edge, the width of groove 3 is 10 microns, the epitaxial loayer sidewall inclination angle after etching is 75 °.As shown in Figure 2 c, the epitaxial loayer 110 after etching is passed through to method and supporting substrate 120 combinations of eutectic bonding.Described supporting substrate 120 is any one in Si, pottery, W, Cu, Mo, GaAs, graphite, glass.As shown in Figure 2 d, at the opposite side application of resin glue 210 of supporting substrate 120, described resin glue 210 plays the effect of relieve stresses in the laser lift-off process.Smooth for the resin glue 210 that coating is got on, as shown in Figure 2 e, use transparent assisting base plate 220 as glass, sapphire flatten resin glue 210, then adopt ultraviolet light that resin glue 210 is solidified, remove assisting base plate 220.As shown in Fig. 2 f, adopt the method for laser lift-off to remove Sapphire Substrate 100.As shown in Figure 2 g, remove described resin glue 210.Remove residual isolation strip 2, adopt common processes to form P, N electrode, complete the preparation of light emitting semiconductor device.
The epitaxial loayer sidewall inclination angle of the present embodiment is 75 °, and the chip production yield increases.
As shown in Figure 3 a, grown buffer layer, N-type GaN layer, active layer, P type GaN layer successively on Sapphire Substrate 100, form epitaxial loayer 110 to embodiment 2.Sapphire Substrate 100 is carried out to mechanical lapping attenuate polishing.As shown in Fig. 3 b, adopt ICP etching method etching epitaxial loayer 110, chamber pressure is set to 400mPa, Cl 2, BCl 3be respectively 45sccm, 15sccm and 5sccm with the Ar gas flow, radio-frequency power is 320W, ion source power is 600W, epitaxial loayer 110 is etched to and exposes Sapphire Substrate 100, form a plurality of discrete tube cores 1, simultaneously between every two adjacent described tube cores 1 all reserve part epitaxial loayer 110 as isolation strip 2, isolation strip 2 between different die 1 is discontinuous, the width of isolation strip 2 is 40 microns, and between adjacent tube core 1 edge, the width of groove 3 is 10 microns, the epitaxial loayer sidewall inclination angle after etching is 80 °.As shown in Figure 3 c, coating High temp. epoxy resins modified adhesive on the epitaxial loayer 110 after etching, with curing after the first temporary base 310 bondings.As shown in Figure 3 d, use the method for laser lift-off to remove Sapphire Substrate 100, adopt 248 nanometer excimer laser, power 550 milliwatts.As shown in Figure 3 e, on release surface, after coating modification heterocycle resin glue with after the second temporary base 320 bondings, solidify.As shown in Fig. 3 f, after protecting the second temporary base 320 with wax, add hydrogen peroxide with hydrofluoric acid and add nitric acid (5:2:2) and corrode the first temporary base 310, adopt toluene to be corroded this High temp. epoxy resins modified adhesive under 100 ℃.As shown in Fig. 3 g, the epitaxial loayer exposed is bonded on supporting substrate 120, described supporting substrate 120 is silicon substrate.As shown in Fig. 3 h; supporting substrate 120 use waxes are protected; add hydrogen peroxide with hydrofluoric acid and add nitric acid (5:2:2) and corrode the second temporary base 320, and fall modification heterocycle resin glue with the dioxysulfate aqueous corrosion, then cleaned for the N-type GaN layer surface obtained.Remove residual isolation strip 2, adopt common processes to form P, N electrode, complete the preparation of light emitting semiconductor device.
The epitaxial loayer sidewall inclination angle of the present embodiment is 80 °, and the chip production yield significantly improves.
Embodiment 3 is as shown in Fig. 4 a, and grown buffer layer, N-type GaN layer, active layer, P type GaN layer successively on Sapphire Substrate 100, form epitaxial loayer 110.Sapphire Substrate 100 is carried out to mechanical lapping attenuate polishing.As shown in Figure 4 b, adopt ICP etching method etching epitaxial loayer 110, chamber pressure is set to 700mPa, Cl 2, BCl 3be respectively 50sccm, 10sccm and 5sccm with the Ar gas flow, radio-frequency power is 100W, ion source power is 600W, epitaxial loayer 110 is etched to and exposes Sapphire Substrate 100, form a plurality of discrete tube cores 1, simultaneously between every two adjacent described tube cores 1 all reserve part epitaxial loayer 110 as isolation strip 2, isolation strip 2 between different die 1 is discontinuous, the width of isolation strip 2 is 20 microns, and between adjacent tube core 1 edge, the width of groove 3 is 10 microns, the epitaxial loayer sidewall inclination angle after etching is 60 °.As shown in Fig. 4 c, on the epitaxial loayer 110 after etching, after gluing, with supporting substrate 120, bond and solidify.Described supporting substrate 120 is any one in Si, pottery, W, Cu, Mo, GaAs, graphite, glass.As shown in Fig. 4 d, at the opposite side application of resin glue 210 of supporting substrate 120.Described resin glue 210 plays the effect of relieve stresses in the laser lift-off process.Smooth for the resin glue 210 that coating is got on, as shown in Fig. 4 e, use transparent assisting base plate 220 as glass, sapphire flatten resin glue 210, then adopt ultraviolet light that resin glue 210 is solidified, remove assisting base plate 220.As shown in Fig. 4 f, adopt the method for laser lift-off to remove Sapphire Substrate 100.As shown in Fig. 4 g, remove described resin glue 210.Remove residual isolation strip 2, adopt common processes to form P, N electrode, complete the preparation of light emitting semiconductor device.
The epitaxial loayer sidewall inclination angle of the present embodiment is 60 °, and the chip production yield slightly is improved.
As shown in Figure 5 a, grown buffer layer, N-type GaN layer, active layer, P type GaN layer successively on Sapphire Substrate 100, form epitaxial loayer 110 to embodiment 4.Sapphire Substrate 100 is carried out to mechanical lapping attenuate polishing.As shown in Figure 5 b, adopt the 355nm Ultra-Violet Laser, laser power is 1.2W, frequency is 120KHz, speed is 120mm/s, epitaxial loayer 110 is etched to and exposes Sapphire Substrate 100, form a plurality of discrete tube cores 1, simultaneously between every two adjacent described tube cores 1 all reserve part epitaxial loayer 110 as isolation strip 2, isolation strip 2 between different die 1 is discontinuous, the width of isolation strip 2 is 40 microns, and between adjacent tube core 1 edge, the width of groove 3 is 10 microns, and the epitaxial loayer sidewall inclination angle after etching is 90 °.As shown in Figure 5 c, coating High temp. epoxy resins modified adhesive on the epitaxial loayer 110 after etching, with curing after the first temporary base 310 bondings.As shown in Fig. 5 d, use the method for laser lift-off to remove Sapphire Substrate 100, adopt 248 nanometer excimer laser, power 550 milliwatts.As shown in Fig. 5 e, on release surface after depositing Ti Au protective layer with the second temporary base 320 bondings.As shown in Fig. 5 f, after protecting the second temporary base 320 with wax, add hydrogen peroxide with hydrofluoric acid and add nitric acid (5:2:2) and corrode the first temporary base 310, adopt toluene to be corroded this High temp. epoxy resins modified adhesive under 100 ℃.As shown in Fig. 5 g, the epitaxial loayer exposed is bonded on supporting substrate 120, described supporting substrate 120 is silicon substrate.As shown in Fig. 5 h; supporting substrate 120 use waxes are protected; add hydrogen peroxide with hydrofluoric acid and add nitric acid (5:2:2) and corrode the second temporary base 320, and fall modification heterocycle resin glue with the dioxysulfate aqueous corrosion, then cleaned for the N-type GaN layer surface obtained.Remove residual isolation strip 2, adopt common processes to form P, N electrode, complete the preparation of light emitting semiconductor device.
The epitaxial loayer sidewall inclination angle of the present embodiment is 90 °, and the chip production yield improves greatly.
The above; it is only the embodiment in the present invention; but protection scope of the present invention is not limited to this, any people who is familiar with this technology is in the disclosed technical scope of the present invention, within the conversion that can expect easily or replacement all should be encompassed in protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection range of claims.

Claims (6)

1. the preparation method of a light emitting semiconductor device comprises: grown buffer layer, N-type GaN layer, active layer, P type GaN layer successively on Sapphire Substrate form epitaxial loayer; The described epitaxial loayer of etching is to exposing Sapphire Substrate to produce a plurality of discrete tube cores; Epitaxial loayer after etching is combined with supporting substrate; Adopt laser-stripping method to remove Sapphire Substrate; It is characterized in that the epitaxial loayer sidewall inclination angle after etching is 60 °~90 °.
2. the preparation method of light emitting semiconductor device according to claim 1, is characterized in that described epitaxial loayer sidewall inclination angle is 75 °~85 °.
3. the preparation method of light emitting semiconductor device according to claim 1, is characterized in that the method that the epitaxial loayer after described etching is combined with supporting substrate is to solidify after eutectic bonding or gluing.
4. the preparation method of light emitting semiconductor device according to claim 1, is characterized in that between described tube core that the reserve part epitaxial loayer is as isolation strip, and to have a place at least be disjunct in the isolation strip of tube core surrounding.
5. the preparation method of light emitting semiconductor device according to claim 4, the width that it is characterized in that groove between described isolation strip and adjacent die edge is the 1-100 micron.
6. the preparation method of light emitting semiconductor device according to claim 4, the width that it is characterized in that described isolation strip is the 5-100 micron.
CN201310414200.7A 2013-09-12 2013-09-12 Method for manufacturing semiconductor light emitting devices Pending CN103489979A (en)

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Cited By (5)

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Publication number Priority date Publication date Assignee Title
WO2014110982A1 (en) * 2013-01-17 2014-07-24 易美芯光(北京)科技有限公司 Laser lift-off-based method for preparing semiconductor light-emitting device
WO2015035736A1 (en) * 2013-09-12 2015-03-19 易美芯光(北京)科技有限公司 Method for manufacturing semiconductor light emitting device
CN105655452A (en) * 2016-01-11 2016-06-08 西安交通大学 Vertically structured LED chip preparation method
CN109148652A (en) * 2018-08-23 2019-01-04 上海天马微电子有限公司 Inorganic light-emitting diode display panel and preparation method thereof and display device
WO2020119065A1 (en) * 2018-12-14 2020-06-18 云谷(固安)科技有限公司 Laser lift-off method for semiconductor device

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CN103489979A (en) * 2013-09-12 2014-01-01 易美芯光(北京)科技有限公司 Method for manufacturing semiconductor light emitting devices

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KR100682255B1 (en) * 2005-09-27 2007-02-15 엘지전자 주식회사 Method for fabricating light emitting diode of vertical type electrode
CN101542758A (en) * 2007-08-10 2009-09-23 香港应用科技研究院有限公司 Vertical light emitting diode and method of making a vertical light emitting diode using a stop layer
CN201149873Y (en) * 2007-10-26 2008-11-12 甘志银 High power light-emitting diode chip capable of improving quantum efficiency

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014110982A1 (en) * 2013-01-17 2014-07-24 易美芯光(北京)科技有限公司 Laser lift-off-based method for preparing semiconductor light-emitting device
WO2015035736A1 (en) * 2013-09-12 2015-03-19 易美芯光(北京)科技有限公司 Method for manufacturing semiconductor light emitting device
CN105655452A (en) * 2016-01-11 2016-06-08 西安交通大学 Vertically structured LED chip preparation method
CN109148652A (en) * 2018-08-23 2019-01-04 上海天马微电子有限公司 Inorganic light-emitting diode display panel and preparation method thereof and display device
WO2020119065A1 (en) * 2018-12-14 2020-06-18 云谷(固安)科技有限公司 Laser lift-off method for semiconductor device

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Application publication date: 20140101