CN103489825A - Process method for solving problem of peeling of interface of silicon nitride and nickel silicide - Google Patents
Process method for solving problem of peeling of interface of silicon nitride and nickel silicide Download PDFInfo
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- CN103489825A CN103489825A CN201310432018.4A CN201310432018A CN103489825A CN 103489825 A CN103489825 A CN 103489825A CN 201310432018 A CN201310432018 A CN 201310432018A CN 103489825 A CN103489825 A CN 103489825A
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- 238000000034 method Methods 0.000 title claims abstract description 64
- 229910052581 Si3N4 Inorganic materials 0.000 title claims abstract description 51
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 title claims abstract description 51
- RUFLMLWJRZAWLJ-UHFFFAOYSA-N nickel silicide Chemical compound [Ni]=[Si]=[Ni] RUFLMLWJRZAWLJ-UHFFFAOYSA-N 0.000 title claims abstract description 45
- 229910021334 nickel silicide Inorganic materials 0.000 title claims abstract description 43
- 238000004381 surface treatment Methods 0.000 claims abstract description 15
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 9
- 238000005240 physical vapour deposition Methods 0.000 claims abstract description 9
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 9
- 239000010703 silicon Substances 0.000 claims abstract description 9
- 238000005468 ion implantation Methods 0.000 claims abstract description 5
- 229910001260 Pt alloy Inorganic materials 0.000 claims abstract description 4
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 4
- 238000005516 engineering process Methods 0.000 claims description 10
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 6
- 238000005229 chemical vapour deposition Methods 0.000 claims description 6
- 238000005086 pumping Methods 0.000 claims description 6
- 230000005540 biological transmission Effects 0.000 claims description 3
- 230000003139 buffering effect Effects 0.000 claims description 3
- 238000002513 implantation Methods 0.000 claims description 3
- 229910052759 nickel Inorganic materials 0.000 claims description 3
- 238000009832 plasma treatment Methods 0.000 claims description 3
- 229920005591 polysilicon Polymers 0.000 claims description 3
- 239000000758 substrate Substances 0.000 claims description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 abstract description 4
- PCLURTMBFDTLSK-UHFFFAOYSA-N nickel platinum Chemical compound [Ni].[Pt] PCLURTMBFDTLSK-UHFFFAOYSA-N 0.000 abstract 1
- 239000010409 thin film Substances 0.000 abstract 1
- 239000000853 adhesive Substances 0.000 description 6
- 230000001070 adhesive effect Effects 0.000 description 6
- 239000004065 semiconductor Substances 0.000 description 6
- 229910044991 metal oxide Inorganic materials 0.000 description 4
- 150000004706 metal oxides Chemical class 0.000 description 4
- 238000000137 annealing Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000005669 field effect Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000002800 charge carrier Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- MEYZYGMYMLNUHJ-UHFFFAOYSA-N tunicamycin Natural products CC(C)CCCCCCCCCC=CC(=O)NC1C(O)C(O)C(CC(O)C2OC(C(O)C2O)N3C=CC(=O)NC3=O)OC1OC4OC(CO)C(O)C(O)C4NC(=O)C MEYZYGMYMLNUHJ-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
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- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
The invention provides a process method for solving the problem of peeling of an interface of a silicon nitride and a nickel silicide. The process method comprises the following steps that firstly, a grid electrode and a source drain of an MOS structure are defined on photoresist, and the grid electrode and the source drain of the MOS structure are formed on a silicon chip; secondly, ion implantation is conducted on the source drain through an ion implantation process; thirdly, through physical vapor deposition, nickel-platinum alloy is deposited on the interface of source drain contact and the polycrystalline silicon grid electrode, so that the nickel silicide is formed, and source drain contact and grid electrode contact are formed; fourthly, surface treatment is conducted on the nickel silicide in a plasma processing mode; fifthly, just after contact surface treatment of the nickel silicide is finished, a silicon nitride thin film is formed through plasma enhanced chemical vapor deposition.
Description
Technical field
The present invention relates to field of semiconductor manufacture, more particularly, the present invention relates to a kind of process that problem is peeled off at silicon nitride and nickel silicide interface that solves.
Background technology
The integrated circuit especially main devices in very lagre scale integrated circuit (VLSIC) is metal-oxide semiconductor fieldeffect transistor (metal oxide semiconductor field effect transistor is called for short MOS transistor).Be accompanied by Moore's Law, the integrated circuit characteristic size is constantly being dwindled always, along with constantly dwindling of device size, also more and more higher to the rate request of device.And, in order to improve device speed, strained silicon technology starts to introduce, wherein a kind of method is that introducing is heavily stressed on raceway groove, thereby increases the mobility of charge carrier, and then increases device speed.
Heavily stressed introducing method more commonly used is after the source drain contact forms, and with the heavily stressed silicon nitride film of plasma enhanced techniques deposition one deck, by stress, conducts, and increases the carrier mobility of raceway groove.The method especially is widely used in the following advanced technologies of 90 nanometer.
But, along with dwindling of device size, the space between two device grids is more and more narrow; Narrowing down of space between grid makes the heavily stressed bottom that more easily acts on the source drain contact up stretch.To cause like this source drain contact and heavily stressed silicon nitride film contact interface to bear very large pulling force.If the adhesive force of contact interface is good not, peel off (peeling) of interface appearance will occur, thus the reliability of follow-up device caused to very large destructiveness.
Therefore, thus find one can improve source drain contact and heavily stressed silicon nitride film adhesive force to solve the method for peeling off just very important.
Summary of the invention
Technical problem to be solved by this invention is for there being above-mentioned defect in prior art, thereby provides a kind of source drain contact and heavily stressed silicon nitride film adhesive force of can improving to solve the method for peeling off.
In order to realize above-mentioned technical purpose, according to the present invention, provide a kind of process that problem is peeled off at silicon nitride and nickel silicide interface that solves, comprising:
First step: leak in the grid, the source that define the MOS structure on photoresist, and leak in the grid and the source that form the MOS structure on silicon chip;
Second step: source is leaked and carried out Implantation by ion implantation technology;
Third step: by physical vapour deposition (PVD), at source drain contact and polysilicon gate interface nickel deposited platinum alloy, and then form nickel silicide, form source drain contact and gate contact;
The 4th step: nickel silicide is carried out to surface treatment by plasma treatment;
The 5th step: after the surface treatment that nickel silicide is contacted completes, and then by plasma activated chemical vapour deposition, form silicon nitride film.
Preferably, the stress of silicon nitride film at-4Gpa between 2Gpa.
Preferably, silicon nitride film directly contacts with the nickel silicide of source-drain area, does not introduce other intermediate buffering layer.
Preferably, the concrete operations of the 4th step comprise the steps:
To form the wafer transmission of nickel silicide in the pecvd process chamber;
Sample heats the scheduled time after being transmitted to process cavity, starts subsequently to flow into N
2and/or NH
3gas is opened radio frequency simultaneously;
Stop gas and flow into, and the unlatching vacuum pumping valve vacuumizes the pecvd process chamber.
Preferably, the temperature in pecvd process chamber is the some steady temperatures between 200 degrees centigrade to 480 degrees centigrade.
Preferably, N
2and/or NH
3the gas flow of gas at 1000sccm between 10000sccm.
Preferably, rf frequency is 13.56Mhz, and power is that 60W is to 600W.
Preferably, the opening time of radio frequency is 10-60S.
Preferably, provide radio frequency equipment supporting silicon chip substrate temperature 200-480 the degree between.
Preferably, the concrete operations of the 5th step comprise the steps:
Pecvd process chamber to vacuum flows into SiH
4and NH
3gas, open radio frequency subsequently, starts the plasma chemical vapor deposition of heavily stressed silicon nitride film;
Close SiH
4and NH
3gas flows into to stop gas, closes radio frequency after special time, opens vacuum pumping valve the pecvd process chamber is vacuumized, and completes the growth of heavily stressed silicon nitride film.
In the present invention, by after nickel silicide forms, before heavily stressed silicon nitride film growth, the step Surface Treatment with Plasma technology of introducing makes nickel silicide rich surface nitrogenate.The introducing that this layer is rich in the surface of nitride has solved the problem of peeling off between nickel silicide and heavily stressed silicon nitride
The accompanying drawing explanation
By reference to the accompanying drawings, and, by reference to following detailed description, will more easily to the present invention, more complete understanding be arranged and more easily understand its advantage of following and feature, wherein:
Fig. 1 schematically shows and solves according to the preferred embodiment of the invention silicon nitride and the flow chart of the process of problem is peeled off at the nickel silicide interface.
Fig. 2 to Fig. 4 schematically shows the contact through hole place structural representation of each step of the process of the solution silicon nitride that selects embodiment according to the present invention and nickel silicide interface peeling off problem.
It should be noted that, accompanying drawing is for the present invention is described, and unrestricted the present invention.Note, the accompanying drawing that means structure may not be to draw in proportion.And, in accompanying drawing, identical or similar element indicates identical or similar label.
Embodiment
In order to make content of the present invention more clear and understandable, below in conjunction with specific embodiments and the drawings, content of the present invention is described in detail.
Fig. 1 schematically shows and solves according to the preferred embodiment of the invention silicon nitride and the flow chart of the process of problem is peeled off at the nickel silicide interface.
Specifically, as shown in Figure 1, solve according to the preferred embodiment of the invention the process of peeling off problem in silicon nitride and nickel silicide interface and comprise:
First step S1: leak in the grid, the source that define the MOS structure on photoresist, and by techniques such as photoetching, etching, cleanings, leak in the grid and the source that form the MOS structure on silicon chip 10; For first step S1, can adopt standard CMOS process; And for example, the channel length of MOS structure is 60 nanometers and following, the distance between the grid of MOS structure and grid is 90 nanometers and following;
Second step S2: ion implantation technology is leaked and is carried out Implantation source;
Third step S3: by physical vapour deposition (PVD) PVD (PhysicalVaporDeposition), at source drain contact and polysilicon gate 20 interface nickel deposited platinum alloy, and then for example by the double annealing method, form nickel silicide 30, form source drain contact and the gate contact of low contact resistance, as shown in Figure 2;
The 4th step S4: by plasma treatment, nickel silicide 30 is carried out to surface treatment 40, as shown in Figure 3;
The 5th step S5: and then by plasma activated chemical vapour deposition PECVD (PlasmaEnhancedChemicalVaporDeposition), form heavily stressed silicon nitride film 50 after the surface treatment of nickel silicide contact 30 is completed, as shown in Figure 4.Wherein, specifically, the stress of silicon nitride film 50 at-4Gpa between 2Gpa, for heavily stressed.Preferably, heavily stressed silicon nitride film 50 directly contacts with the nickel silicide 30 of source-drain area, does not introduce other intermediate buffering layer, guarantees that heavily stressed energy direct effect is in raceway groove, thereby effectively improves the mobility of electron hole in raceway groove.
Can carry out follow-up other processing and technique subsequently.
Can find out, improve according to the preferred embodiment of the invention in the method for source drain contact and silicon nitride film adhesive force, in the metal-oxide semiconductor (MOS) manufacturing process, source-drain area is used nickel silicide to form metal-semiconductor contact, after double annealing forms (third step S3), in heavily stressed silicon nitride film growth (the 5th step S5), introduced before a kind of process of surface treatment (the 4th step S4) at nickel silicide.
Preferably, the concrete operations of the 4th step S4 of preferred exemplary of the present invention comprise the steps:
By the wafer transmission of formation nickel silicide, in the pecvd process chamber, preferably, the temperature in pecvd process chamber is the some steady temperatures between 200 degrees centigrade to 480 degrees centigrade;
Sample heats the scheduled time (for example 10s) after being transmitted to process cavity, start subsequently to flow into N
2and/or NH
3gas, preferably, N
2and/or NH
3the gas flow of gas between 10000sccm, is opened radio frequency at 1000sccm simultaneously simultaneously.Preferably, rf frequency is 13.56Mhz, and power is that 60W is to 600W.For example, as required, the opening time of radio frequency is 10-60S.In addition preferably, provide radio frequency equipment supporting silicon chip substrate temperature 200-480 the degree between.
Close N
2and/or NH
3gas flows into to stop gas, and the unlatching vacuum pumping valve vacuumizes the pecvd process chamber.
And preferably, the concrete operations of the 5th step S5 of preferred exemplary of the present invention comprise the steps:
Pecvd process chamber to vacuum flows into SiH
4and NH
3deng gas, (for example, after gas is stable) opens radio frequency subsequently, starts the plasma chemical vapor deposition of heavily stressed silicon nitride film.
Close SiH
4and NH
3gas flows into to stop gas, and special time (for example 3s) is closed radio frequency afterwards, opens vacuum pumping valve the pecvd process chamber is vacuumized, and completes the growth of heavily stressed silicon nitride film.
Subsequently, sample can be spread out of to process cavity cooling, carry out follow-up other technique.
Can find out, in preferred example, surface treatment can be integrated in the PECVD film-forming process, use same equipment with heavily stressed silicon nitride film forming, first carry out surface treatment in process cavity, then carry out the PCVD silicon nitride, centre is vacuum breaker not, effectively improves surface treatment and film forming efficiency.
In the preferred embodiment of the present invention, by after nickel silicide forms, before heavily stressed silicon nitride film growth, introduce a step process of surface treatment, annealing process is at SiH
4carry out in atmosphere, make like this nisiloy surface silicon content increase.The introducing of new technology has increased the adhesion between nickel silicide and heavily stressed silicon nitride greatly, has solved the problem of peeling off between nickel silicide and heavily stressed silicon nitride, and in the method after improvement, peeling phenomenon disappears.
And above preferred embodiment of the present invention to the increase of film forming cost seldom, only has the 10-60 surface treatment time of second, and can be integrated in the silicon nitride film forming chamber, does not need vacuum breaker, when not affecting tunic efficiency, has solved the problem of peeling off.
For example, the method that improves according to the preferred embodiment of the invention source drain contact and silicon nitride film adhesive force can be used in the following advanced technologies of 90 nanometers.
According to another preferred embodiment of the invention, the present invention also provides a kind of metal-oxide semiconductor (MOS) manufacture method, and it has adopted the method according to the described raising of the above embodiment of the present invention source drain contact and silicon nitride film adhesive force.
In addition, it should be noted that, unless stated otherwise or point out, otherwise the descriptions such as the term in specification " first ", " second ", " the 3rd " are only for each assembly of distinguishing specification, element, step etc., rather than for meaning logical relation between each assembly, element, step or ordinal relation etc.
Be understandable that, although the present invention with the preferred embodiment disclosure as above, yet above-described embodiment is not in order to limit the present invention.For any those of ordinary skill in the art, do not breaking away from technical solution of the present invention scope situation, all can utilize the technology contents of above-mentioned announcement to make many possible changes and modification to technical solution of the present invention, or be revised as the equivalent embodiment of equivalent variations.Therefore, every content that does not break away from technical solution of the present invention,, all still belong in the scope of technical solution of the present invention protection any simple modification made for any of the above embodiments, equivalent variations and modification according to technical spirit of the present invention.
Claims (10)
1. one kind solves the process that problem is peeled off at silicon nitride and nickel silicide interface, it is characterized in that comprising:
First step: leak in the grid, the source that define the MOS structure on photoresist, and leak in the grid and the source that form the MOS structure on silicon chip;
Second step: source is leaked and carried out Implantation by ion implantation technology;
Third step: by physical vapour deposition (PVD), at source drain contact and polysilicon gate interface nickel deposited platinum alloy, and then form nickel silicide, form source drain contact and gate contact;
The 4th step: nickel silicide is carried out to surface treatment by plasma treatment;
The 5th step: after the surface treatment that nickel silicide is contacted completes, and then by plasma activated chemical vapour deposition, form silicon nitride film.
2. the process of problem is peeled off at solution silicon nitride according to claim 1 and nickel silicide interface, it is characterized in that, the stress of silicon nitride film at-4Gpa between 2Gpa.
3. the process of problem is peeled off at solution silicon nitride according to claim 1 and 2 and nickel silicide interface, it is characterized in that, silicon nitride film directly contacts with the nickel silicide of source-drain area, does not introduce other intermediate buffering layer.
4. the process of problem is peeled off at solution silicon nitride according to claim 1 and 2 and nickel silicide interface, it is characterized in that, the concrete operations of the 4th step comprise the steps:
To form the wafer transmission of nickel silicide in the pecvd process chamber;
Sample heats the scheduled time after being transmitted to process cavity, starts subsequently to flow into N
2and/or NH
3gas is opened radio frequency simultaneously;
Stop gas and flow into, and the unlatching vacuum pumping valve vacuumizes the pecvd process chamber.
5. the process of problem is peeled off at solution silicon nitride according to claim 4 and nickel silicide interface, it is characterized in that, the temperature in pecvd process chamber is the some steady temperatures between 200 degrees centigrade to 480 degrees centigrade.
6. the process of problem is peeled off at solution silicon nitride according to claim 4 and nickel silicide interface, it is characterized in that N
2and/or NH
3the gas flow of gas at 1000sccm between 10000sccm.
7. the process of problem is peeled off at solution silicon nitride according to claim 4 and nickel silicide interface, it is characterized in that, rf frequency is 13.56Mhz, and power is that 60W is to 600W.
8. the process of problem is peeled off at solution silicon nitride according to claim 4 and nickel silicide interface, it is characterized in that, the opening time of radio frequency is 10-60S.
9. the process of problem is peeled off at solution silicon nitride according to claim 1 and 2 and nickel silicide interface, it is characterized in that, provide radio frequency equipment supporting silicon chip substrate temperature 200-480 the degree between.
10. the process of problem is peeled off at solution silicon nitride according to claim 1 and 2 and nickel silicide interface, it is characterized in that, the concrete operations of the 5th step comprise the steps:
Pecvd process chamber to vacuum flows into SiH
4and NH
3gas, open radio frequency subsequently, starts the plasma chemical vapor deposition of heavily stressed silicon nitride film;
Close SiH
4and NH
3gas flows into to stop gas, closes radio frequency after special time, opens vacuum pumping valve the pecvd process chamber is vacuumized, and completes the growth of heavily stressed silicon nitride film.
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| CN201310432018.4A CN103489825B (en) | 2013-09-22 | 2013-09-22 | Solve the process of silicon nitride and nickel silicide interface spallation problems |
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|---|---|---|---|
| CN201310432018.4A CN103489825B (en) | 2013-09-22 | 2013-09-22 | Solve the process of silicon nitride and nickel silicide interface spallation problems |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9478468B1 (en) | 2015-07-09 | 2016-10-25 | International Business Machines Corporation | Dual metal contact scheme for CMOS devices |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040061184A1 (en) * | 2002-09-30 | 2004-04-01 | Jiong-Ping Lu | Nickel silicide - silicon nitride adhesion through surface passivation |
| US20050145897A1 (en) * | 2003-12-10 | 2005-07-07 | Shuji Matsuo | Manufacturing method of semiconductor device |
| US20080124922A1 (en) * | 2006-11-29 | 2008-05-29 | Fujitsu Limited | Method for fabricating semiconductor device |
| CN103014656A (en) * | 2011-09-27 | 2013-04-03 | 中芯国际集成电路制造(上海)有限公司 | Nickel silicide layer forming method and semiconductor device forming method |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040061184A1 (en) * | 2002-09-30 | 2004-04-01 | Jiong-Ping Lu | Nickel silicide - silicon nitride adhesion through surface passivation |
| US20050145897A1 (en) * | 2003-12-10 | 2005-07-07 | Shuji Matsuo | Manufacturing method of semiconductor device |
| US20080124922A1 (en) * | 2006-11-29 | 2008-05-29 | Fujitsu Limited | Method for fabricating semiconductor device |
| CN103014656A (en) * | 2011-09-27 | 2013-04-03 | 中芯国际集成电路制造(上海)有限公司 | Nickel silicide layer forming method and semiconductor device forming method |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9478468B1 (en) | 2015-07-09 | 2016-10-25 | International Business Machines Corporation | Dual metal contact scheme for CMOS devices |
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