CN103474442A - COMS (complementary metal-oxide semiconductor) image sensor and manufacturing method thereof - Google Patents

COMS (complementary metal-oxide semiconductor) image sensor and manufacturing method thereof Download PDF

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CN103474442A
CN103474442A CN2013103858927A CN201310385892A CN103474442A CN 103474442 A CN103474442 A CN 103474442A CN 2013103858927 A CN2013103858927 A CN 2013103858927A CN 201310385892 A CN201310385892 A CN 201310385892A CN 103474442 A CN103474442 A CN 103474442A
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doped region
semiconductor substrate
dielectric layer
imageing sensor
layer
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孙玉红
张克云
饶金华
令海阳
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Abstract

The invention provides a COMS (complementary metal-oxide semiconductor) image sensor and a manufacturing method thereof. The manufacturing method comprises the following steps: forming a first doped area on the surface of a semiconductor substrate; sequentially forming a gate oxidation layer and gate polycrystalline silicon; forming a second doped area in the semiconductor substrate; depositing a dielectric layer and forming a side wall through an exposure and etching process; forming a third doped area on the surface of the semiconductor substrate; removing the dielectric layer on the surface of the semiconductor substrate; and forming a fourth doped area in the first doped area. According to the manufacturing method provided by the invention, the gate side wall is formed by etching, ion injection is performed after removal of a photoresist to form the third doped area on the surface of the semiconductor substrate, and then the dielectric layer on the surface of the semiconductor substrate is removed to prevent secondary ion injection from damaging the semiconductor substrate on the surface of a light-sensitive diode, so that white points of the CMOS image sensor caused by damage of a semiconductor are avoided, and the quality of the CMOS image sensor is improved.

Description

COMS imageing sensor and preparation method thereof
Technical field
The present invention relates to technical field of semiconductors, particularly a kind of COMS imageing sensor and preparation method thereof.
Background technology
Imageing sensor is the important component part that forms digital camera.According to the difference of element, can be divided into CCD(Charge Coupled Device, charge coupled cell) and CMOS(Complementary Metal-Oxide Semiconductor, metal oxide semiconductor device) two large classes.Along with the CMOS integrated circuit fabrication process development of cmos image sensor design and manufacture technique particularly, cmos image sensor has replaced ccd image sensor gradually becomes main flow.Cmos image sensor is compared and is had the advantages such as industrial integrated level is higher, power is lower.
In cmos image sensor, adopt transfer tube (transfer transistor, TX) to carry out the light induced electron in the transmission light electric diode.
Fig. 1 shows the structural representation of cmos image sensor in prior art.
As shown in Figure 1, in prior art, the structure of cmos image sensor comprises: Semiconductor substrate 1, light sensitive diode district 2, light sensitive diode surface P type doped layer 5(are for reducing dark current), floating diffusion region 7(comprises well region doping 7a and the source region 7b that adulterates), grid polycrystalline silicon 3, grid oxic horizon 4, grid curb wall 6.Wherein, light sensitive diode district 2, light sensitive diode surface P type doped layer 5 and floating diffusion region 7 have been arranged on Semiconductor substrate 1; Light sensitive diode district surface P type doped layer 5 and floating diffusion region 7 are positioned at the surf zone of Semiconductor substrate; Light sensitive diode district 2 is positioned at P type doped layer 5 belows, surface, light sensitive diode district.Grid polycrystalline silicon 3, gate dielectric layer 4, grid curb wall 6 form the grid structure that is positioned at the Semiconductor substrate top.
In prior art, the method for making cmos image sensor comprises: the source region doping 7b that forms floating diffusion region 7 at the surf zone of Semiconductor substrate 1; Form successively subsequently grid oxic horizon 4 and grid polycrystalline silicon 3 on Semiconductor substrate 1; Utilize photoresist and the grid 3 of patterning to carry out Implantation for the first time, in the inner light sensitive diode district 2 that forms of Semiconductor substrate 1; Then on described Semiconductor substrate 1, deposition one deck dielectric layer forms grid curb wall 6 by exposure and etching, be included in the photoresist layer that described dielectric layer surface forms patterning, as mask, described dielectric layer is carried out to etching formation, remove the photoresist layer of described patterning, and remove dielectric layer; Then utilize photoresist and the grid 3 of patterning to carry out Implantation for the second time, in described source region doping 7b, form well region doping 7a; The last Implantation for the third time that carries out again forms surface, light sensitive diode district P type doped layer 5 at the surf zone of Semiconductor substrate 1.
In the manufacture method of the cmos image sensor of prior art, because damage is caused on double conductive substrate surface of implantation membership, thereby cause cmos image sensor white point to occur.
Summary of the invention
The invention provides a kind of COMS imageing sensor and preparation method thereof, to solve semiconductor substrate surface damage in prior art, cause the COMS imageing sensor problem of white point to occur.
The manufacture method of COMS imageing sensor provided by the invention comprises:
Semi-conductive substrate is provided;
Carry out the first Implantation and form the first doped region at described semiconductor substrate surface;
Form successively grid oxic horizon and grid polycrystalline silicon on described Semiconductor substrate, form transmission transistor, described the first doped region is positioned at grid polycrystalline silicon one side;
Carry out the second Implantation at inner second doped region that forms of described Semiconductor substrate, described the second doped region is positioned at the opposite side of described grid polycrystalline silicon, contrary with the doping type of the first doped region;
Deposition one deck dielectric layer on described Semiconductor substrate, the photoresist layer of patterning of take is the described dielectric layer of mask etching, then removes the photoresist layer of patterning, forms grid curb wall;
Carry out the 3rd Implantation and form the 3rd doped region at described semiconductor substrate surface, it is positioned at the top of described the second doped region, contrary with the second doped region doping type, and described the second doped region and the 3rd doped region form light sensitive diode;
Remove the dielectric layer of semiconductor substrate surface;
Described the first doped region is carried out to the 4th secondary ion to be injected, form the 4th doped region in described the first doped region, described the 4th doped region is contrary with the doping type of described the first doped region, and described floating diffusion region comprises described the first doped region and described the 4th doped region.
Further, described the first doped region and the 3rd doped region are the p-type doped region.
Further, described the second doped region and the 4th doped region are the N-shaped doped region.
Further, the doping ion of described the 3rd doped region is boron.
Further, described dielectric layer comprises the first silicon oxide layer, silicon nitride layer and the second silicon oxide layer.
Further, the formation step of grid curb wall comprises: on described dielectric layer surface, form photoresist layer; Described photoresist layer is exposed and forms the photoresist layer of patterning with development; The photoresist layer of patterning of take is mask, and described dielectric layer is carried out to etching, and then the first silicon oxide layer of remainder thickness on Semiconductor substrate removes the photoresist layer of described patterning.
Further, the thickness of remaining the first silicon oxide layer is
Figure BDA00003740165700031
Further, the part dielectric layer of removal is the first silicon oxide layer.
Accordingly, the present invention also proposes a kind of COMS imageing sensor that uses the manufacture method making of above COMS imageing sensor, comprising:
Semiconductor substrate;
Be arranged in floating diffusion region, transmission transistor, the light sensitive diode of described Semiconductor substrate;
Described floating diffusion region comprises described the first doped region and described the 4th doped region, and described the first doped region is contrary with the doping type of described the 4th doped region, and described the 4th doped region is arranged in described the first doped region;
Described light sensitive diode comprises the second doped region and the 3rd doped region, and described the second doped region is contrary with the doping type of described the 3rd doped region, and described the 3rd doped region is positioned at described the second doped region top; Described the second doped region is contrary with the doping type of the first doped region;
Described transmission transistor comprises: be positioned at grid oxic horizon and grid polycrystalline silicon on described Semiconductor substrate, be positioned at described grid polycrystalline silicon side wall on every side; Described the first doped region and the second doped region are positioned at the both sides of grid polycrystalline silicon.
The inventor finds after the side wall etching is removed dielectric layer, remaining dielectric layer is thinner, the follow-up implantation membership of carrying out light sensitive diode surface doping layer causes damage to the Semiconductor substrate on light sensitive diode surface, and white point is very responsive for light sensitive diode surface quality and integrality, the damage of Semiconductor substrate can cause cmos image sensor white point to occur.
Compared with prior art, the present invention has the following advantages:
1, the present invention is by forming grid curb wall in etching, carry out Implantation for the third time after the removal photoresist and form the 3rd doped region at semiconductor substrate surface, the 3rd doped region and the second doped region form light sensitive diode, and then the dielectric layer of removal semiconductor substrate surface, prevent that Implantation for the third time from causing damage to the semiconductor substrate surface on light sensitive diode surface, thereby avoid the COMS imageing sensor white point caused because of the semiconductor damage, improve the quality of COMS imageing sensor;
2, the present invention does not increase new processing step in the manufacturing process of COMS imageing sensor, can overcome the white point caused because of the semiconductor surface damage under the condition that does not increase cost, and method is simple, convenient operation, can not impact the performance of COMS imageing sensor.
The accompanying drawing explanation
Fig. 1 is the structural representation of cmos image sensor in prior art.
The manufacture method schematic flow sheet of the COMS imageing sensor that Fig. 2 provides for one embodiment of the invention.
Each step structural representation of manufacture method of the COMS imageing sensor that Fig. 3~9 provide for one embodiment of the invention.
Embodiment
From background technology, the cmos image sensor that prior art forms causes damage because of Implantation to semiconductor substrate surface, thereby causes occurring white point.The inventor studies discovery for the problems referred to above, after the side wall etching is removed dielectric layer, remaining dielectric layer is thinner, the follow-up implantation membership of carrying out light sensitive diode surface doping layer causes damage to the Semiconductor substrate on light sensitive diode surface, and white point is very responsive for light sensitive diode surface quality and integrality, the damage of Semiconductor substrate can cause cmos image sensor white point to occur.
After further research, the inventor has proposed a kind of cmos image sensor and preparation method thereof.
Cmos image sensor the present invention proposed below in conjunction with the drawings and specific embodiments and preparation method thereof is described in further details.According to the following describes and claims, advantages and features of the invention will be clearer, it should be noted that, accompanying drawing all adopts very the form of simplifying and all uses non-ratio accurately, only for convenient, the purpose of the aid illustration embodiment of the present invention lucidly.
The manufacture method schematic flow sheet of the cmos image sensor that Fig. 2 provides for one embodiment of the invention, as shown in Figure 2, a kind of cmos image sensor that the present invention proposes and preparation method thereof comprises the following steps:
Step 01: semi-conductive substrate is provided;
Step 02: carry out the first Implantation and form the first doped region at described semiconductor substrate surface;
Step 03: form successively grid oxic horizon and grid polycrystalline silicon on described Semiconductor substrate, form transmission transistor, described the first doped region is positioned at grid polycrystalline silicon one side;
Step 04: carry out the second Implantation at inner second doped region that forms of described Semiconductor substrate, described the second doped region is positioned at the opposite side of described grid polycrystalline silicon, contrary with the doping type of the first doped region;
Step 05: deposition one deck dielectric layer on described Semiconductor substrate, the photoresist layer of patterning of take is the described dielectric layer of mask etching, then removes the photoresist layer of patterning;
Step 06: carry out the 3rd Implantation and form the 3rd doped region at described semiconductor substrate surface, it is positioned at the top of described the second doped region, contrary with the second doped region doping type; Described the second doped region and the 3rd doped region form light sensitive diode;
Step 07: the dielectric layer of removing semiconductor substrate surface;
Step 08: described the first doped region is carried out to the 4th secondary ion and inject, form the 4th doped region in described the first doped region, described the 4th doped region is contrary with the doping type of described the first doped region, and described floating diffusion region comprises described the first doped region and described the 4th doped region.
Each step structural representation of manufacture method of the COMS imageing sensor that Fig. 3~9 provide for one embodiment of the invention, please refer to shown in Fig. 2, and in conjunction with Fig. 3~Fig. 9, describes the manufacture method of the groove power device that the present invention proposes in detail:
Step 01: semi-conductive substrate 1 is provided.In the present embodiment, described Semiconductor substrate can be monocrystalline silicon, monocrystalline germanium or monocrystalline germanium silicon, or other Semiconductor substrate known to those skilled in the art.
Step 02: carry out the first Implantation and form the first doped region 2 on described Semiconductor substrate 1 surface, as shown in Figure 3.
Described Semiconductor substrate 1 is carried out to the method that Implantation for the first time forms the first doped region 2 to be comprised: form the first patterned photoresist layer (not shown) on described Semiconductor substrate 1, define the position of the first doped region 2; The described first patterned photoresist layer of take is mask, described Semiconductor substrate 1 is carried out to the first Implantation and form the first doped region 2; Remove the photoresist layer of the first image conversion.In the specific embodiment of the invention, the first doped region 2 is the p-type doped region, and the ion injected in the first ion implantation technology is the p-type ion, boron (B) for example, but be not limited to boron.The first doped region 2 is positioned at the zone at floating diffusion region place.
Step 03: form successively grid oxic horizon 4 and grid polycrystalline silicon 3 on described Semiconductor substrate 1, form transmission transistor, described the first doped region 2 is positioned at grid polycrystalline silicon 3 one sides, as shown in Figure 4.
Form successively oxide layer and polysilicon layer on Semiconductor substrate 1, then successively oxide layer and polysilicon layer are graphically formed to grid polycrystalline silicon 3 and grid oxic horizon 4.Grid material can be also metal, and the material of grid oxic horizon 4 is silica etc. well known to a person skilled in the art technology.
Step 04: carry out the second Implantation at inner second doped region 5 that forms of described Semiconductor substrate 1, described the second doped region 5 is positioned at the opposite side of described grid polycrystalline silicon 3, contrary with the doping type of the first doped region 2, as shown in Figure 5.
In the present embodiment, concrete, described Semiconductor substrate 1 is carried out to Implantation for the second time, in described Semiconductor substrate 1, the method that the opposite side that described the first doped region 2 is relative with described grid polycrystalline silicon 3 forms the second doped region 5 comprises: in described Semiconductor substrate 1, form the photoresist layer (not shown) of second graphical on the surface that grid polycrystalline silicon 3 and grid oxic horizon 4 form, define the position of the second doped region, the photoresist layer of described second graphical of take carries out Implantation for the second time to described Semiconductor substrate as mask, in described Semiconductor substrate 1, the opposite side that described the first doped region 2 is relative with described grid polycrystalline silicon 3 forms the second doped region 5, remove the photoresist layer of described second graphical.In the specific embodiment of the invention, the second doped region 5 is the N-shaped doped region.
Step 05: deposition one deck dielectric layer 6 on described Semiconductor substrate 1, the photoresist layer of patterning of take is the described dielectric layer 6 of mask etching, then removes the photoresist layer of patterning, forms grid curb wall 7, as shown in Figure 6.
In the present embodiment, described dielectric layer 6 comprises the first silicon oxide layer, silicon nitride layer and the second silicon oxide layer, in other embodiment of the present invention, can be other the combination such as silicon oxide layer, silicon nitride layer.The formation step of described side wall 7 comprises: on described dielectric layer 6 surfaces, form the photoresist layer (not shown); Described photoresist layer is exposed and forms the photoresist layer of patterning with development; The photoresist layer of patterning of take is mask, described dielectric layer 6 is carried out to etching and form side wall 7, then removes the photoresist layer of described patterning.Final on Semiconductor substrate 1 dielectric layer 6 of remainder thickness, described dielectric layer 6 is the first silicon oxide layer.First do not remove remaining dielectric layer 6 in invention, remaining thickness is
Figure BDA00003740165700061
Step 06: carry out the 3rd Implantation and form the 3rd doped region 8 on described Semiconductor substrate 1 surface, it is positioned at the top of described the second doped region 5, contrary with the second doped region 5 doping types; Described light sensitive diode comprises the second doped region 5 and the 3rd doped region 8, forms figure as described in Figure 7.
In the present embodiment, the formation method of described the 3rd doped region 8 is similar to the formation method of above-mentioned the second doped region 5.Described the 3rd doped region 8 is the p-type doping, and the ion injected in the 3rd ion implantation technology is boron (B) ion, can be also other known p-type ions.
During the 3rd Implantation, on Semiconductor substrate 1, also have
Figure BDA00003740165700071
the dielectric layer 6 of thickness, can not cause damage to semi-conductive surface, thereby can not affect the surface of light sensitive diode.
Step 07: remove the part dielectric layer 6 of semiconductor substrate surface, as shown in Figure 8.
The dielectric layer 6 of described removal is remaining the first silicon oxide layer in upper step 06.
Step 08: described the first doped region 2 is carried out to the 4th secondary ion and inject, form the 4th doped region 9 in described the first doped region 2, described the 4th doped region 9 is contrary with the doping type of described the first doped region 2.Described floating diffusion region comprises described the first doped region 2 and described the 4th doped region 9, forms figure as shown in Figure 9.
In the specific embodiment of the invention, the 4th doped region 9 is identical with the doping type of the second doped region 5, is all the N-shaped doped region; The 3rd doped region 8 is identical with the doping type of the first doped region 2, is all the p-type doping.
Accordingly, the COMS imageing sensor that the manufacture method by above-mentioned COMS imageing sensor forms, with reference to figure 9, comprising:
Semiconductor substrate 1;
Be arranged in floating diffusion region, transmission transistor, the light sensitive diode of described Semiconductor substrate;
Described floating diffusion region comprises described the first doped region 2 and described the 4th doped region 9, and described the first doped region 2 is contrary with the doping type of described the 4th doped region 9, and described the 4th doped region 9 is arranged in described the first doped region 2;
Described light sensitive diode comprises the second doped region 5 and the 3rd doped region 8, and described the second doped region 5 is contrary with the doping type of described the 3rd doped region 8, and described the 3rd doped region 8 is positioned at the top of described the second doped region 5; Described the second doped region 5 is contrary with the doping type of the first doped region 2;
Described transmission transistor comprises: be positioned at grid oxic horizon 4 and grid polycrystalline silicon 3 on described Semiconductor substrate, be positioned at described grid polycrystalline silicon 3 side wall 7 on every side; Described the first doped region 2 and the second doped region 5 are positioned at the both sides of grid polycrystalline silicon.
In sum, the present invention is by forming grid curb wall in etching, carry out Implantation for the third time after the removal photoresist and form the 3rd doped region at semiconductor substrate surface, the 3rd doped region and the second doped region form light sensitive diode, and then the dielectric layer of removal semiconductor substrate surface, prevent that Implantation for the third time from causing damage to the semiconductor substrate surface on light sensitive diode surface, thereby avoid the COMS imageing sensor white point caused because of the semiconductor damage, improve the quality of COMS imageing sensor; The present invention does not increase new processing step in the manufacturing process of COMS imageing sensor, can overcome the white point caused because of the semiconductor surface damage under the condition that does not increase cost, and method is simple, convenient operation, can not impact the performance of COMS imageing sensor.
Foregoing description is only the description to preferred embodiment of the present invention, and not to any restriction of the scope of the invention, any change, modification that the those of ordinary skill in field of the present invention is done according to above-mentioned disclosure, all belong to the protection range of claims.

Claims (9)

1. the manufacture method of a COMS imageing sensor, is characterized in that, comprising:
Semi-conductive substrate is provided;
Carry out the first Implantation and form the first doped region at described semiconductor substrate surface;
Form successively grid oxic horizon and grid polycrystalline silicon on described Semiconductor substrate, form transmission transistor, described the first doped region is positioned at grid polycrystalline silicon one side;
Carry out the second Implantation at inner second doped region that forms of described Semiconductor substrate, described the second doped region is positioned at the opposite side of described grid polycrystalline silicon, contrary with the doping type of the first doped region;
Deposition one deck dielectric layer on described Semiconductor substrate, the photoresist layer of patterning of take is the described dielectric layer of mask etching, then removes the photoresist layer of patterning, forms grid curb wall;
Carry out the 3rd Implantation and form the 3rd doped region at described semiconductor substrate surface, it is positioned at the top of described the second doped region, contrary with the second doped region doping type, and described the second doped region and the 3rd doped region form light sensitive diode;
Remove the dielectric layer of semiconductor substrate surface;
Described the first doped region is carried out to the 4th secondary ion to be injected, form the 4th doped region in described the first doped region, described the 4th doped region is contrary with the doping type of described the first doped region, and described floating diffusion region comprises described the first doped region and described the 4th doped region.
2. the manufacture method of COMS imageing sensor as claimed in claim 1, is characterized in that, described the first doped region and the 3rd doped region are the p-type doped region.
3. the manufacture method of COMS imageing sensor as claimed in claim 2, is characterized in that, described the second doped region and the 4th doped region are the N-shaped doped region.
4. the manufacture method of COMS imageing sensor as claimed in claim 3, is characterized in that, the doping ion of described the 3rd doped region is boron.
5. the manufacture method of COMS imageing sensor as claimed in claim 1, is characterized in that, described dielectric layer comprises the first silicon oxide layer, silicon nitride layer and the second silicon oxide layer.
6. the manufacture method of COMS imageing sensor as claimed in claim 5, is characterized in that, the formation step of grid curb wall comprises: on described dielectric layer surface, form photoresist layer; Described photoresist layer is exposed and forms the photoresist layer of patterning with development; The photoresist layer of patterning of take is mask, and described dielectric layer is carried out to etching, and then the first silicon oxide layer of remainder thickness on Semiconductor substrate removes the photoresist layer of described patterning.
7. the manufacture method of COMS imageing sensor as claimed in claim 6, is characterized in that, the thickness of remaining the first silicon oxide layer is
Figure FDA00003740165600021
8. the manufacture method of COMS imageing sensor as claimed in claim 1, is characterized in that, the dielectric layer of removal is the first silicon oxide layer.
9. the COMS imageing sensor that right to use requires the manufacture method of 1~8 described COMS imageing sensor to make, is characterized in that, comprising:
Semiconductor substrate;
Be arranged in floating diffusion region, transmission transistor, the light sensitive diode of described Semiconductor substrate;
Described floating diffusion region comprises described the first doped region and described the 4th doped region, and described the first doped region is contrary with the doping type of described the 4th doped region, and described the 4th doped region is arranged in described the first doped region;
Described light sensitive diode comprises the second doped region and the 3rd doped region, and described the second doped region is contrary with the doping type of described the 3rd doped region, and described the 3rd doped region is positioned at described the second doped region top; Described the second doped region is contrary with the doping type of the first doped region;
Described transmission transistor comprises: be positioned at grid oxic horizon and grid polycrystalline silicon on described Semiconductor substrate, be positioned at described grid polycrystalline silicon side wall on every side; Described the first doped region and the second doped region are positioned at the both sides of grid polycrystalline silicon.
CN2013103858927A 2013-08-29 2013-08-29 COMS (complementary metal-oxide semiconductor) image sensor and manufacturing method thereof Pending CN103474442A (en)

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Cited By (6)

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Publication number Priority date Publication date Assignee Title
CN103839957A (en) * 2014-03-17 2014-06-04 上海华虹宏力半导体制造有限公司 Coms image sensor and manufacturing method thereof
CN105185794A (en) * 2014-06-04 2015-12-23 瑞萨电子株式会社 Manufacturing method of semiconductor device
CN106449683A (en) * 2016-10-10 2017-02-22 上海华虹宏力半导体制造有限公司 Coms image sensor and manufacturing method thereof
CN107068706A (en) * 2017-04-14 2017-08-18 上海华虹宏力半导体制造有限公司 The manufacture method of cmos image sensor
CN108269816A (en) * 2018-01-19 2018-07-10 德淮半导体有限公司 A kind of method for reducing cmos image sensor white-spot defects
CN114300581A (en) * 2021-12-31 2022-04-08 北海惠科半导体科技有限公司 Method for manufacturing photosensitive element and semiconductor device

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CN102646693A (en) * 2012-04-25 2012-08-22 上海宏力半导体制造有限公司 CMOS (Complementary Metal-Oxide-Semiconductor Transistor) image sensor and forming method therefor

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KR20020052791A (en) * 2000-12-26 2002-07-04 박종섭 Image sensor formation method capable of protecting surface of substrate
US20060086956A1 (en) * 2004-10-20 2006-04-27 Masakazu Furukawa Solid-state imaging device
CN102646693A (en) * 2012-04-25 2012-08-22 上海宏力半导体制造有限公司 CMOS (Complementary Metal-Oxide-Semiconductor Transistor) image sensor and forming method therefor

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103839957A (en) * 2014-03-17 2014-06-04 上海华虹宏力半导体制造有限公司 Coms image sensor and manufacturing method thereof
CN105185794A (en) * 2014-06-04 2015-12-23 瑞萨电子株式会社 Manufacturing method of semiconductor device
CN106449683A (en) * 2016-10-10 2017-02-22 上海华虹宏力半导体制造有限公司 Coms image sensor and manufacturing method thereof
CN106449683B (en) * 2016-10-10 2019-06-28 上海华虹宏力半导体制造有限公司 COMS imaging sensor and preparation method thereof
CN107068706A (en) * 2017-04-14 2017-08-18 上海华虹宏力半导体制造有限公司 The manufacture method of cmos image sensor
CN108269816A (en) * 2018-01-19 2018-07-10 德淮半导体有限公司 A kind of method for reducing cmos image sensor white-spot defects
CN114300581A (en) * 2021-12-31 2022-04-08 北海惠科半导体科技有限公司 Method for manufacturing photosensitive element and semiconductor device

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Application publication date: 20131225

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