CN100536112C - Complementary type metal oxide semiconductor image sensor and manufacturing method therefor - Google Patents
Complementary type metal oxide semiconductor image sensor and manufacturing method therefor Download PDFInfo
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- CN100536112C CN100536112C CNB2006101435966A CN200610143596A CN100536112C CN 100536112 C CN100536112 C CN 100536112C CN B2006101435966 A CNB2006101435966 A CN B2006101435966A CN 200610143596 A CN200610143596 A CN 200610143596A CN 100536112 C CN100536112 C CN 100536112C
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Abstract
The invention provides a complementary metal oxide semiconductor image sensor, including base, photodiode, a p-type gate structure and a plurality of n-type gate structures. The base consists of a light sensing area and a transistor element area. The photodiode is positioned at the base of the light sensing area. The p-type gate structure is positioned at the base of the transistor element area. A plurality of n-type gate structures are positioned at the base of the transistor element area.
Description
Technical field
The present invention relates to a kind of imageing sensor and manufacture method thereof, relate in particular to a kind of complement metal oxide semiconductor image sensor and manufacture method thereof.
Background technology
Complement metal oxide semiconductor image sensor (CMOS image sensor, CIS) with the process compatible of CMOS (Complementary Metal Oxide Semiconductor), therefore be easy to be incorporated on the same chip, and can significantly reduce the cost and the consumed power of imageing sensor with other peripheral circuits.In recent years, in the application in low price field, complement metal oxide semiconductor image sensor has become the substitute of charge coupled cell, and then makes the importance of complement metal oxide semiconductor image sensor grow with each passing day.
Complement metal oxide semiconductor image sensor is made of a photodiode and a plurality of transistor, wherein photodiode is made of the p-n junction that n type doped region and the substrate of p type form, and transistor is the n transistor npn npn (n-poly NMOS) of n type grid.At present, the structure of complement metal oxide semiconductor image sensor includes two kinds of 3-T framework and 4-T frameworks.So-called 3-T framework is meant that the structure of complement metal oxide semiconductor image sensor comprises reset transistor (Rx), source follower transistor (Dx), selects a transistor (Sx) and a photodiode (PD), and the 4-T framework is meant that the structure of complement metal oxide semiconductor image sensor comprises transfering transistor (Tx), reset transistor, source follower transistor, selection transistor and a photodiode.
Present stage, generally can there be the problem that produces leakage current (leakage) in complement metal oxide semiconductor image sensor.Generally speaking, photodiode in the complement metal oxide semiconductor image sensor and transistor all can produce leakage current.The problem of above-mentioned leakage current will make complement metal oxide semiconductor image sensor produce sizable dark current (dark current), causes the noise increase of reading and influences image quality, and reduce the usefulness of element.
Particularly, for the complement metal oxide semiconductor image sensor of 4-T framework, most dark current is that leakage problem because of transfering transistor causes in the complement metal oxide semiconductor image sensor.Therefore, the leakage current that how to reduce imageing sensor has become one of important topic of present industry development.
Summary of the invention
In view of this, the purpose of this invention is to provide a kind of complement metal oxide semiconductor image sensor and manufacture method thereof, can reduce transistorized leakage problem, and the generation of avoiding dark current, to improve image quality and element efficiency.
The present invention proposes a kind of manufacture method of complement metal oxide semiconductor image sensor, and the method is for providing a substrate earlier, and this substrate has an optical sensing area and a transistor unit district.Then, in the substrate in transistor unit district, form p type well region.Afterwards, in substrate, form dielectric layer and undoped polycrystalline silicon layer in regular turn.Then, form first mask layer, to cover the undoped polycrystalline silicon floor in optical sensing area and part transistor unit district.Subsequently, carry out first ion implantation technology, n type dopant is injected the undoped polycrystalline silicon layer that is exposed,, then remove first mask layer to form n type polysilicon layer.Then, form second mask layer, cover n type polysilicon layer.Then, carry out second ion implantation technology, p type dopant is injected the undoped polycrystalline silicon layer that is exposed,, then remove second mask layer to form p type polysilicon layer.Afterwards, definition dielectric layer, n type polysilicon layer and p type polysilicon layer are to form a plurality of n type grid structures and a p type grid structure on the p in transistor unit district type well region.Subsequently, in the substrate of optical sensing area, form photodiode.
Manufacture method according to the described complement metal oxide semiconductor image sensor of embodiments of the invention, above-mentioned n type grid structure is transfering transistor, reset transistor, source follower transistor and selection transistor three a grid structure wherein, and p type grid structure is another a transistorized grid structure wherein.
Manufacture method according to the described complement metal oxide semiconductor image sensor of embodiments of the invention, above-mentioned n type grid structure is reset transistor, source follower transistor and selection transistor two a grid structure wherein, and p type grid structure is another a transistorized grid structure wherein.
According to the manufacture method of the described complement metal oxide semiconductor image sensor of embodiments of the invention, above-mentioned n type dopant for example is phosphorus (P) or arsenic (As).
According to the manufacture method of the described complement metal oxide semiconductor image sensor of embodiments of the invention, the dosage of above-mentioned n type dopant between
1 * 10 14 ～
5 * 10 15 Ion/cm
2Between.
According to the manufacture method of the described complement metal oxide semiconductor image sensor of embodiments of the invention, above-mentioned p type dopant for example is boron (B) or boron difluoride (BF
2).
According to the manufacture method of the described complement metal oxide semiconductor image sensor of embodiments of the invention, the dosage of above-mentioned p type dopant between
1 * 10 13 ～
5 * 10 15 Ion/cm
2Between.
According to the manufacture method of the described complement metal oxide semiconductor image sensor of embodiments of the invention, the formation method of above-mentioned photodiode for example is to carry out a doping process.
The present invention proposes a kind of manufacture method of complement metal oxide semiconductor image sensor in addition, and the method is for providing a substrate earlier, and substrate has an optical sensing area and a transistor unit district.Then, in the substrate in transistor unit district, form a p type well region.Afterwards, in substrate, form a dielectric layer and a undoped polycrystalline silicon layer in regular turn.Then, carry out first ion implantation technology, n type dopant is injected the undoped polycrystalline silicon layer, to form n type polysilicon layer.Subsequently, form a mask layer, to expose the n type polysilicon layer in optical sensing area and part transistor unit district.Then, carry out second ion implantation technology, inject p type dopant, make the n type polysilicon layer that is exposed be transformed into p type polysilicon layer.Then, definition dielectric layer, n type polysilicon layer and p type polysilicon layer are to form a plurality of n type grid structures and a p type grid structure on the p in transistor unit district type well region.Afterwards, in the substrate of optical sensing area, form photodiode.
Manufacture method according to the described complement metal oxide semiconductor image sensor of embodiments of the invention, above-mentioned n type grid structure is transfering transistor, reset transistor, source follower transistor and selection transistor three a grid structure wherein, and p type grid structure is another a transistorized grid structure wherein.
Manufacture method according to the described complement metal oxide semiconductor image sensor of embodiments of the invention, above-mentioned n type grid structure is reset transistor, source follower transistor and selection transistor two a grid structure wherein, and p type grid structure is another a transistorized grid structure wherein.
According to the manufacture method of the described complement metal oxide semiconductor image sensor of embodiments of the invention, above-mentioned n type dopant for example is phosphorus or arsenic.
According to the manufacture method of the described complement metal oxide semiconductor image sensor of embodiments of the invention, the dosage of above-mentioned n type dopant between
1 * 10 14 ～
5 * 10 15 Ion/cm
2Between.
According to the manufacture method of the described complement metal oxide semiconductor image sensor of embodiments of the invention, above-mentioned p type dopant for example is boron or boron difluoride.
According to the manufacture method of the described complement metal oxide semiconductor image sensor of embodiments of the invention, the dosage of above-mentioned p type dopant between
1 * 10 13 ～
5 * 10 15 Ion/cm
2Between.
According to the manufacture method of the described complement metal oxide semiconductor image sensor of embodiments of the invention, the formation method of above-mentioned photodiode for example is to carry out a doping process.
The present invention proposes a kind of complement metal oxide semiconductor image sensor again, and this complement metal oxide semiconductor image sensor comprises substrate, photodiode, a p type grid structure and a plurality of n type grid structure.Wherein, substrate has an optical sensing area and a transistor unit district.Photodiode is disposed in the substrate of optical sensing area.P type grid structure is disposed in the substrate in transistor unit district.A plurality of n type grid structures are disposed in the substrate in transistor unit district.
According to the described complement metal oxide semiconductor image sensor of embodiments of the invention, above-mentioned n type grid structure is transfering transistor, reset transistor, source follower transistor and selection transistor three a grid structure wherein, and p type grid structure is another a transistorized grid structure wherein.
According to the described complement metal oxide semiconductor image sensor of embodiments of the invention, above-mentioned n type grid structure is reset transistor, source follower transistor and selection transistor two a grid structure wherein, and p type grid structure is another a transistorized grid structure wherein.
According to the described complement metal oxide semiconductor image sensor of embodiments of the invention, above-mentioned photodiode is a p-n junction district.
The present invention reintroduces a kind of complement metal oxide semiconductor image sensor.This complement metal oxide semiconductor image sensor comprises substrate, photodiode and a plurality of n transistor npn npn.Wherein, substrate has an optical sensing area and a transistor unit district.Photodiode is disposed in the substrate of optical sensing area.A plurality of n transistor npn npns are disposed in the substrate in transistor unit district, and wherein the grid structure of these n transistor npn npns comprises a p type grid structure and a plurality of n type grid structure.
According to the described complement metal oxide semiconductor image sensor of embodiments of the invention, above-mentioned n type grid structure is transfering transistor, reset transistor, source follower transistor and selection transistor three a grid structure wherein, and p type grid structure is another a transistorized grid structure wherein.
According to the described complement metal oxide semiconductor image sensor of embodiments of the invention, above-mentioned n type grid structure is reset transistor, source follower transistor and selection transistor two a grid structure wherein, and p type grid structure is another a transistorized grid structure wherein.
According to the described complement metal oxide semiconductor image sensor of embodiments of the invention, above-mentioned photodiode is a p-n junction district.
Complement metal oxide semiconductor image sensor of the present invention is that the n type grid structure (n-poly) that will have n transistor npn npn (NMOS) now replaces with p type grid structure (p-poly), therefore can reduce transistorized leakage problem, can avoid existing thus because of complement metal oxide semiconductor image sensor generation dark current, cause the noise increase of reading and influence image quality, and reduce the usefulness of element.
For above-mentioned and other purposes, feature and advantage of the present invention can be become apparent, embodiment cited below particularly, and conjunction with figs. are described in detail below.
Description of drawings
Fig. 1 is according to looking schematic diagram on the complement metal oxide semiconductor image sensor of one embodiment of the invention;
Fig. 2 illustrates the generalized section along AA ' hatching into Fig. 1;
Fig. 3 A to Fig. 3 F is the flow process generalized section according to the manufacture method of the complement metal oxide semiconductor image sensor that one embodiment of the invention illustrated;
Fig. 4 A to Fig. 4 F is the flow process generalized section according to the manufacture method of the complement metal oxide semiconductor image sensor that another embodiment of the present invention illustrated.
The main element symbol description
100: complement metal oxide semiconductor image sensor
101,301,401: substrate
102,302,402: optical sensing area
103,308,408:P type well region
104,304,404: the transistor unit district
105,303: isolation structure
106,330,430: photodiode
108,322,422:p type grid structure
108a, 320,420:p type polysilicon layer
110,112,114,324,326,328,424,426,428:n type grid structure
110a, 112a, 114a, 316,416:n type polysilicon layer
116,310,410: dielectric layer
118,340,440:n type source/drain regions
306,406: sacrificial oxide layer
312,412: the undoped polycrystalline silicon layer
314,318,418: mask layer
Embodiment
The present invention so is not limited to this applicable to the complement metal oxide semiconductor image sensor with 3-T framework or 4-T framework, and the present invention also has the complement metal oxide semiconductor image sensor of a plurality of transistor arrangements applicable to other.
Fig. 1 is according to looking schematic diagram on the complement metal oxide semiconductor image sensor of one embodiment of the invention.Fig. 2 illustrates the generalized section along AA ' hatching into Fig. 1.
Please be simultaneously with reference to Fig. 1 and Fig. 2, the complement metal oxide semiconductor image sensor 100 of 4-T framework is to be made of substrate 101, photodiode 106, p type grid structure 108 and 110,112,114 of a plurality of n type grid structures.Wherein, substrate 101 for example is silicon base or other semiconductor-based ends.Have an isolation structure 105 in substrate 101, to define optical sensing area 102 and transistor unit district 104, above-mentioned isolation structure 105 for example is shallow slot isolation structure (STI) or other isolation structures.In addition, in the substrate 101 in transistor unit district 104, also dispose P type well region 103, on this P type well region 103, can dispose a plurality of n transistor npn npns (NMOS), in after will elaborate.
Photodiode 106 is to be disposed in the p type well region 103 and substrate 101 of optical sensing area 102.Photodiode 106 is p-n junction districts, and it act as accepts light source, and changes luminous energy into electric energy.Photodiode 106 can be made of the P type substrate 101 and a n type doped region (not illustrating) of optical sensing area 102.
P type grid structure 108 is disposed on the p type well region 103 in transistor unit district 104.P type grid structure 108 is made up of p type polysilicon layer 108a and dielectric layer 116, and wherein p type polysilicon layer 108a is used as p type grid (p-po1y), and dielectric layer 116 is to be used as gate oxide.In this embodiment, be to be that the grid structure of transfering transistor (Tx) is used as example and is done explanation with p type grid structure 108.
N type grid structure 110,112,114 is disposed on the p type well region 103 in transistor unit district 104.Each n type grid structure 110,112,114 is made up of n type polysilicon layer 110a, 112a, 114a and dielectric layer 116 respectively, wherein n type polysilicon layer 110a, 112a, 114a are used as n type grid (n-poly), and dielectric layer 116 is to be used as gate oxide.Above-mentioned, n type grid structure 110,112,114 is respectively reset transistor (Rx), source follower transistor (Dx) and the grid structure of selecting transistor (Sx).
In addition, complement metal oxide semiconductor image sensor 100 also comprises n type source/drain regions 118, and it is disposed in the p type substrate 103 of n type grid structure 110,112,114 and p type grid structure 108 both sides.Therefore can form the transfering transistor of p-poly NMOS and reset transistor, source follower transistor and the selection transistor of n-polyNMOS.
The present invention is not restriction with a plurality of transistorized position of the foregoing description, visual circuit design of its positional alignment or arts demand and adjust.
In another embodiment, complement metal oxide semiconductor image sensor 100 can also p type grid structure 108 be one of them a grid structure of reset transistor, source follower transistor and selection transistor, and n type grid structure the 110,112, the 114th, its excess-three transistorized grid structure.
Certainly, in another embodiment, one of them grid structure of the reset transistor of the complement metal oxide semiconductor image sensor of 3-T framework, source follower transistor and selection transistor can be a p type grid structure, and all the other two transistorized grid structures are n type grid structure.
As above-mentioned embodiment, transfering transistor in the complement metal oxide semiconductor image sensor of 4-T framework is p-poly NMOS, because the work function difference (work functiondifferent) of p-poly NMOS is greater than the work function difference of n-poly NMOS, during element operation, when closing transistor, the transfering transistor of p-poly NMOS can so can reduce the leakage problem of transfering transistor in substrate and accumulation hole (hole), gate oxide interface.On the other hand, during turn-on transistor, below the transfering transistor of p-poly NMOS, can produce flush type passage (buried channel),, therefore help to reduce the problem of leakage current to reduce the resistance barrier that electric charge shifts.
Below, enumerate the manufacture method that two embodiment illustrate complement metal oxide semiconductor image sensor 100.Fig. 3 A to Fig. 3 F is the flow process generalized section according to the manufacture method of the complement metal oxide semiconductor image sensor that one embodiment of the invention illustrated.
At first, please refer to Fig. 3 A, a substrate 301 is provided, substrate 301 for example is silicon base or other semiconductor-based ends.Can form an isolation structure 303 in substrate 301, to define optical sensing area 302 and transistor unit district 304, wherein isolation structure 303 for example is shallow slot isolation structure or other isolation structures.
Then, in the substrate 301 in transistor unit district 304, form p type well region 308.The formation method of p type well region 308 for example is, in the substrate 301 of optical sensing area 302, form a photoresist layer (not illustrating), carry out an ion implantation technology then, in the substrate 301 in transistor unit district 304, inject boron (B) or other suitable p type dopants, remove the photoresist layer afterwards again.Certainly, in one embodiment, can also be in whole substrate 301, to form p type well region.In another embodiment, before p type well region 308 forms, can in substrate 301, form one deck sacrificial oxide layer 306, to prevent that substrate 301 surfaces from being polluted and to sustain damage when carrying out the ion implantation technology of well region.
Then, please refer to Fig. 3 B, after forming p type well region 308, remove sacrificial oxide layer 306.Subsequently, form one dielectric layer 310 in substrate 301, its material for example is a silica.Then, on dielectric layer 310, form one deck undoped polycrystalline silicon layer 312.The formation method of undoped polycrystalline silicon layer 312 for example is chemical vapour deposition technique (CVD).
Then, please refer to Fig. 3 C, form a mask layer 314, to cover the undoped polycrystalline silicon floor 312 in optical sensing area 302 and part transistor unit district 304 (the promptly predetermined zone that forms transfering transistor).Mask layer 314 for example is the photoresist layer.Afterwards, carry out an ion implantation technology, n type dopant is injected the undoped polycrystalline silicon layer 312 that is exposed, to form n type polysilicon layer 316.Wherein, n type dopant for example is phosphorus (P) or arsenic (As), the dosage of n type dopant between
1 * 10 14 ～
5 * 10 15 Ion/cm
2Between.
Then, please refer to Fig. 3 D, after n type polysilicon layer 316 forms, remove mask layer 314.Then, form one deck mask layer 318 on n type polysilicon layer 316, mask layer 318 for example is the photoresist layer.Then, carry out an ion implantation technology, p type dopant is injected the undoped polycrystalline silicon layer 312 that exposes, to form p type polysilicon layer 320.Wherein, p type dopant for example is boron (B) or boron difluoride (BF
2), the dosage of p type dopant between
1 * 10 13 ～
5 * 10 15 Ion/cm
2Between.
Subsequently, please refer to Fig. 3 E, after p type polysilicon layer 320 forms, remove mask layer 318.Then, definition dielectric layer 310, n type polysilicon layer 316 and p type polysilicon layer 320 are to form a plurality of n type grid structures 324,326,328 and a p type grid structure 322 on the p in transistor unit district 304 type well region 308.Above-mentioned, definition dielectric layer 310, n type polysilicon layer 316 for example are to carry out a photoetching and etch process with the method for p type polysilicon layer 320.Wherein, it is the grid structure of transfering transistor that p type grid structure 322 is used as, and n type grid structure 324,326,328 is used as and is reset transistor, source follower transistor and selects transistorized grid structure.
Then, please refer to Fig. 3 F, in the p of optical sensing area 302 type well region 308 and substrate 301, form a photodiode 330.Photodiode 330 is a p-n junction district, and its formation method is to carry out a doping process, n type dopant is injected p type well region 308, to form it.
Then, after photodiode 330 forms, also be included in and form n type source/drain regions 340 in the p type well region 308.The formation method of n type source/drain regions 340 for example is to utilize ion implantation, and phosphorus (P) or other suitable n type dopants are injected p type well region 308.
Fig. 4 A to Fig. 4 F is the flow process generalized section according to the manufacture method of the complement metal oxide semiconductor image sensor that another embodiment of the present invention illustrated.
At first, please refer to Fig. 4 A, a substrate 401 is provided, substrate 401 for example is silicon base or other semiconductor-based ends.Can form an isolation structure 403 in substrate 401, to define optical sensing area 402 and transistor unit district 404, wherein isolation structure 403 for example is shallow slot isolation structure or other isolation structures.
Then, in the substrate 401 in transistor unit district 404, form p type well region 408.The formation method of p type well region 408 for example is, in the substrate 401 of optical sensing area 402, form a photoresist layer (not illustrating), carry out an ion implantation technology then, in the substrate 401 in transistor unit district 404, inject boron or other suitable p type dopants, remove the photoresist layer afterwards again.Certainly, in one embodiment, can also be in whole substrate 401, to form p type well region.In another embodiment, before p type well region 408 forms, can in substrate 401, form one deck sacrificial oxide layer 406, to prevent that substrate 401 surfaces from being polluted and to sustain damage when carrying out the ion implantation technology of well region.
Then, please refer to Fig. 4 B, after forming p type well region 408, remove sacrificial oxide layer 406.Subsequently, form one dielectric layer 410 in substrate 401, its material for example is a silica.Then, on dielectric layer 410, form one deck undoped polycrystalline silicon layer 412.The formation method of undoped polycrystalline silicon layer 412 for example is a chemical vapour deposition technique.
Then, please refer to Fig. 4 C, carry out an ion implantation technology, n type dopant is injected undoped polycrystalline silicon layer 412, to form n type polysilicon layer 416.Wherein, n type dopant for example is phosphorus or arsenic, the dosage of n type dopant between
1 * 10 14 ～
5 * 10 15 Ion/cm
2Between.
Then, please refer to Fig. 4 D, form a mask layer 418, to expose the n type polysilicon layer 416 in optical sensing area 402 and part transistor unit district 404 (the promptly predetermined zone that forms transfering transistor), mask layer 418 for example is the photoresist layer.Then, carry out an ion implantation technology, inject p type dopant, make the n type polysilicon layer 416 that is exposed be transformed into p type polysilicon layer 420.Wherein, p type dopant for example is boron or boron difluoride, the dosage of p type dopant between
1 * 10 13 ～
5 * 10 15 Ion/cm
2Between.
Subsequently, please refer to Fig. 4 E, after p type polysilicon layer 420 forms, remove mask layer 418.Then, definition dielectric layer 410, n type polysilicon layer 416 and p type polysilicon layer 420 are to form a plurality of n type grid structures 424,426,428 and a p type grid structure 422 on the p in transistor unit district 404 type well region 408.Above-mentioned, definition dielectric layer 410, n type polysilicon layer 416 for example are to carry out a photoetching and etch process with the method for p type polysilicon layer 420.Wherein, it is the grid structure of transfering transistor that p type grid structure 422 is used as, and n type grid structure 424,426,428 is used as and is reset transistor, source follower transistor and selects transistorized grid structure.
Then, please refer to Fig. 4 F, in the p of optical sensing area 402 type well region 408 and substrate 401, form a photodiode 430.Photodiode 430 is a p-n junction district, and its formation method is to carry out a doping process, n type dopant is injected p type well region 408, to form it.
Similarly, after photodiode 430 forms, also be included in and form n type source/drain regions 440 in the p type well region 408.N type source/drain regions 440 for example is to utilize ion implantation, and phosphorus or other suitable n type dopants are injected p type well region 408.
In sum, the present invention is that n type grid structure with the n transistor npn npn in the complement metal oxide semiconductor image sensor replaces with p type grid structure.Because the work function difference of p-poly NMOS is greater than the work function difference of n-poly NMOS, during element operation, when closing transistor, the transistor of p-polyNMOS can so can reduce transistorized leakage problem in substrate and accumulation hole, gate oxide interface.On the other hand, during turn-on transistor, below the transistor of p-poly NMOS, can produce the flush type passage,, therefore help to reduce the problem of leakage current to reduce the resistance barrier that electric charge shifts.
Though the present invention discloses as above with embodiment; right its is not in order to qualification the present invention, any those skilled in the art, under the premise without departing from the spirit and scope of the present invention; can do a little change and retouching, so protection scope of the present invention is as the criterion when looking the claims person of defining.
Claims (20)
1. the manufacture method of a complement metal oxide semiconductor image sensor comprises:
Substrate is provided, and this substrate has optical sensing area and transistor unit district;
In this substrate in this transistor unit district, form p type well region;
In this substrate, form dielectric layer and undoped polycrystalline silicon layer in regular turn;
Form first mask layer, to cover this undoped polycrystalline silicon floor in this optical sensing area and this transistor unit district of part;
Carry out first ion implantation technology, n type dopant is injected this undoped polycrystalline silicon layer that is exposed, to form n type polysilicon layer;
Remove this first mask layer;
Form second mask layer, cover this n type polysilicon layer;
Carry out second ion implantation technology, p type dopant is injected this undoped polycrystalline silicon layer that is exposed, to form p type polysilicon layer;
Remove this second mask layer;
Define this dielectric layer, this n type polysilicon layer and this p type polysilicon layer, on this p type well region in this transistor unit district, to form a plurality of n type grid structures and a p type grid structure; And
In this substrate of this optical sensing area, form photodiode.
2. the manufacture method of complement metal oxide semiconductor image sensor as claimed in claim 1, wherein said n type grid structure is transfering transistor, reset transistor, source follower transistor and selection transistor three a grid structure wherein, and this p type grid structure is another a transistorized grid structure wherein.
3. the manufacture method of complement metal oxide semiconductor image sensor as claimed in claim 1, wherein said n type grid structure is reset transistor, source follower transistor and selection transistor two a grid structure wherein, and this p type grid structure is another a transistorized grid structure wherein.
4. the manufacture method of complement metal oxide semiconductor image sensor as claimed in claim 1, wherein this n type dopant comprises phosphorus or arsenic.
5. the manufacture method of complement metal oxide semiconductor image sensor as claimed in claim 1, wherein the dosage of this n type dopant is between 1 * 10
14～5 * 10
15Ion/cm
2Between.
6. the manufacture method of complement metal oxide semiconductor image sensor as claimed in claim 1, wherein this p type dopant comprises boron or boron difluoride.
7. the manufacture method of complement metal oxide semiconductor image sensor as claimed in claim 1, wherein the dosage of this p type dopant is between 1 * 10
13～5 * 10
15Ion/cm
2Between.
8. the manufacture method of complement metal oxide semiconductor image sensor as claimed in claim 1, wherein the formation method of this photodiode comprises and carries out doping process.
9. the manufacture method of a complement metal oxide semiconductor image sensor comprises:
Substrate is provided, and this substrate has optical sensing area and transistor unit district;
In this substrate in this transistor unit district, form p type well region;
In this substrate, form dielectric layer and undoped polycrystalline silicon layer in regular turn;
Carry out first ion implantation technology, n type dopant is injected this undoped polycrystalline silicon layer, to form n type polysilicon layer;
Form mask layer, to expose this n type polysilicon layer in this optical sensing area and this transistor unit district of part;
Carry out second ion implantation technology, inject p type dopant, make this n type polysilicon layer that is exposed be transformed into p type polysilicon layer;
Define this dielectric layer, this n type polysilicon layer and this p type polysilicon layer, on this p type well region in this transistor unit district, to form a plurality of n type grid structures and a p type grid structure; And
In this substrate of this optical sensing area, form photodiode.
10. the manufacture method of complement metal oxide semiconductor image sensor as claimed in claim 9, wherein said n type grid structure is transfering transistor, reset transistor, source follower transistor and selection transistor three a grid structure wherein, and this p type grid structure is another a transistorized grid structure wherein.
11. the manufacture method of complement metal oxide semiconductor image sensor as claimed in claim 9, wherein said n type grid structure is reset transistor, source follower transistor and selection transistor two a grid structure wherein, and this p type grid structure is another a transistorized grid structure wherein.
12. the manufacture method of complement metal oxide semiconductor image sensor as claimed in claim 9, wherein this n type dopant comprises phosphorus or arsenic.
13. the manufacture method of complement metal oxide semiconductor image sensor as claimed in claim 9, wherein the dosage of this n type dopant is between 1 * 10
14～5 * 10
15Ion/cm
2Between.
14. the manufacture method of complement metal oxide semiconductor image sensor as claimed in claim 9, wherein this p type dopant comprises boron or boron difluoride.
15. the manufacture method of complement metal oxide semiconductor image sensor as claimed in claim 9, wherein the dosage of this p type dopant is between 1 * 10
13～5 * 10
15Ion/cm
2Between.
16. the manufacture method of complement metal oxide semiconductor image sensor as claimed in claim 9, wherein the formation method of this photodiode comprises and carries out doping process.
17. a complement metal oxide semiconductor image sensor comprises:
Substrate, this substrate have optical sensing area and transistor unit district;
Photodiode is disposed in this substrate of this optical sensing area; And
A plurality of n transistor npn npns are disposed in this substrate in this transistor unit district, and the grid structure of wherein said n transistor npn npn comprises a p type grid structure and a plurality of n type grid structure.
18. complement metal oxide semiconductor image sensor as claimed in claim 17, wherein said n type grid structure is transfering transistor, reset transistor, source follower transistor and selection transistor three a grid structure wherein, and this p type grid structure is another a transistorized grid structure wherein.
19. complement metal oxide semiconductor image sensor as claimed in claim 17, wherein said n type grid structure is reset transistor, source follower transistor and selection transistor two a grid structure wherein, and this p type grid structure is another a transistorized grid structure wherein.
20. complement metal oxide semiconductor image sensor as claimed in claim 17, wherein this photodiode is the p-n junction district.
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| CN101769784B (en) * | 2008-12-27 | 2012-06-20 | 鸿富锦精密工业（深圳）有限公司 | Sensor assembly |
| CN103839957A (en) * | 2014-03-17 | 2014-06-04 | 上海华虹宏力半导体制造有限公司 | Coms image sensor and manufacturing method thereof |
| TW202038459A (en) * | 2018-12-21 | 2020-10-16 | 日商索尼半導體解決方案公司 | Imaging element and imaging device |
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2006
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