CN103473154B - A kind of three machine Hot Spare computing machines when airliner certainty annuity - Google Patents
A kind of three machine Hot Spare computing machines when airliner certainty annuity Download PDFInfo
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- CN103473154B CN103473154B CN201310372744.1A CN201310372744A CN103473154B CN 103473154 B CN103473154 B CN 103473154B CN 201310372744 A CN201310372744 A CN 201310372744A CN 103473154 B CN103473154 B CN 103473154B
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Abstract
What the invention discloses a kind of three machine Hot Spare computing machines works as airliner certainty annuity, comprise main A machine circuit on duty, from A machine circuit on duty, A machine decision circuitry on duty, main B machine circuit on duty, from B machine circuit on duty, B machine decision circuitry on duty, main C machine circuit on duty, from C machine circuit on duty and C machine decision circuitry on duty; When A machine control signal on duty be A machine on duty time, principal and subordinate B machine circuit on duty export judgement signal be that B machine is not on duty; The judgement signal that principal and subordinate C machine circuit on duty exports is that C machine is not on duty; When A machine control signal on duty, B machine control signal on duty are not on duty, the judgement signal that principal and subordinate C machine circuit on duty exports is that C machine is on duty.The present invention can tolerate single part of fault tolerable circuit fault, guarantees to have and only has a machine on duty, improve the reliability of system.
Description
Technical field
What the present invention relates to a kind of three machine Hot Spare computing machines works as airliner certainty annuity.
Background technology
The circuit on duty of tradition three machine Hot Spare computing machines only designs for single part of fault-tolerant logic, and adopt the two Hot Spare fault tolerable circuit of isomorphism to back up, when single part of circuit generation hardware fault on duty, conflict may be produced and cause multimachine on duty or without when the situation of airliner.Along with three machine Hot Spare framework applications are more and more extensive, mission reliability requires more and more higher, and traditional logic on duty is difficult to the demand meeting aerospace task.
Summary of the invention
Technical matters to be solved by this invention is: for the deficiencies in the prior art, what provide the simple three machine Hot Spare computing machines of a kind of structure works as airliner certainty annuity, single part of fault tolerable circuit fault can be tolerated, guarantee to have and only have a machine on duty, improve the reliability of system.
The present invention includes following technical scheme:
Three machine Hot Spare computing machines when an airliner certainty annuity, described three machine Hot Spare computing machines comprise A machine, B machine and C machine; Described airliner certainty annuity of working as comprises main A machine circuit on duty, from A machine circuit on duty, A machine decision circuitry on duty, main B machine circuit on duty, from B machine circuit on duty, B machine decision circuitry on duty, main C machine circuit on duty, from C machine circuit on duty and C machine decision circuitry on duty; Main A machine circuit on duty, main B machine circuit on duty and main C machine circuit on duty form main fault tolerable circuit; From A machine circuit on duty, form from fault tolerable circuit from B machine circuit on duty with from C machine circuit on duty;
The health status signal of A machine inputs to main A machine circuit on duty and respectively from A machine circuit on duty; Main A machine circuit on duty and to export according to the health status signal of A machine from A machine circuit on duty and judge that signal is to A machine decision circuitry on duty; A machine decision circuitry on duty is carried out by main A machine circuit on duty with from the judgement signal that A machine circuit on duty exports and obtains A machine control signal on duty; A machine decision circuitry on duty control signal on duty for A machine is inputed to respectively A machine, main B machine circuit on duty, from B machine circuit on duty, main C machine circuit on duty, from C machine circuit on duty;
The health status signal of B machine inputs to main B machine circuit on duty and respectively from B machine circuit on duty; Main B machine circuit on duty and to export according to the health status signal of B machine and A machine control signal on duty from B machine circuit on duty and judge that signal is to B machine decision circuitry on duty; B machine decision circuitry on duty is carried out by main B machine circuit on duty with from the judgement signal that B machine circuit on duty exports and obtains B machine control signal on duty; B machine decision circuitry on duty control signal on duty for B machine is inputed to respectively B machine, main C machine circuit on duty, from C machine circuit on duty;
Main C machine circuit on duty and to export according to A machine control signal on duty and B machine control signal on duty from C machine circuit on duty and judge that signal is to C machine decision circuitry on duty; C machine decision circuitry on duty is carried out phase by main C machine circuit on duty with from the judgement signal that C machine circuit on duty exports or is obtained C machine control signal on duty; Control signal on duty for C machine is inputed to C machine by C machine decision circuitry on duty;
When A machine control signal on duty be A machine on duty time, principal and subordinate B machine circuit on duty export judgement signal be that B machine is not on duty; The judgement signal that principal and subordinate C machine circuit on duty exports is that C machine is not on duty; When A machine control signal on duty, B machine control signal on duty are not on duty, the judgement signal that principal and subordinate C machine circuit on duty exports is that C machine is on duty.
The present invention compared with prior art tool has the following advantages:
The present invention introduces A machine state on duty and blocks B machine logic on duty, prevents single part of fault tolerable circuit fault from producing two-shipper on duty; Introduce A, B machine state on duty control C machine logic on duty, when guaranteeing that AB machine is all not on duty, C machine is on duty as safety assurance; By to the circuit interface logic control on duty of A, B machine, control AB machine is not on duty because single part of fault tolerable circuit fault produces A, B machine when judgements on duty conflicts, and prevents two-shipper on duty; By to the circuit interface logic control on duty of C machine, when guaranteeing that AB machine is all not on duty, C machine is on duty, improves security of system.The present invention not only correctly can carry out Logic judgment on duty when two Hot Spare fault tolerable circuit normally works; And the fault-tolerant output error caused due to hardware fault of tolerable single part, ensure and only have a computing machine for work as airliner, improve the reliability of logic on duty.
Accompanying drawing explanation
Fig. 1 is the schematic diagram when airliner certainty annuity of a kind of three machine Hot Spare computing machines of the present invention.
Embodiment
Just by reference to the accompanying drawings the present invention is described further below.
As shown in Figure 1, three machine Hot Spare computing machines of the present invention comprise A machine, B machine and C machine; Described airliner certainty annuity of working as comprises main A machine circuit on duty, from A machine circuit on duty, A machine decision circuitry on duty, main B machine circuit on duty, from B machine circuit on duty, B machine decision circuitry on duty, main C machine circuit on duty, from C machine circuit on duty and C machine decision circuitry on duty; Main A machine circuit on duty, main B machine circuit on duty and main C machine circuit on duty form main fault tolerable circuit; From A machine circuit on duty, form from fault tolerable circuit from B machine circuit on duty with from C machine circuit on duty; Main fault tolerable circuit and simultaneously power up work from fault tolerable circuit.
The health status signal of A machine inputs to main A machine circuit on duty and respectively from A machine circuit on duty; Main A machine circuit on duty and to export according to the health status signal of A machine from A machine circuit on duty and judge that signal is to A machine decision circuitry on duty; A machine decision circuitry on duty is carried out by main A machine circuit on duty with from the judgement signal that A machine circuit on duty exports and obtains A machine control signal on duty; A machine control signal on duty input to respectively A machine, main B machine circuit on duty, from B machine circuit on duty, main C machine circuit on duty, from C machine circuit on duty;
The health status signal of B machine inputs to main B machine circuit on duty and respectively from B machine circuit on duty; Main B machine circuit on duty and to export according to the health status signal of B machine and A machine control signal on duty from B machine circuit on duty and judge that signal is to B machine decision circuitry on duty; B machine decision circuitry on duty is carried out by main B machine circuit on duty with from the judgement signal that B machine circuit on duty exports and obtains B machine control signal on duty; B machine control signal on duty input to respectively B machine, main C machine circuit on duty, from C machine circuit on duty;
Main C machine circuit on duty and to export according to A machine control signal on duty and B machine control signal on duty from C machine circuit on duty and judge that signal is to C machine decision circuitry on duty; C machine decision circuitry on duty is carried out phase by main C machine circuit on duty with from the judgement signal that C machine circuit on duty exports or is obtained C machine control signal on duty; Control signal on duty for C machine is inputed to C machine by C machine decision circuitry on duty;
When A machine control signal on duty be A machine on duty time, principal and subordinate B machine circuit on duty export judgement signal be that B machine is not on duty; The judgement signal that principal and subordinate C machine circuit on duty exports is that C machine is not on duty;
When A machine control signal on duty be A machine not on duty time, according to B machine health status, principal and subordinate B machine circuit on duty judges that whether signal B machine on duty; When principal and subordinate B machine circuit on duty all judges that B machine is on duty, the judgement signal that principal and subordinate C machine circuit on duty exports is that C machine is not on duty;
When principal and subordinate AB machine circuit judges AB on duty machine is all not on duty, the judgement signal that principal and subordinate C machine circuit on duty exports is that C machine is on duty.
A machine or B machine health status signal are the pulse signal of timed sending; If cycle and the setting value of the health status signal received are inconsistent, then think that A machine or B machine break down, corresponding circuit output on duty judge signal as this machine not on duty; If consistent with setting value, then think that this machine is healthy, what circuit on duty exported judge signal as this machine on duty.
The unspecified part of the present invention belongs to general knowledge as well known to those skilled in the art.
Claims (1)
1. three machine Hot Spare computing machines when an airliner certainty annuity, described three machine Hot Spare computing machines comprise A machine, B machine and C machine; It is characterized in that, described airliner certainty annuity of working as comprises main A machine circuit on duty, from A machine circuit on duty, A machine decision circuitry on duty, main B machine circuit on duty, from B machine circuit on duty, B machine decision circuitry on duty, main C machine circuit on duty, from C machine circuit on duty and C machine decision circuitry on duty; Main A machine circuit on duty, main B machine circuit on duty and main C machine circuit on duty form main fault tolerable circuit; From A machine circuit on duty, form from fault tolerable circuit from B machine circuit on duty with from C machine circuit on duty;
The health status signal of A machine inputs to main A machine circuit on duty and respectively from A machine circuit on duty; Main A machine circuit on duty and to export according to the health status signal of A machine from A machine circuit on duty and judge that signal is to A machine decision circuitry on duty; A machine decision circuitry on duty is carried out by main A machine circuit on duty with from the judgement signal that A machine circuit on duty exports and obtains A machine control signal on duty; A machine decision circuitry on duty control signal on duty for A machine is inputed to respectively A machine, main B machine circuit on duty, from B machine circuit on duty, main C machine circuit on duty, from C machine circuit on duty;
The health status signal of B machine inputs to main B machine circuit on duty and respectively from B machine circuit on duty; Main B machine circuit on duty and to export according to the health status signal of B machine and A machine control signal on duty from B machine circuit on duty and judge that signal is to B machine decision circuitry on duty; B machine decision circuitry on duty is carried out by main B machine circuit on duty with from the judgement signal that B machine circuit on duty exports and obtains B machine control signal on duty; B machine decision circuitry on duty control signal on duty for B machine is inputed to respectively B machine, main C machine circuit on duty, from C machine circuit on duty;
Main C machine circuit on duty and to export according to A machine control signal on duty and B machine control signal on duty from C machine circuit on duty and judge that signal is to C machine decision circuitry on duty; C machine decision circuitry on duty is carried out phase by main C machine circuit on duty with from the judgement signal that C machine circuit on duty exports or is obtained C machine control signal on duty; Control signal on duty for C machine is inputed to C machine by C machine decision circuitry on duty;
When A machine control signal on duty be A machine on duty time, principal and subordinate B machine circuit on duty export judgement signal be that B machine is not on duty; The judgement signal that principal and subordinate C machine circuit on duty exports is that C machine is not on duty; When A machine control signal on duty, B machine control signal on duty are not on duty, the judgement signal that principal and subordinate C machine circuit on duty exports is that C machine is on duty;
A machine or B machine health status signal are the pulse signal of timed sending; If cycle and the setting value of the health status signal received are inconsistent, then think that A machine or B machine break down, corresponding circuit output on duty judge signal as this machine not on duty; If consistent with setting value, then think that this machine is healthy, what circuit on duty exported judge signal as this machine on duty.
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| CN201310372744.1A CN103473154B (en) | 2013-08-23 | 2013-08-23 | A kind of three machine Hot Spare computing machines when airliner certainty annuity |
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| CN201310372744.1A CN103473154B (en) | 2013-08-23 | 2013-08-23 | A kind of three machine Hot Spare computing machines when airliner certainty annuity |
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| CN103473154A CN103473154A (en) | 2013-12-25 |
| CN103473154B true CN103473154B (en) | 2015-08-19 |
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| CN104345771B (en) * | 2014-09-23 | 2016-03-30 | 北京控制工程研究所 | A kind of multiple-node backup computing machine initial synchronization method |
| CN110865908A (en) * | 2019-11-12 | 2020-03-06 | 天津津航计算技术研究所 | Switching method for processing fault of three-redundancy computer |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101216795A (en) * | 2007-12-29 | 2008-07-09 | 哈尔滨工业大学 | TMR fault tolerant computer |
| CN101441585A (en) * | 2009-01-13 | 2009-05-27 | 首都师范大学 | Accurate synchronizing method of three-module redundant fault tolerant computer |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101216795A (en) * | 2007-12-29 | 2008-07-09 | 哈尔滨工业大学 | TMR fault tolerant computer |
| CN101441585A (en) * | 2009-01-13 | 2009-05-27 | 首都师范大学 | Accurate synchronizing method of three-module redundant fault tolerant computer |
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