CN103473154A - On-duty computer determining system for three hot-backup computers - Google Patents
On-duty computer determining system for three hot-backup computers Download PDFInfo
- Publication number
- CN103473154A CN103473154A CN2013103727441A CN201310372744A CN103473154A CN 103473154 A CN103473154 A CN 103473154A CN 2013103727441 A CN2013103727441 A CN 2013103727441A CN 201310372744 A CN201310372744 A CN 201310372744A CN 103473154 A CN103473154 A CN 103473154A
- Authority
- CN
- China
- Prior art keywords
- duty
- machine
- circuit
- main
- computer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Landscapes
- Pinball Game Machines (AREA)
Abstract
The invention discloses an on-duty computer determining system for three hot-backup computers. The on-duty computer determining system comprises a master computer A on-duty circuit, a slave computer A on-duty circuit, a computer A on-duty judging circuit, a master computer B on-duty circuit, a slave computer B on-duty circuit, a computer B on-duty judging circuit, a master computer C on-duty circuit, a slave computer C on-duty circuit and a computer C on-duty judging circuit; when computer A on-duty control signals indicate that a computer A is on duty, judging signals outputted by the master computer B on-duty circuit and the slave computer B on-duty circuit indicate that a computer B is not on duty, and judging signals outputted by the master computer C on-duty circuit and the slave computer C on-duty circuit indicate that a computer C is not on duty; when computer A on-duty control signals and computer B on-duty control signals indicate that both the computer A and the computer B are not on duty, judging signals outputted by the master computer C on-duty circuit and the slave computer C on-duty circuit indicate that the computer C is on duty. The on-duty computer determining system has the advantages that faults of a single fault tolerance circuit can be tolerated, the condition that one computer and only one computer is on duty can be guaranteed, and the reliability of the system can be improved.
Description
Technical field
The airliner of working as that the present invention relates to a kind of three machine Hot Spare computing machines is determined system.
Background technology
The circuit on duty of tradition three machine Hot Spare computing machines is only designed for single part of fault-tolerant logic, and adopt the two Hot Spare fault tolerable circuits of isomorphism to be backed up, when single part of circuit generation hardware fault on duty, may produce conflict and causing multimachine on duty or without when the situation of airliner.Along with three machine Hot Spare framework applications are more and more extensive, mission reliability requires more and more higher, and traditional logic on duty is difficult to meet the demand of aerospace task.
Summary of the invention
Technical matters to be solved by this invention is: for the deficiencies in the prior art, what a kind of three machine Hot Spare computing machines simple in structure were provided determines system when airliner, can tolerate single part of fault tolerable circuit fault, guarantee to have and only have a machine on duty, improve the reliability of system.
The present invention includes following technical scheme:
A kind of airliner of working as of three machine Hot Spare computing machines is determined system, and described three machine Hot Spare computing machines comprise A machine, B machine and C machine; Described when airliner determine system comprise main A machine circuit on duty, from A machine circuit on duty, A machine decision circuitry on duty, main B machine circuit on duty, from B machine circuit on duty, B machine decision circuitry on duty, main C machine circuit on duty, from C machine circuit on duty and C machine decision circuitry on duty; Main A machine circuit on duty, main B machine circuit on duty and main C machine circuit on duty form main fault tolerable circuit; From A machine circuit on duty, from B machine circuit on duty with from C machine circuit formation on duty from fault tolerable circuit;
The health status signal of A machine inputs to respectively main A machine circuit on duty and from A machine circuit on duty; Main A machine circuit on duty and from A machine circuit on duty according to the health status signal of A machine output judgement signal to A machine decision circuitry on duty; A machine decision circuitry on duty is carried out and obtains A machine control signal on duty by main A machine circuit on duty with from the judgement signal of A machine circuit output on duty; A machine decision circuitry on duty by A machine control signal on duty input to respectively A machine, main B machine circuit on duty, from B machine circuit on duty, main C machine circuit on duty, from C machine circuit on duty;
The health status signal of B machine inputs to respectively main B machine circuit on duty and from B machine circuit on duty; Main B machine circuit on duty and from B machine circuit on duty according to the health status signal of B machine and A machine control signal output on duty judgement signal to B machine decision circuitry on duty; B machine decision circuitry on duty is carried out and obtains B machine control signal on duty by main B machine circuit on duty with from the judgement signal of B machine circuit output on duty; B machine decision circuitry on duty by B machine control signal on duty input to respectively B machine, main C machine circuit on duty, from C machine circuit on duty;
Main C machine circuit on duty and from C machine circuit on duty according to A machine control signal on duty and B machine control signal on duty output judgement signal to C machine decision circuitry on duty; C machine decision circuitry on duty is carried out phase or is obtained C machine control signal on duty by main C machine circuit on duty with from the judgement signal of C machine circuit output on duty; C machine decision circuitry on duty inputs to the C machine by C machine control signal on duty;
When A machine control signal on duty is A machine when on duty, the judgement signal of principal and subordinate B machine circuit output on duty is that the B machine is not on duty; The judgement signal of principal and subordinate C machine circuit output on duty is that the C machine is not on duty; When A machine control signal on duty, B machine control signal on duty are when not on duty, the judgement signal of principal and subordinate C machine circuit output on duty is that the C machine is on duty.
The present invention compared with prior art has following advantage:
The present invention introduces A machine state on duty and blocks B machine logic on duty, prevents that single part of fault tolerable circuit fault from producing two-shipper on duty; Introduce A, B machine state on duty is controlled C machine logic on duty, while guaranteeing that the AB machine is all on duty, the C machine is on duty as safety assurance; By to A, the circuit interface logic control on duty of B machine, control the AB machine because single part of fault tolerable circuit fault produces A during judgement conflict on duty, B machine not on duty, prevent that two-shipper is on duty; By to the circuit interface logic control on duty of C machine, while guaranteeing that the AB machine is all on duty, the C machine is on duty, has improved security of system.The present invention not only can correctly carry out logic judgement on duty when two Hot Spare fault tolerable circuit normal operation; And the fault-tolerant output error caused due to hardware fault of single part of tolerable, ensure and a computing machine only arranged for to work as airliner, improved the reliability of logic on duty.
The accompanying drawing explanation
The schematic diagram that airliner is determined system of working as that Fig. 1 is a kind of three machine Hot Spare computing machines of the present invention.
Embodiment
Below just by reference to the accompanying drawings the present invention is described further.
As shown in Figure 1, three machine Hot Spare computing machines of the present invention comprise A machine, B machine and C machine; Described when airliner determine system comprise main A machine circuit on duty, from A machine circuit on duty, A machine decision circuitry on duty, main B machine circuit on duty, from B machine circuit on duty, B machine decision circuitry on duty, main C machine circuit on duty, from C machine circuit on duty and C machine decision circuitry on duty; Main A machine circuit on duty, main B machine circuit on duty and main C machine circuit on duty form main fault tolerable circuit; From A machine circuit on duty, from B machine circuit on duty with from C machine circuit formation on duty from fault tolerable circuit; Main fault tolerable circuit and simultaneously power up work from fault tolerable circuit.
The health status signal of A machine inputs to respectively main A machine circuit on duty and from A machine circuit on duty; Main A machine circuit on duty and from A machine circuit on duty according to the health status signal of A machine output judgement signal to A machine decision circuitry on duty; A machine decision circuitry on duty is carried out and obtains A machine control signal on duty by main A machine circuit on duty with from the judgement signal of A machine circuit output on duty; A machine control signal on duty inputs to respectively A machine, main B machine circuit on duty, from B machine circuit on duty, main C machine circuit on duty, from C machine circuit on duty;
The health status signal of B machine inputs to respectively main B machine circuit on duty and from B machine circuit on duty; Main B machine circuit on duty and from B machine circuit on duty according to the health status signal of B machine and A machine control signal output on duty judgement signal to B machine decision circuitry on duty; B machine decision circuitry on duty is carried out and obtains B machine control signal on duty by main B machine circuit on duty with from the judgement signal of B machine circuit output on duty; B machine control signal on duty inputs to respectively B machine, main C machine circuit on duty, from C machine circuit on duty;
Main C machine circuit on duty and from C machine circuit on duty according to A machine control signal on duty and B machine control signal on duty output judgement signal to C machine decision circuitry on duty; C machine decision circuitry on duty is carried out phase or is obtained C machine control signal on duty by main C machine circuit on duty with from the judgement signal of C machine circuit output on duty; C machine decision circuitry on duty inputs to the C machine by C machine control signal on duty;
When A machine control signal on duty is A machine when on duty, the judgement signal of principal and subordinate B machine circuit output on duty is that the B machine is not on duty; The judgement signal of principal and subordinate C machine circuit output on duty is that the C machine is not on duty;
When A machine control signal on duty is A machine when not on duty, principal and subordinate B machine circuit on duty judges that according to B machine health status whether signal B machine is on duty; When principal and subordinate B machine circuit on duty all judges that the B machine is on duty, the judgement signal of principal and subordinate C machine circuit output on duty is that the C machine is not on duty;
When principal and subordinate AB machine circuit judges AB machine on duty is all not on duty, the judgement signal of principal and subordinate C machine circuit output on duty is that the C machine is on duty.
The pulse signal that A machine or B machine health status signal are timed sending; If cycle and the setting value of the health status signal received are inconsistent, think that A machine or B machine break down, the judgement signal of corresponding circuit output on duty is that this machine is not on duty; If consistent with setting value, think this machine health, the judgement signal of circuit output on duty is that this machine is on duty.
The unspecified part of the present invention belongs to general knowledge as well known to those skilled in the art.
Claims (1)
1. the airliner of working as of a machine Hot Spare computing machine is determined system, and described three machine Hot Spare computing machines comprise A machine, B machine and C machine; It is characterized in that, described when airliner determine system comprise main A machine circuit on duty, from A machine circuit on duty, A machine decision circuitry on duty, main B machine circuit on duty, from B machine circuit on duty, B machine decision circuitry on duty, main C machine circuit on duty, from C machine circuit on duty and C machine decision circuitry on duty; Main A machine circuit on duty, main B machine circuit on duty and main C machine circuit on duty form main fault tolerable circuit; From A machine circuit on duty, from B machine circuit on duty with from C machine circuit formation on duty from fault tolerable circuit;
The health status signal of A machine inputs to respectively main A machine circuit on duty and from A machine circuit on duty; Main A machine circuit on duty and from A machine circuit on duty according to the health status signal of A machine output judgement signal to A machine decision circuitry on duty; A machine decision circuitry on duty is carried out and obtains A machine control signal on duty by main A machine circuit on duty with from the judgement signal of A machine circuit output on duty; A machine decision circuitry on duty by A machine control signal on duty input to respectively A machine, main B machine circuit on duty, from B machine circuit on duty, main C machine circuit on duty, from C machine circuit on duty;
The health status signal of B machine inputs to respectively main B machine circuit on duty and from B machine circuit on duty; Main B machine circuit on duty and from B machine circuit on duty according to the health status signal of B machine and A machine control signal output on duty judgement signal to B machine decision circuitry on duty; B machine decision circuitry on duty is carried out and obtains B machine control signal on duty by main B machine circuit on duty with from the judgement signal of B machine circuit output on duty; B machine decision circuitry on duty by B machine control signal on duty input to respectively B machine, main C machine circuit on duty, from C machine circuit on duty;
Main C machine circuit on duty and from C machine circuit on duty according to A machine control signal on duty and B machine control signal on duty output judgement signal to C machine decision circuitry on duty; C machine decision circuitry on duty is carried out phase or is obtained C machine control signal on duty by main C machine circuit on duty with from the judgement signal of C machine circuit output on duty; C machine decision circuitry on duty inputs to the C machine by C machine control signal on duty;
When A machine control signal on duty is A machine when on duty, the judgement signal of principal and subordinate B machine circuit output on duty is that the B machine is not on duty; The judgement signal of principal and subordinate C machine circuit output on duty is that the C machine is not on duty; When A machine control signal on duty, B machine control signal on duty are when not on duty, the judgement signal of principal and subordinate C machine circuit output on duty is that the C machine is on duty.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310372744.1A CN103473154B (en) | 2013-08-23 | 2013-08-23 | A kind of three machine Hot Spare computing machines when airliner certainty annuity |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310372744.1A CN103473154B (en) | 2013-08-23 | 2013-08-23 | A kind of three machine Hot Spare computing machines when airliner certainty annuity |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103473154A true CN103473154A (en) | 2013-12-25 |
| CN103473154B CN103473154B (en) | 2015-08-19 |
Family
ID=49798019
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310372744.1A Active CN103473154B (en) | 2013-08-23 | 2013-08-23 | A kind of three machine Hot Spare computing machines when airliner certainty annuity |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103473154B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104345771A (en) * | 2014-09-23 | 2015-02-11 | 北京控制工程研究所 | Initial synchronization method for multiple hot backup computers |
| CN110865908A (en) * | 2019-11-12 | 2020-03-06 | 天津津航计算技术研究所 | Switching method for processing fault of three-redundancy computer |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101216795A (en) * | 2007-12-29 | 2008-07-09 | 哈尔滨工业大学 | TMR fault tolerant computer |
| CN101441585A (en) * | 2009-01-13 | 2009-05-27 | 首都师范大学 | Accurate synchronizing method of three-module redundant fault tolerant computer |
-
2013
- 2013-08-23 CN CN201310372744.1A patent/CN103473154B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101216795A (en) * | 2007-12-29 | 2008-07-09 | 哈尔滨工业大学 | TMR fault tolerant computer |
| CN101441585A (en) * | 2009-01-13 | 2009-05-27 | 首都师范大学 | Accurate synchronizing method of three-module redundant fault tolerant computer |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104345771A (en) * | 2014-09-23 | 2015-02-11 | 北京控制工程研究所 | Initial synchronization method for multiple hot backup computers |
| CN104345771B (en) * | 2014-09-23 | 2016-03-30 | 北京控制工程研究所 | A kind of multiple-node backup computing machine initial synchronization method |
| CN110865908A (en) * | 2019-11-12 | 2020-03-06 | 天津津航计算技术研究所 | Switching method for processing fault of three-redundancy computer |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103473154B (en) | 2015-08-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102724083A (en) | Degradable triple-modular redundancy computer system based on software synchronization | |
| CN104268037A (en) | Hot redundancy interlocking subsystem and main and standby switching method thereof | |
| CN107957692B (en) | Controller redundancy method, device and system | |
| CN104360916A (en) | Main and spare synchronization method based on data synchronization | |
| CN104678757A (en) | Helicopter engine dual-redundancy fuel oil regulation controller | |
| CN104767443A (en) | Servo motor control system | |
| CN203338127U (en) | Dual-redundancy control system for AGV | |
| CN102915778B (en) | Method for carrying out power loss analysis on digital instrument control system of nuclear power plant by utilizing functional group analysis method | |
| CN103473154A (en) | On-duty computer determining system for three hot-backup computers | |
| CN103605303B (en) | The injection moulding machine Digital I/O of a kind of band redundancy detection turns terminal box | |
| CN203930440U (en) | Machine control equipment and drive unit thereof | |
| CN110392009A (en) | Multi-inverter parallel carrier synchronization device and its synchronous method with redundancy feature | |
| CN103699461A (en) | Double-host machine mutual redundancy hot backup method | |
| CN108228403A (en) | The redundancy management circuit and management method of a kind of redundant fault-tolerant computer system | |
| CN104090525B (en) | Machine control equipment and driving means thereof | |
| CN202583865U (en) | Dual-redundancy control circuit | |
| CN105573869B (en) | System controller fault tolerant control method based on I2C bus | |
| CN103546138A (en) | Touch key control circuit | |
| CN103631668B (en) | One kind is applied to the preferential chain voter arrangement of space application multi-computer system | |
| CN102339246B (en) | Satellite borne electronic system on basis of hot backup and hot backup method | |
| CN103675443B (en) | Manned spacecraft FPGA global clock detection device | |
| CN105049003B (en) | Sync logic | |
| CN103198047A (en) | Redundancy synchronization Internet protocol (IP) core with state monitoring and based on field programmable gate array (FPGA) | |
| CN103049038B (en) | The hardware clock synchronizing circuit of two security systems is got for three | |
| CN204046548U (en) | The two narrow trigger impulse generative circuit of Soft Starter of Induction Motor thyristor gate leve |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |